Ð þíÕg8Êd( Ê,!pine64,rockpro64rockchip,rk3399 +7Pine64 RockPro64aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcpu@0 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@1 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@2 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@3 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@100 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0cpu@101 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0idle-states8pscicpu-sleeparm,idle-stateEVmx~úŽ„0 cluster-sleeparm,idle-stateEVm~ôŽÐ0 display-subsystemrockchip,display-subsystemŸpmu_a53arm,cortex-a53-pmu¥pmu_a72arm,cortex-a72-pmu¥psci arm,psci-1.0·smctimerarm,armv8-timer@¥   °xin24m fixed-clockÇn6×xin24mêamba simple-bus+÷dma-controller@ff6d0000arm,pl330arm,primecell¬ÿm@ ¥þÑÓ  apb_pclk0Ndma-controller@ff6e0000arm,pl330arm,primecell¬ÿn@ ¥þÑÔ  apb_pclk0=pcie@f8000000rockchip,rk3399-pcie ¬øýaxi-baseapb-base+0<� ÑÅÄG  aclkaclk-perfhclkpm0¥123FsyslegacyclientV`iwˆ— Ÿ,¤pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38÷ƒúúàûàûà8®‚ƒ„…†€(µcoremgmtmgmt-stickypipepmpclkaclkÁokay ÈÑÛdefaultéóinterrupt-controller0ethernet@fe300000rockchip,rk3399-gmac¬þ0¥ Fmacirq8ÑighfjÕfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac(®‰ µstmmaceth6ÁokayC¦Sjinputw‚rgmiiÛdefaulté ‹› ±'ÃPÆ(Ïdwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ1@¥@ØðÑ€ ÑîMœ biuciuciu-driveciu-sampleæ(®yµreset Ádisableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ2@¥AØðÑ€CÍñ ë ÑÎLš› biuciuciu-driveciu-sampleæ(®zµresetÁokay ! *Ûdefault é!"#sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1¬þ3¥ 5CNñ ëÂÑNð clk_xinclk_ahb×emmc_cardclockêŸ$ ¤phy_arasan(KÁokay\k0‰usb@fe380000 generic-ehci¬þ8¥ÑÈÉ% usbhostarbiterutmiŸ&¤usbÁokayusb@fe3a0000 generic-ohci¬þ:¥ÑÈÉ% usbhostarbiterutmiŸ&¤usbÁokayusb@fe3c0000 generic-ehci¬þ<�¥ÑÊË' usbhostarbiterutmiŸ(¤usbÁokayusb@fe3e0000 generic-ohci¬þ>¥ ÑÊË' usbhostarbiterutmiŸ(¤usbÁokayusb@fe800000rockchip,rk3399-dwc3+÷0сƒöøôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®% µusb3-otgÁokayusb@fe800000 snps,dwc3¬þ€¥iсöƒ refbus_earlysuspendyotgŸ)*¤usb2-phyusb3-phy utmi_wideŠ¢ÃÜý(Áokayusb@fe900000rockchip,rk3399-dwc3+÷0Ñ‚„÷øôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®& µusb3-otgÁokayusb@fe900000 snps,dwc3¬þ¥nÑ‚÷„ refbus_earlysuspendyhostŸ+,¤usb2-phyusb3-phy utmi_wideŠ¢ÃÜý(Áokaydp@fec00000rockchip,rk3399-cdn-dp¬þÀ¥ Cr¡ñõá ë Ñru¡o core-clkpclkspdifgrfŸ-.( ®HJýµspdifdptxapbcore6 Ádisabledportsport+endpoint@0¬0/0˜endpoint@1¬000’interrupt-controller@fee00000 arm,gic-v3+÷P¬þàþð ÿðÿñÿò¥ 0interrupt-controller@fee20000arm,gic-v3-its@¬þâ0ppi-partitionsinterrupt-partition-0O0interrupt-partition-1O0saradc@ff100000rockchip,rk3399-saradc¬ÿ¥>XÑPe saradcapb_pclk®Ô µsaradc-apbÁokayj1i2c@ff110000rockchip,rk3399-i2c¬ÿCAñ ëÂÑAU  i2cpclk¥;Ûdefaulté2+Áokayv,i2c@ff120000rockchip,rk3399-i2c¬ÿCBñ ëÂÑBV  i2cpclk¥#Ûdefaulté3+ Ádisabledi2c@ff130000rockchip,rk3399-i2c¬ÿCCñ ëÂÑCW  i2cpclk¥"Ûdefaulté4+Áokayv0›i2c@ff140000rockchip,rk3399-i2c¬ÿCDñ ëÂÑDX  i2cpclk¥&Ûdefaulté5+ Ádisabledi2c@ff150000rockchip,rk3399-i2c¬ÿCEñ ëÂÑEY  i2cpclk¥%Ûdefaulté6+ Ádisabledi2c@ff160000rockchip,rk3399-i2c¬ÿCFñ ëÂÑFZ  i2cpclk¥$Ûdefaulté7+ Ádisabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑQ` baudclkapb_pclk¥c¥¯Ûdefaulté89Áokayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑRa baudclkapb_pclk¥b¥¯Ûdefaulté: Ádisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑSb baudclkapb_pclk¥d¥¯Ûdefaulté;Áokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑTc baudclkapb_pclk¥e¥¯Ûdefaulté<� Ádisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑG[ spiclkapb_pclk¥D¼= = ÁtxrxÛdefaulté>?@A+ Ádisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑH\ spiclkapb_pclk¥5¼= = ÁtxrxÛdefaultéBCDE+Áokayflash@0jedec,spi-nor¬˘–€spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑI] spiclkapb_pclk¥4¼==ÁtxrxÛdefaultéFGHI+ Ádisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑJ^ spiclkapb_pclk¥C¼==ÁtxrxÛdefaultéJKLM+ Ádisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ ÑK_ spiclkapb_pclk¥„¼NN ÁtxrxÛdefaultéOPQR(+ Ádisabledthermal-zonescpuÝdóèStripscpu_alert0pЧpassive0Tcpu_alert1$øЧpassive0Ucpu_critsÐ §criticalcooling-mapsmap0(T-ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1(UH-ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpuÝdóèStripsgpu_alert0$øЧpassivegpu_critsÐ §criticaltsadc@ff260000rockchip,rk3399-tsadc¬ÿ&¥aCOñ q°ÑOd tsadcapb_pclk®è µtsadc-apb6<�sÛinitdefaultsleepéVSW]VgÁokay}”0Sqos@ffa58000syscon¬ÿ¥€ 0_qos@ffa5c000syscon¬ÿ¥À 0`qos@ffa60080syscon¬ÿ¦€ qos@ffa60100syscon¬ÿ¦ qos@ffa60180syscon¬ÿ¦€ qos@ffa70000syscon¬ÿ§ 0cqos@ffa70080syscon¬ÿ§€ 0dqos@ffa74000syscon¬ÿ§@ 0aqos@ffa76000syscon¬ÿ§` 0bqos@ffa90000syscon¬ÿ© 0eqos@ffa98000syscon¬ÿ©€ 0Xqos@ffaa0000syscon¬ÿª 0fqos@ffaa0080syscon¬ÿª€ 0gqos@ffaa8000syscon¬ÿª€ 0hqos@ffaa8080syscon¬ÿª€€ 0iqos@ffab0000syscon¬ÿ« 0Yqos@ffab0080syscon¬ÿ«€ 0Zqos@ffab8000syscon¬ÿ«€ 0[qos@ffac0000syscon¬ÿ¬ 0\qos@ffac0080syscon¬ÿ¬€ 0]qos@ffac8000syscon¬ÿ¬€ 0jqos@ffac8080syscon¬ÿ¬€€ 0kqos@ffad0000syscon¬ÿ­ 0lqos@ffad8080syscon¬ÿ­€€ qos@ffae0000syscon¬ÿ® 0^power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¬ÿ1power-controller!rockchip,rk3399-power-controller¯+0pd_iep@34¬"ÑáÝÃXpd_rga@33¬!ÑÜåÃYZpd_vcodec@31¬ÑëêÃ[pd_vdu@32¬ ÑíìÃ\]pd_gpu@35¬#ÑÐÃ^pd_edp@25¬Ñlpd_emmc@23¬ÑðÃ_pd_gmac@22¬ÑÕfÃ`pd_sd@27¬ÑÎLÃapd_sdioaudio@28¬ÑîÃbpd_usb3@24¬ÑôÃcdpd_vio@15¬+pd_hdcp@21¬ÑÞçrÃepd_isp0@19¬ÑåßÃfgpd_isp1@20¬ÑæàÃhipd_tcpc0@RK3399_PD_TCPC0¬Ñ~}pd_tcpc1@RK3399_PD_TCPC1¬ Ñ€pd_vo@16¬+pd_vopb@17¬ÑÙÙÃjkpd_vopl@18¬ÑÛÛÃlsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¬ÿ2+0…io-domains&rockchip,rk3399-pmu-io-voltage-domainÁokayÊmspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ5Ñnn spiclkapb_pclk¥<�Ûdefaultéopqr+ Ádisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿ7Ñnn" baudclkapb_pclk¥f¥¯Ûdefaultés Ádisabledi2c@ff3c0000rockchip,rk3399-i2c¬ÿ<�Cn ñ ëÂÑn n  i2cpclk¥9Ûdefaultét+ÁokayÇ€v¨pmic@1brockchip,rk808¬ ¥ ê×xin32krk808-clkout2ÛdefaultéuÙúvv v,v8vDvPw\vhvuv‚wx0±regulatorsDCDC_REG1 œvdd_center«¿Ñ q°é™pqregulator-state-memDCDC_REG2 œvdd_cpu_l«¿Ñ q°é™pq0 regulator-state-memDCDC_REG3œvcc_ddr«¿regulator-state-mem/DCDC_REG4œvcc_1v8«¿Ñw@éw@0³regulator-state-mem/Gw@LDO_REG1 œvcc1v8_dvp«¿Ñw@éw@0†regulator-state-memLDO_REG2 œvcc3v0_touch«¿Ñ-ÆÀé-ÆÀregulator-state-memLDO_REG3 œvcca_1v8«¿Ñw@éw@0xregulator-state-mem/Gw@LDO_REG4 œvcc_sdio«¿Ñw@é-ÆÀ0‡regulator-state-mem/G-ÆÀLDO_REG5œvcca3v0_codec«¿Ñ-ÆÀé-ÆÀregulator-state-memLDO_REG6œvcc_1v5«¿Ñã`éã`regulator-state-mem/Gã`LDO_REG7œvcca1v8_codec«¿Ñw@éw@regulator-state-memLDO_REG8œvcc_3v0«¿Ñ-ÆÀé-ÆÀ0mregulator-state-mem/G-ÆÀSWITCH_REG1 œvcc3v3_s3«¿0regulator-state-memSWITCH_REG2 œvcc3v3_s0«¿regulator-state-memregulator@40silergy,syr827¬@cÛdefaultéy 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µcoreaxiahb(!efuse@ff690000rockchip,rk3399-efuse¬ÿi€+Ñ}  pclk_efusecpu-id@7¬cpu-leakage@17¬gpu-leakage@18¬center-leakage@19¬cpu-leakage@1a¬logic-leakage@1b¬wafer-info@1c¬pmu-clock-controller@ff750000rockchip,rk3399-pmucru¬ÿu6…ê¶Cnñ(Jñ0nclock-controller@ff760000rockchip,rk3399-cru¬ÿv6궀CÀÀ@ÂÁBÉÂCãÞx@ñ#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂ0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¬ÿw+0io-domains"rockchip,rk3399-io-voltage-domainÁokayÆÐm݇êmusb2-phy@e450rockchip,rk3399-usb2phy¬äPÑ{ phyclkê×clk_usbphy0_480mÁokay0%host-portú¥ FlinestateÁokaywˆ0&otg-portú0¥ghjFotg-bvalidotg-idlinestateÁokay0)usb2-phy@e460rockchip,rk3399-usb2phy¬ä`Ñ| phyclkê×clk_usbphy1_480mÁokay0'host-portú¥ FlinestateÁokaywˆ0(otg-portú0¥lmoFotg-bvalidotg-idlinestateÁokay0+phy@f780rockchip,rk3399-emmc-phy¬÷€$щ emmcclkúÁokay0$pcie-phyrockchip,rk3399-pcie-phyÑŠ refclkú®‡ 2µphyÁokay0phy@ff7c0000rockchip,rk3399-typec-phy¬ÿ|Ñ~} tcpdcoretcpdphy-refC~ñúð€(®•”Lµuphyuphy-pipeuphy-tcphy6Áokaydp-portú0-usb3-portú0*phy@ff800000rockchip,rk3399-typec-phy¬ÿ€Ñ€ tcpdcoretcpdphy-refC€ñúð€( ®œMµuphyuphy-pipeuphy-tcphy6Áokaydp-portú0.usb3-portú0,watchdog@ff848000 snps,dw-wdt¬ÿ„€Ñ|¥xrktimer@ff850000rockchip,rk3399-timer¬ÿ…¥QÑhZ  pclktimerspdif@ff870000rockchip,rk3399-spdif¬ÿ‡¥B¼NÁtx  mclkhclkÑU×ÛdefaultéŠ( Ádisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿˆ6¥'¼NNÁtxrx i2s_clki2s_hclkÑVÔÛdefaulté‹(Áokay  4i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿ‰¥(¼NNÁtxrx i2s_clki2s_hclkÑWÕÛdefaultéŒ(Áokay  4i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿŠ¥)¼NNÁtxrx i2s_clki2s_hclkÑXÖ(Áokay0™vop@ff8f0000rockchip,rk3399-vop-lit¬ÿ>ü¥wCÛÛñׄõáÑÛµÛ aclk_vopdclk_vophclk_vop¢(® µaxiahbdclkÁokayport+0endpoint@0¬0Ž0 endpoint@1¬00¥endpoint@2¬00žendpoint@3¬0‘0¢endpoint@4¬0’00iommu@ff8f3f00rockchip,iommu¬ÿ?¥w Fvopl_mmuÑÛÛ  aclkiface(©Áokay0vop@ff900000rockchip,rk3399-vop-big¬ÿ>ü¥vCÙÙñׄõáÑÙ´Ù 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Ñ¢q¤o refpclkphy_cfggrf(®üµapb6+ Ádisabledports+port@0¬+endpoint@0¬0¡0—endpoint@1¬0¢0‘edp@ff970000rockchip,rk3399-edp¬ÿ—€¥ Ñjlo  dppclkgrfÛdefaulté£(®µdp6 Ádisabledports+port@0¬+endpoint@0¬0¤0”endpoint@1¬0¥0gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¬ÿš0¥ FjobmmugpuÑÐ(#Áokay¦ ɧpinctrlrockchip,rk3399-pinctrl6 Õ…+÷gpio0@ff720000rockchip,gpio-bank¬ÿrÑn¥ â ò0 gpio1@ff730000rockchip,gpio-bank¬ÿsÑn¥ â ò0|gpio2@ff780000rockchip,gpio-bank¬ÿxÑP¥ â ò0gpio3@ff788000rockchip,gpio-bank¬ÿx€ÑQ¥ â ò0gpio4@ff790000rockchip,gpio-bank¬ÿyÑR¥ â ò0µpcfg-pull-up þ0«pcfg-pull-down 0¬pcfg-pull-none 0¨pcfg-pull-none-12ma  ' 0ªpcfg-pull-none-13ma  ' 0©pcfg-pull-none-18ma  'pcfg-pull-none-20ma  'pcfg-pull-up-2ma þ 'pcfg-pull-up-8ma þ 'pcfg-pull-up-18ma þ 'pcfg-pull-up-20ma þ 'pcfg-pull-down-4ma  'pcfg-pull-down-8ma  'pcfg-pull-down-12ma  ' pcfg-pull-down-18ma  'pcfg-pull-down-20ma  'pcfg-output-high 6pcfg-output-low Bclockclk-32k M¨edpedp-hpd M¨0£gmacrgmii-pinsð M©¨ ¨ © ¨ ¨¨¨¨©©¨¨©©0rmii-pins  M ¨ © ¨ ¨ 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M¨09uart0-rts M¨uart1uart1-xfer M « ¨0:uart2auart2a-xfer M« ¨uart2buart2b-xfer M«¨uart2cuart2c-xfer M«¨0;uart3uart3-xfer M«¨0<�uart3-cts M¨uart3-rts M¨uart4uart4-xfer M«¨0suarthdcpuarthdcp-xfer M«¨pwm0pwm0-pin M¨0€pwm0-pin-pull-down M¬vop0-pwm-pin M¨vop1-pwm-pin M¨pwm1pwm1-pin M¨0pwm1-pin-pull-down M¬pwm2pwm2-pin M¨0‚pwm2-pin-pull-down M¬pwm3apwm3a-pin M¨0ƒpwm3bpwm3b-pin M¨hdmihdmi-i2c-xfer M¨¨hdmi-cec M¨0œpciepci-clkreqn-cpm M¨pci-clkreqnb-cpm M¨pcie-perst M¨0pcie-pwr-en M¨0´buttonspwrbtn M«0­fusb302xfusb0-int M«0}ledswork_led-gpio M ¨0®diy_led-gpio M¨0¯pmicpmic-int-l M «0uvsel1-gpio M¬0yvsel2-gpio M¬0zsdio-pwrseqwifi-enable-h M ¨0²usb-typecvcc5v0_typec_en M«0¸usb2vcc5v0-host-en M¨0¶opp-table0operating-points-v2 [0 opp00 fQ– m 5 {œ@opp01 f#ÃF m 5opp02 f0£, m øPopp03 f<Ü mHopp04 fG†Œ mB@opp05 fTfr m*ˆopp-table1operating-points-v2 [0 opp00 fQ– m 5 {œ@opp01 f#ÃF m 5opp02 f0£, m –¨opp03 f<Ü m Yøopp04 fG†Œ m~ðopp05 fTfr m£èopp06 f_Ø" mÈàopp07 fkIÒ mO€opp-table2operating-points-v20¦opp00 f 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compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0vpcie12v-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesbus-widthcap-sd-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vnon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvbus-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathautorepeatdebounce-intervallabellinux,codedefault-statefan-supplypwmsreset-gpiosenable-active-high