Ð þíÓÌ8Ȑ( <�ÈX'tsd,rk3399-puma-haikourockchip,rk3399 + 7Theobroma Systems RK3399-Q7 SoMaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcpu@0 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@1 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@2 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@3 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@100 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0cpu@101 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0idle-states8pscicpu-sleeparm,idle-stateEVmx~úŽ„0 cluster-sleeparm,idle-stateEVm~ôŽÐ0 display-subsystemrockchip,display-subsystemŸpmu_a53arm,cortex-a53-pmu¥pmu_a72arm,cortex-a72-pmu¥psci arm,psci-1.0·smctimerarm,armv8-timer@¥   °xin24m fixed-clockÇn6×xin24mêamba simple-bus+÷dma-controller@ff6d0000arm,pl330arm,primecell¬ÿm@ ¥þÑÓ  apb_pclk0Odma-controller@ff6e0000arm,pl330arm,primecell¬ÿn@ ¥þÑÔ  apb_pclk0>pcie@f8000000rockchip,rk3399-pcie ¬øýaxi-baseapb-base+0<� ÑÅÄG  aclkaclk-perfhclkpm0¥123FsyslegacyclientV`iwˆ— Ÿ,¤pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38÷ƒúúàûàûà8®‚ƒ„…†€(µcoremgmtmgmt-stickypipepmpclkaclkÁokay ÈÑÛdefaultéinterrupt-controlleró0ethernet@fe300000rockchip,rk3399-gmac¬þ0¥ Fmacirq8ÑighfjÕfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac®‰ µstmmacethÁokay#¦3JinputWbrgmiiÛdefaulté k{ ‘'ÃP¦¯dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ1@¥@¸ðÑ€ ÑîMœ biuciuciu-driveciu-sampleÆ®yµreset Ádisableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ2@¥A¸ðÑ€#ÍÑ ë ÑÎLš› biuciuciu-driveciu-sampleÆ®zµresetÁokayæìö "Ûdefaulté !"#-$sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1¬þ3¥ 9#NÑ ëÂÑNð clk_xinclk_ahb×emmc_cardclockêŸ% ¤phy_arasanOÁokayì`o‰0ˆusb@fe380000 generic-ehci¬þ8¥ÑÈÉ& usbhostarbiterutmiŸ'¤usbÁokayusb@fe3a0000 generic-ohci¬þ:¥ÑÈÉ& usbhostarbiterutmiŸ'¤usbÁokayusb@fe3c0000 generic-ehci¬þ<�¥ÑÊË( usbhostarbiterutmiŸ)¤usbÁokayusb@fe3e0000 generic-ohci¬þ>¥ ÑÊË( usbhostarbiterutmiŸ)¤usbÁokayusb@fe800000rockchip,rk3399-dwc3+÷0сƒöøôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®% µusb3-otgÁokayusb@fe800000 snps,dwc3¬þ€¥iсöƒ refbus_earlysuspend—otgŸ*+¤usb2-phyusb3-phy Ÿutmi_wide¨ÀáúÁokayusb@fe900000rockchip,rk3399-dwc3+÷0Ñ‚„÷øôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®& µusb3-otgÁokayusb@fe900000 snps,dwc3¬þ¥nÑ‚÷„ refbus_earlysuspend—hostŸ,-¤usb2-phyusb3-phy Ÿutmi_wide¨ÀáúÁokaydp@fec00000rockchip,rk3399-cdn-dp¬þÀ¥ #r¡Ñõá ë Ñru¡o core-clkpclkspdifgrfŸ./ ®HJýµspdifdptxapbcore= Ádisabledportsport+endpoint@0¬N00—endpoint@1¬N10‘interrupt-controller@fee00000 arm,gic-v3+÷óP¬þàþð ÿðÿñÿò¥ 0interrupt-controller@fee20000arm,gic-v3-its^¬þâ0ppi-partitionsinterrupt-partition-0m0interrupt-partition-1m0saradc@ff100000rockchip,rk3399-saradc¬ÿ¥>vÑPe saradcapb_pclk®Ô µsaradc-apb Ádisabledi2c@ff110000rockchip,rk3399-i2c¬ÿ#AÑ ëÂÑAU  i2cpclk¥;Ûdefaulté2+ÁokayÇ€i2c@ff120000rockchip,rk3399-i2c¬ÿ#BÑ ëÂÑBV  i2cpclk¥#Ûdefaulté3+ÁokayÇ€i2c@ff130000rockchip,rk3399-i2c¬ÿ#CÑ ëÂÑCW  i2cpclk¥"Ûdefaulté4+ÁokayˆÂŸ0ši2c@ff140000rockchip,rk3399-i2c¬ÿ#DÑ ëÂÑDX  i2cpclk¥&Ûdefaulté5+ Ádisabledi2c@ff150000rockchip,rk3399-i2c¬ÿ#EÑ ëÂÑEY  i2cpclk¥%Ûdefaulté6+ÁokayÇ€i2c@ff160000rockchip,rk3399-i2c¬ÿ#FÑ ëÂÑFZ  i2cpclk¥$Ûdefaulté7+ÁokayÇ€fan@18 ti,amc6821¬Ørtc@6f isil,isl1208¬oserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑQ` baudclkapb_pclk¥c·ÁÛdefault é89:Áokayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑRa baudclkapb_pclk¥b·ÁÛdefaulté; Ádisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑSb baudclkapb_pclk¥d·ÁÛdefaulté<�Áokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑTc baudclkapb_pclk¥e·ÁÛdefaulté= Ádisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑG[ spiclkapb_pclk¥DÎ> > ÓtxrxÛdefaulté?@AB+ Ádisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑH\ spiclkapb_pclk¥5Î> > ÓtxrxÛdefaultéCDEF+Áokayflash@0jedec,spi-nor¬Ýúð€spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑI] spiclkapb_pclk¥4Î>>ÓtxrxÛdefaultéGHIJ+ Ádisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑJ^ spiclkapb_pclk¥CÎ>>ÓtxrxÛdefaultéKLMN+ Ádisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ ÑK_ spiclkapb_pclk¥„ÎOO ÓtxrxÛdefaultéPQRS+Áokaythermal-zonescpuïdèTtripscpu_alert0#p/Чpassive0Ucpu_alert1#$ø/Чpassive0Vcpu_crit#s/Ð §criticalcooling-mapsmap0:U?ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1:VH?ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpuïdèTtripsgpu_alert0#$ø/Чpassivegpu_crit#s/Ð §criticaltsadc@ff260000rockchip,rk3399-tsadc¬ÿ&¥a#OÑ q°ÑOd tsadcapb_pclk®è µtsadc-apbNsÛinitdefaultsleepéWeXoWyÁokay¦0Tqos@ffa58000syscon¬ÿ¥€ 0`qos@ffa5c000syscon¬ÿ¥À 0aqos@ffa60080syscon¬ÿ¦€ qos@ffa60100syscon¬ÿ¦ qos@ffa60180syscon¬ÿ¦€ qos@ffa70000syscon¬ÿ§ 0dqos@ffa70080syscon¬ÿ§€ 0eqos@ffa74000syscon¬ÿ§@ 0bqos@ffa76000syscon¬ÿ§` 0cqos@ffa90000syscon¬ÿ© 0fqos@ffa98000syscon¬ÿ©€ 0Yqos@ffaa0000syscon¬ÿª 0gqos@ffaa0080syscon¬ÿª€ 0hqos@ffaa8000syscon¬ÿª€ 0iqos@ffaa8080syscon¬ÿª€€ 0jqos@ffab0000syscon¬ÿ« 0Zqos@ffab0080syscon¬ÿ«€ 0[qos@ffab8000syscon¬ÿ«€ 0\qos@ffac0000syscon¬ÿ¬ 0]qos@ffac0080syscon¬ÿ¬€ 0^qos@ffac8000syscon¬ÿ¬€ 0kqos@ffac8080syscon¬ÿ¬€€ 0lqos@ffad0000syscon¬ÿ­ 0mqos@ffad8080syscon¬ÿ­€€ qos@ffae0000syscon¬ÿ® 0_power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¬ÿ1power-controller!rockchip,rk3399-power-controllerÁ+0pd_iep@34¬"ÑáÝÕYpd_rga@33¬!ÑÜåÕZ[pd_vcodec@31¬ÑëêÕ\pd_vdu@32¬ ÑíìÕ]^pd_gpu@35¬#ÑÐÕ_pd_edp@25¬Ñlpd_emmc@23¬ÑðÕ`pd_gmac@22¬ÑÕfÕapd_sd@27¬ÑÎLÕbpd_sdioaudio@28¬ÑîÕcpd_usb3@24¬ÑôÕdepd_vio@15¬+pd_hdcp@21¬ÑÞçrÕfpd_isp0@19¬ÑåßÕghpd_isp1@20¬ÑæàÕijpd_tcpc0@RK3399_PD_TCPC0¬Ñ~}pd_tcpc1@RK3399_PD_TCPC1¬ Ñ€pd_vo@16¬+pd_vopb@17¬ÑÙÙÕklpd_vopl@18¬ÑÛÛÕmsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¬ÿ2+0…io-domains&rockchip,rk3399-pmu-io-voltage-domainÁokayÜnspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ5Ñoo spiclkapb_pclk¥<�Ûdefaultépqrs+ Ádisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿ7Ñoo" baudclkapb_pclk¥f·ÁÛdefaultét Ádisabledi2c@ff3c0000rockchip,rk3399-i2c¬ÿ<�#o Ñ ëÂÑo o  i2cpclk¥9Ûdefaultéu+Áokayˆ¨ŸÇ€pmic@1brockchip,rk808¬ v¥ê×xin32krk808-clkout2Ûdefaultéwë x&x2x>xJxVxbynxzx‡x”y¡zregulatorsDCDC_REG1 ®vdd_center½ q°Õ™píqregulator-state-mem(DCDC_REG2 ®vdd_cpu_l½ q°Õ™píq0 regulator-state-mem(DCDC_REG3®vcc_ddrregulator-state-memADCDC_REG4®vcc_1v8½w@Õw@0nregulator-state-memAYw@LDO_REG1 ®vcc_ldo1½w@Õw@regulator-state-mem(LDO_REG2 ®vcc1v8_hdmi½w@Õw@regulator-state-mem(LDO_REG3 ®vcc1v8_pmu½w@Õw@0zregulator-state-memAYw@LDO_REG4®vcc_sd½w@Õ-ÆÀ0regulator-state-memAY-ÆÀLDO_REG5 ®vcc_ldo5½-ÆÀÕ-ÆÀregulator-state-mem(LDO_REG6 ®vcc_ldo6½ã`Õã`regulator-state-mem(LDO_REG7 ®vcc0v9_hdmi½ » Õ » regulator-state-mem(LDO_REG8 ®vcc_efuse½w@Õw@regulator-state-mem(SWITCH_REG1 ®vcc3v3_s3regulator-state-mem(SWITCH_REG2 ®vcc3v3_s0regulator-state-mem(regulator@60 fcs,fan53555¬`u®vdd_gpu½ 'ÀÕÄ°íè’xi2c@ff3d0000rockchip,rk3399-i2c¬ÿ=#o Ñ ëÂÑo o  i2cpclk¥8Ûdefaulté{+ÁokayÇ€codec@a fsl,sgtl5000¬ Ñ|=}©}¶~Áokay0¯i2c@ff3e0000rockchip,rk3399-i2c¬ÿ>#o Ñ ëÂÑo o  i2cpclk¥:Ûdefaulté+ÁokayÇ€regulator@60 fcs,fan53555¬`’x ®vdd_cpu_b½ 'ÀÕÄ°íèu0pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿBÂÛdefaulté€Ño pwmÁokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿBÂÛdefaultéÑo pwm Ádisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB ÂÛdefaulté‚Ño pwmÁokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB0ÂÛdefaultéƒÑo pwm Ádisabledvideo-codec@ff650000rockchip,rk3399-vpu¬ÿe ¥rq FvepuvdpuÑëê  aclkhclkÍ„iommu@ff650800rockchip,iommu¬ÿe@¥sFvpu_mmuÑëê  aclkifaceÔ0„iommu@ff660480rockchip,iommu ¬ÿf€@ÿfÀ@¥u Fvdec_mmuÑíì  aclkifaceÔ Ádisablediommu@ff670800rockchip,iommu¬ÿg@¥*Fiep_mmuÑáÝ  aclkifaceÔ Ádisabledrga@ff680000rockchip,rk3399-rga¬ÿh¥7ÑÜåm aclkhclksclk®jgi µcoreaxiahb!efuse@ff690000rockchip,rk3399-efuse¬ÿi€+Ñ}  pclk_efusecpu-id@7¬cpu-leakage@17¬gpu-leakage@18¬center-leakage@19¬cpu-leakage@1a¬logic-leakage@1b¬wafer-info@1c¬pmu-clock-controller@ff750000rockchip,rk3399-pmucru¬ÿu…êá#oÑ(Jñ0oclock-controller@ff760000rockchip,rk3399-cru¬ÿvêá€#ÀÀ@ÂÁBÉÂCãÞx@Ñ#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂ0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¬ÿw+0io-domains"rockchip,rk3399-io-voltage-domainÁokayînûn  nusb2-phy@e450rockchip,rk3399-usb2phy¬äPÑ{ phyclkê×clk_usbphy0_480mÁokay0&host-port %¥ FlinestateÁokayW†0'otg-port %0¥ghjFotg-bvalidotg-idlinestate Ádisabled0*usb2-phy@e460rockchip,rk3399-usb2phy¬ä`Ñ| phyclkê×clk_usbphy1_480mÁokay0(host-port %¥ FlinestateÁokayW‡0)otg-port %0¥lmoFotg-bvalidotg-idlinestateÁokay0,phy@f780rockchip,rk3399-emmc-phy¬÷€$ш emmcclk %Áokay 0!0%pcie-phyrockchip,rk3399-pcie-phyÑŠ refclk %®‡ 02µphyÁokay0phy@ff7c0000rockchip,rk3399-typec-phy¬ÿ|Ñ~} tcpdcoretcpdphy-ref#~Ñúð€®•”Lµuphyuphy-pipeuphy-tcphyÁokaydp-port %0.usb3-port %0+phy@ff800000rockchip,rk3399-typec-phy¬ÿ€Ñ€ tcpdcoretcpdphy-ref#€Ñúð€ ®œMµuphyuphy-pipeuphy-tcphyÁokaydp-port %0/usb3-port %0-watchdog@ff848000 snps,dw-wdt¬ÿ„€Ñ|¥xrktimer@ff850000rockchip,rk3399-timer¬ÿ…¥QÑhZ  pclktimerspdif@ff870000rockchip,rk3399-spdif¬ÿ‡¥BÎOÓtx  mclkhclkÑU×Ûdefaulté‰= Ádisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿˆ¥'ÎOOÓtxrx i2s_clki2s_hclkÑVÔÛdefaultéŠ=Áokay D _0°i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿ‰¥(ÎOOÓtxrx i2s_clki2s_hclkÑWÕÛdefaulté‹= Ádisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿŠ¥)ÎOOÓtxrx i2s_clki2s_hclkÑXÖ= Ádisabled0˜vop@ff8f0000rockchip,rk3399-vop-lit¬ÿ>ü¥w#ÛÛÑׄõáÑÛµÛ aclk_vopdclk_vophclk_vopÍŒ® µaxiahbdclkÁokayport+0endpoint@0¬N0žendpoint@1¬NŽ0£endpoint@2¬N0œendpoint@3¬N0 endpoint@4¬N‘01iommu@ff8f3f00rockchip,iommu¬ÿ?¥w Fvopl_mmuÑÛÛ  aclkifaceÔÁokay0Œvop@ff900000rockchip,rk3399-vop-big¬ÿ>ü¥v#ÙÙÑׄõáÑÙ´Ù aclk_vopdclk_vophclk_vopÍ’® µaxiahbdclkÁokayport+0endpoint@0¬N“0¢endpoint@1¬N”0endpoint@2¬N•0›endpoint@3¬N–0Ÿendpoint@4¬N—00iommu@ff903f00rockchip,iommu¬ÿ?¥v Fvopb_mmuÑÙÙ  aclkifaceÔÁokay0’iommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P¥+ Fisp0_mmuÑéã  aclkifaceÔ yiommu@ff924000rockchip,iommu ¬ÿ’@ÿ’P¥, Fisp1_mmuÑêä  aclkifaceÔ yhdmi-soundsimple-audio-card ”i2s ­ Çhdmi-sound Ádisabledsimple-audio-card,cpu Þ˜simple-audio-card,codec Þ™hdmi@ff940000rockchip,rk3399-dw-hdmi¬ÿ”¥(Ñtqop iahbisfrvpllgrfcecÁ=Áokay èš0™portsport+endpoint@0¬N›0•endpoint@1¬Nœ0mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€¥- Ñ¢p£o refpclkphy_cfggrf®ûµapb+ Ádisabledports+port@0¬+endpoint@0¬N0”endpoint@1¬Nž0mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€€¥. Ñ¢q¤o refpclkphy_cfggrf®üµapb+ Ádisabledports+port@0¬+endpoint@0¬NŸ0–endpoint@1¬N 0edp@ff970000rockchip,rk3399-edp¬ÿ—€¥ Ñjlo  dppclkgrfÛdefaulté¡®µdp Ádisabledports+port@0¬+endpoint@0¬N¢0“endpoint@1¬N£0Žgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¬ÿš0¥ FjobmmugpuÑÐ# Ádisabled¤pinctrlrockchip,rk3399-pinctrl ô…+÷Ûdefaulté¥gpio0@ff720000rockchip,gpio-bank¬ÿrÑo¥  ó0gpio1@ff730000rockchip,gpio-bank¬ÿsÑo¥  ó0vgpio2@ff780000rockchip,gpio-bank¬ÿxÑP¥  ó0­gpio3@ff788000rockchip,gpio-bank¬ÿx€ÑQ¥  ó0gpio4@ff790000rockchip,gpio-bank¬ÿyÑR¥  ó0pcfg-pull-up 0©pcfg-pull-down *0ªpcfg-pull-none 90¦pcfg-pull-none-12ma 9 F 0¨pcfg-pull-none-13ma 9 F 0§pcfg-pull-none-18ma 9 Fpcfg-pull-none-20ma 9 Fpcfg-pull-up-2ma  Fpcfg-pull-up-8ma  Fpcfg-pull-up-18ma  Fpcfg-pull-up-20ma  Fpcfg-pull-down-4ma * Fpcfg-pull-down-8ma * Fpcfg-pull-down-12ma * F pcfg-pull-down-18ma * Fpcfg-pull-down-20ma * Fpcfg-output-high Upcfg-output-low aclockclk-32k l¦edpedp-hpd l¦0¡gmacrgmii-pinsð l§¦ ¦ § ¦ ¦¦¦¦§§¦¦§§0rmii-pins  l ¦ § ¦ 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compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesvqmmcbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyVDDA-supplyVDDIO-supplyVDDD-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendturbo-modelabellinux,default-triggerpanic-indicatorenable-active-lowstdout-pathbitclock-masterframe-masterenable-active-high