Ð þíÖ¾8ËT( jË&friendlyarm,nanopi-m4rockchip,rk3399 +7FriendlyElec NanoPi M4aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcpu@0 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@1 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@2 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@3 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@100 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0cpu@101 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0idle-states8pscicpu-sleeparm,idle-stateEVmx~úŽ„0 cluster-sleeparm,idle-stateEVm~ôŽÐ0 display-subsystemrockchip,display-subsystemŸpmu_a53arm,cortex-a53-pmu¥pmu_a72arm,cortex-a72-pmu¥psci arm,psci-1.0·smctimerarm,armv8-timer@¥   °xin24m fixed-clockÇn6×xin24mêamba simple-bus+÷dma-controller@ff6d0000arm,pl330arm,primecell¬ÿm@ ¥þÑÓ  apb_pclk0\dma-controller@ff6e0000arm,pl330arm,primecell¬ÿn@ ¥þÑÔ  apb_pclk0Kpcie@f8000000rockchip,rk3399-pcie ¬øýaxi-baseapb-base+0<� ÑÅÄG  aclkaclk-perfhclkpm0¥123FsyslegacyclientV`iwˆ— Ÿ,¤pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38÷ƒúúàûàûà8®‚ƒ„…†€(µcoremgmtmgmt-stickypipepmpclkaclkÁokay ÈÑinterrupt-controllerÛ0ethernet@fe300000rockchip,rk3399-gmac¬þ0¥ Fmacirq8ÑighfjÕfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac𮉠µstmmacethþÁokay "¦2input?default MWbrgmiikv Œ'u0 ¡±(ºmdiosnps,dwmac-mdio+phy@1¬ ¥ 0dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ1@¥@ÃðÑ€ ÑîMœ biuciuciu-driveciu-sampleÑð®yµresetÁokayÜæ÷ %?default M!"#3dwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ2@¥AÃðÑ€"ÍA ë ÑÎLš› biuciuciu-driveciu-sampleÑð®zµresetÁokayÜæV h$q?defaultM%&'(3|)ˆ*sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1¬þ3¥ •"NA ëÂÑNð clk_xinclk_ahb×emmc_cardclockêŸ+ ¤phy_arasanð«Áokayܼ%0”usb@fe380000 generic-ehci¬þ8¥ÑÈÉ, usbhostarbiterutmiŸ-¤usbÁokayusb@fe3a0000 generic-ohci¬þ:¥ÑÈÉ, usbhostarbiterutmiŸ-¤usbÁokayusb@fe3c0000 generic-ehci¬þ<�¥ÑÊË. usbhostarbiterutmiŸ/¤usbÁokayusb@fe3e0000 generic-ohci¬þ>¥ ÑÊË. usbhostarbiterutmiŸ/¤usbÁokayusb@fe800000rockchip,rk3399-dwc3+÷0сƒöøôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®% µusb3-otgÁokayusb@fe800000 snps,dwc3¬þ€¥iсöƒ refbus_earlysuspendËotgŸ01¤usb2-phyusb3-phy Óutmi_wideÜô.OðÁokayusb@fe900000rockchip,rk3399-dwc3+÷0Ñ‚„÷øôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®& µusb3-otgÁokayusb@fe900000 snps,dwc3¬þ¥nÑ‚÷„ refbus_earlysuspendËhostŸ23¤usb2-phyusb3-phy Óutmi_wideÜô.OðÁokaydp@fec00000rockchip,rk3399-cdn-dp¬þÀ¥ "r¡Aõá ë Ñru¡o core-clkpclkspdifgrfŸ45ð ®HJýµspdifdptxapbcoreþq Ádisabledportsport+endpoint@0¬‚60£endpoint@1¬‚70interrupt-controller@fee00000 arm,gic-v3+÷ÛP¬þàþð ÿðÿñÿò¥ 0interrupt-controller@fee20000arm,gic-v3-its’¬þâ0ppi-partitionsinterrupt-partition-0¡0interrupt-partition-1¡0saradc@ff100000rockchip,rk3399-saradc¬ÿ¥>ªÑPe saradcapb_pclk®Ô µsaradc-apbÁokay¼8i2c@ff110000rockchip,rk3399-i2c¬ÿ"AA ëÂÑAU  i2cpclk¥;?defaultM9+ÁokayÇ @È–ßi2c@ff120000rockchip,rk3399-i2c¬ÿ"BA ëÂÑBV  i2cpclk¥#?defaultM:+Áokayi2c@ff130000rockchip,rk3399-i2c¬ÿ"CA ëÂÑCW  i2cpclk¥"?defaultM;+ Ádisabledi2c@ff140000rockchip,rk3399-i2c¬ÿ"DA ëÂÑDX  i2cpclk¥&?defaultM<�+ Ádisabledi2c@ff150000rockchip,rk3399-i2c¬ÿ"EA ëÂÑEY  i2cpclk¥%?defaultM=+ Ádisabledi2c@ff160000rockchip,rk3399-i2c¬ÿ"FA ëÂÑFZ  i2cpclk¥$?defaultM>+Áokay0¦serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑQ` baudclkapb_pclk¥c÷?default M?@AÁokaybluetoothbrcm,bcm43438-btÑB lpo  "$ 4$ C= ?default MCDEMFYGserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑRa baudclkapb_pclk¥b÷?defaultMH Ádisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑSb baudclkapb_pclk¥d÷?defaultMIÁokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑTc baudclkapb_pclk¥e÷?defaultMJ Ádisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑG[ spiclkapb_pclk¥DfK K ktxrx?defaultMLMNO+ Ádisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑH\ spiclkapb_pclk¥5fK K ktxrx?defaultMPQRS+ Ádisabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑI] spiclkapb_pclk¥4fKKktxrx?defaultMTUVW+ Ádisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑJ^ spiclkapb_pclk¥CfKKktxrx?defaultMXYZ[+ Ádisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ ÑK_ spiclkapb_pclk¥„f\\ ktxrx?defaultM]^_`ð+ Ádisabledthermal-zonescpuud‹è™atripscpu_alert0©pµÐ§passive0bcpu_alert1©$øµÐ§passive0ccpu_crit©sµÐ §criticalcooling-mapsmap0ÀbÅÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ÀcHÅÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpuud‹è™atripsgpu_alert0©$øµÐ§passivegpu_crit©sµÐ §criticaltsadc@ff260000rockchip,rk3399-tsadc¬ÿ&¥a"OA q°ÑOd tsadcapb_pclk®è µtsadc-apbþÔs?initdefaultsleepMdëeõdÿÁokay,0aqos@ffa58000syscon¬ÿ¥€ 0mqos@ffa5c000syscon¬ÿ¥À 0nqos@ffa60080syscon¬ÿ¦€ qos@ffa60100syscon¬ÿ¦ qos@ffa60180syscon¬ÿ¦€ qos@ffa70000syscon¬ÿ§ 0qqos@ffa70080syscon¬ÿ§€ 0rqos@ffa74000syscon¬ÿ§@ 0oqos@ffa76000syscon¬ÿ§` 0pqos@ffa90000syscon¬ÿ© 0sqos@ffa98000syscon¬ÿ©€ 0fqos@ffaa0000syscon¬ÿª 0tqos@ffaa0080syscon¬ÿª€ 0uqos@ffaa8000syscon¬ÿª€ 0vqos@ffaa8080syscon¬ÿª€€ 0wqos@ffab0000syscon¬ÿ« 0gqos@ffab0080syscon¬ÿ«€ 0hqos@ffab8000syscon¬ÿ«€ 0iqos@ffac0000syscon¬ÿ¬ 0jqos@ffac0080syscon¬ÿ¬€ 0kqos@ffac8000syscon¬ÿ¬€ 0xqos@ffac8080syscon¬ÿ¬€€ 0yqos@ffad0000syscon¬ÿ­ 0zqos@ffad8080syscon¬ÿ­€€ qos@ffae0000syscon¬ÿ® 0lpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¬ÿ1power-controller!rockchip,rk3399-power-controllerG+0pd_iep@34¬"ÑáÝ[fpd_rga@33¬!ÑÜå[ghpd_vcodec@31¬Ñëê[ipd_vdu@32¬ Ñíì[jkpd_gpu@35¬#ÑÐ[lpd_edp@25¬Ñlpd_emmc@23¬Ñð[mpd_gmac@22¬ÑÕf[npd_sd@27¬ÑÎL[opd_sdioaudio@28¬Ñî[ppd_usb3@24¬Ñô[qrpd_vio@15¬+pd_hdcp@21¬ÑÞçr[spd_isp0@19¬Ñåß[tupd_isp1@20¬Ñæà[vwpd_tcpc0@RK3399_PD_TCPC0¬Ñ~}pd_tcpc1@RK3399_PD_TCPC1¬ Ñ€pd_vo@16¬+pd_vopb@17¬ÑÙÙ[xypd_vopl@18¬ÑÛÛ[zsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¬ÿ2+0io-domains&rockchip,rk3399-pmu-io-voltage-domainÁokayb{spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ5Ñ|| spiclkapb_pclk¥<�?defaultM}~€+ Ádisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿ7Ñ||" baudclkapb_pclk¥f÷?defaultM Ádisabledi2c@ff3c0000rockchip,rk3399-i2c¬ÿ<�"| A ëÂÑ| |  i2cpclk¥9?defaultM‚+ÁokayǀȠßregulator@40silergy,syr827¬@q?defaultMƒŽ¢´ ß4Ìã` ävdd_cpu_bóèF0regulator-state-memregulator@41silergy,syr828¬Aq?defaultM„Ž¢´ ß4Ìã`ävdd_gpuóèF0²regulator-state-mempmic@1brockchip,rk808¬×xin32krtc_clko_wifiê …¥?defaultM†,M[FgFsFF‹F—F£F¯F»FÈFÕFY{0BregulatorsDCDC_REG1Ž¢´ q°Ì™p ävdd_centeróqregulator-state-memDCDC_REG2Ž¢´ q°Ì™p ävdd_cpu_lóq0 regulator-state-memDCDC_REG3Ž¢ävcc_ddrregulator-state-memâDCDC_REG4Ž¢´w@Ìw@ävcc_1v80Gregulator-state-memâúw@LDO_REG1Ž¢´w@Ìw@ ävcc1v8_camregulator-state-memLDO_REG2Ž¢´-ÆÀÌ-ÆÀ ävcc3v0_touchregulator-state-memLDO_REG3Ž¢´w@Ìw@ävcc1v8_pmupllregulator-state-memâúw@LDO_REG4Ž¢ -ÆÀ´w@Ì2Z  ävcc_sdio0*regulator-state-memâú-ÆÀLDO_REG5Ž¢´-ÆÀÌ-ÆÀävcca3v0_codecregulator-state-memLDO_REG6Ž¢´ã`Ìã`ävcc_1v5regulator-state-memâúã`LDO_REG7Ž¢´w@Ìw@ävcca1v8_codec0‘regulator-state-memLDO_REG8Ž¢´-ÆÀÌ-ÆÀävcc_3v00{regulator-state-memâú-ÆÀSWITCH_REG1Ž¢ ävcc3v3_s30regulator-state-memSWITCH_REG2Ž¢ ävcc3v3_s0regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c¬ÿ="| A ëÂÑ| |  i2cpclk¥8?defaultM‡+ÁokayǀȠßtypec-portc@22 fcs,fusb302¬" …¥?defaultMˆ /‰i2c@ff3e0000rockchip,rk3399-i2c¬ÿ>"| A ëÂÑ| |  i2cpclk¥:?defaultMŠ+ Ádisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB ;?defaultM‹Ñ| pwmÁokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB ;?defaultMŒÑ| pwmÁokaypwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB  ;?activeMÑ| pwmÁokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¬ÿB0 ;?defaultMŽÑ| pwm Ádisabledvideo-codec@ff650000rockchip,rk3399-vpu¬ÿe ¥rq FvepuvdpuÑëê  aclkhclk Fðiommu@ff650800rockchip,iommu¬ÿe@¥sFvpu_mmuÑëê  aclkiface Mð0iommu@ff660480rockchip,iommu ¬ÿf€@ÿfÀ@¥u Fvdec_mmuÑíì  aclkiface M Ádisablediommu@ff670800rockchip,iommu¬ÿg@¥*Fiep_mmuÑáÝ  aclkiface M Ádisabledrga@ff680000rockchip,rk3399-rga¬ÿh¥7ÑÜåm aclkhclksclk®jgi µcoreaxiahbð!efuse@ff690000rockchip,rk3399-efuse¬ÿi€+Ñ}  pclk_efusecpu-id@7¬cpu-leakage@17¬gpu-leakage@18¬center-leakage@19¬cpu-leakage@1a¬logic-leakage@1b¬wafer-info@1c¬pmu-clock-controller@ff750000rockchip,rk3399-pmucru¬ÿuþê Z"|A(Jñ0|clock-controller@ff760000rockchip,rk3399-cru¬ÿvþê Z€"ÀÀ@ÂÁBÉÂCãÞx@A#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂ0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¬ÿw+0io-domains"rockchip,rk3399-io-voltage-domainÁokay gG t‘ * Ž{usb2-phy@e450rockchip,rk3399-usb2phy¬äPÑ{ phyclkê×clk_usbphy0_480mÁokay0,host-port ž¥ FlinestateÁokayk’0-otg-port ž0¥ghjFotg-bvalidotg-idlinestateÁokay00usb2-phy@e460rockchip,rk3399-usb2phy¬ä`Ñ| phyclkê×clk_usbphy1_480mÁokay0.host-port ž¥ FlinestateÁokayk“0/otg-port ž0¥lmoFotg-bvalidotg-idlinestateÁokay02phy@f780rockchip,rk3399-emmc-phy¬÷€$Ñ” emmcclk žÁokay0+pcie-phyrockchip,rk3399-pcie-phyÑŠ refclk ž®‡ ©2µphyÁokay §Aõá"Š0phy@ff7c0000rockchip,rk3399-typec-phy¬ÿ|Ñ~} tcpdcoretcpdphy-ref"~Aúð€ð®•”Lµuphyuphy-pipeuphy-tcphyþÁokaydp-port ž04usb3-port ž01phy@ff800000rockchip,rk3399-typec-phy¬ÿ€Ñ€ tcpdcoretcpdphy-ref"€Aúð€ð ®œMµuphyuphy-pipeuphy-tcphyþÁokaydp-port ž05usb3-port ž03watchdog@ff848000 snps,dw-wdt¬ÿ„€Ñ|¥xrktimer@ff850000rockchip,rk3399-timer¬ÿ…¥QÑhZ  pclktimerspdif@ff870000rockchip,rk3399-spdif¬ÿ‡¥Bf\ktx  mclkhclkÑU×?defaultM•ðq Ádisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿˆþ¥'f\\ktxrx i2s_clki2s_hclkÑVÔ?defaultM–ðq Ádisabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿ‰¥(f\\ktxrx i2s_clki2s_hclkÑWÕ?defaultM—ðq Ádisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿŠ¥)f\\ktxrx i2s_clki2s_hclkÑXÖðq Ádisabled0¤vop@ff8f0000rockchip,rk3399-vop-lit¬ÿ>ü¥w"ÛÛAׄõáÑÛµÛ aclk_vopdclk_vophclk_vop F˜ð® µaxiahbdclkÁokayport+0endpoint@0¬‚™0«endpoint@1¬‚š0°endpoint@2¬‚›0©endpoint@3¬‚œ0­endpoint@4¬‚07iommu@ff8f3f00rockchip,iommu¬ÿ?¥w Fvopl_mmuÑÛÛ  aclkifaceð MÁokay0˜vop@ff900000rockchip,rk3399-vop-big¬ÿ>ü¥v"ÙÙAׄõáÑÙ´Ù aclk_vopdclk_vophclk_vop Fžð® µaxiahbdclkÁokayport+0endpoint@0¬‚Ÿ0¯endpoint@1¬‚ 0ªendpoint@2¬‚¡0¨endpoint@3¬‚¢0¬endpoint@4¬‚£06iommu@ff903f00rockchip,iommu¬ÿ?¥v Fvopb_mmuÑÙÙ  aclkifaceð MÁokay0žiommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P¥+ Fisp0_mmuÑéã  aclkiface Mð ½iommu@ff924000rockchip,iommu ¬ÿ’@ÿ’P¥, Fisp1_mmuÑêä  aclkiface Mð ½hdmi-soundsimple-audio-card Øi2s ñ hdmi-sound Ádisabledsimple-audio-card,cpu "¤simple-audio-card,codec "¥hdmi@ff940000rockchip,rk3399-dw-hdmi¬ÿ”¥(Ñtqop iahbisfrvpllgrfcecðþqÁokay ,¦?defaultM§0¥portsport+endpoint@0¬‚¨0¡endpoint@1¬‚©0›mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€¥- Ñ¢p£o refpclkphy_cfggrfð®ûµapbþ+ Ádisabledports+port@0¬+endpoint@0¬‚ª0 endpoint@1¬‚«0™mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€€¥. Ñ¢q¤o refpclkphy_cfggrfð®üµapbþ+ Ádisabledports+port@0¬+endpoint@0¬‚¬0¢endpoint@1¬‚­0œedp@ff970000rockchip,rk3399-edp¬ÿ—€¥ Ñjlo  dppclkgrf?defaultM®ð®µdpþ Ádisabledports+port@0¬+endpoint@0¬‚¯0Ÿendpoint@1¬‚°0šgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¬ÿš0¥ FjobmmugpuÑÐð#Áokay± 8²pinctrlrockchip,rk3399-pinctrlþ D+÷gpio0@ff720000rockchip,gpio-bank¬ÿrÑ|¥ Q aÛ0$gpio1@ff730000rockchip,gpio-bank¬ÿsÑ|¥ Q aÛ0…gpio2@ff780000rockchip,gpio-bank¬ÿxÑP¥ Q aÛ0gpio3@ff788000rockchip,gpio-bank¬ÿx€ÑQ¥ Q aÛ0gpio4@ff790000rockchip,gpio-bank¬ÿyÑR¥ Q aÛpcfg-pull-up m0¶pcfg-pull-down z0·pcfg-pull-none ‰0³pcfg-pull-none-12ma ‰ – 0µpcfg-pull-none-13ma ‰ – 0´pcfg-pull-none-18ma ‰ –pcfg-pull-none-20ma ‰ –pcfg-pull-up-2ma m –pcfg-pull-up-8ma m –pcfg-pull-up-18ma m –pcfg-pull-up-20ma m –pcfg-pull-down-4ma z –pcfg-pull-down-8ma z –pcfg-pull-down-12ma z – pcfg-pull-down-18ma z –pcfg-pull-down-20ma z –pcfg-output-high ¥pcfg-output-low ±clockclk-32k ¼³edpedp-hpd ¼³0®gmacrgmii-pinsð ¼´³ ³ ´ ³ ³³³³´´³³´´0rmii-pins  ¼ ³ ´ ³ ³ ³³³³´´i2c0i2c0-xfer ¼³³0‚i2c1i2c1-xfer ¼³³09i2c2i2c2-xfer ¼µµ0:i2c3i2c3-xfer ¼³³0;i2c4i2c4-xfer ¼ ³ ³0‡i2c5i2c5-xfer ¼ ³ ³0<�i2c6i2c6-xfer ¼ ³ ³0=i2c7i2c7-xfer ¼³³0>i2c8i2c8-xfer ¼³³0Ši2s0i2s0-2ch-bus` ¼³³³³³³i2s0-8ch-bus ¼³³³³³³³³³0–i2s1i2s1-2ch-busP ¼³³³³³0—sdio0sdio0-bus1 ¼¶sdio0-bus4@ ¼¶¶¶¶0!sdio0-cmd ¼¶0"sdio0-clk ¼³0#sdio0-cd ¼¶sdio0-pwr ¼¶sdio0-bkpwr ¼¶sdio0-wp ¼¶sdio0-int ¼¶sdmmcsdmmc-bus1 ¼¶sdmmc-bus4@ ¼¶ ¶ ¶ ¶0%sdmmc-clk ¼ ³0&sdmmc-cmd ¼ ¶0'sdmmc-cd ¼¶sdmmc-wp ¼¶sdmmc0-det-l ¼¶0(sdmmc0-pwr-h ¼³0ºsleepap-pwroff ¼³ddrio-pwroff ¼³spdifspdif-bus ¼³0•spdif-bus-1 ¼³spi0spi0-clk ¼¶0Lspi0-cs0 ¼¶0Ospi0-cs1 ¼¶spi0-tx ¼¶0Mspi0-rx ¼¶0Nspi1spi1-clk ¼ ¶0Pspi1-cs0 ¼ ¶0Sspi1-rx ¼¶0Rspi1-tx ¼¶0Qspi2spi2-clk ¼ ¶0Tspi2-cs0 ¼ ¶0Wspi2-rx ¼ ¶0Vspi2-tx ¼ ¶0Uspi3spi3-clk ¼¶0}spi3-cs0 ¼¶0€spi3-rx ¼¶0spi3-tx ¼¶0~spi4spi4-clk ¼¶0Xspi4-cs0 ¼¶0[spi4-rx ¼¶0Zspi4-tx ¼¶0Yspi5spi5-clk ¼¶0]spi5-cs0 ¼¶0`spi5-rx ¼¶0_spi5-tx ¼¶0^testclktest-clkout0 ¼³test-clkout1 ¼³test-clkout2 ¼³tsadcotp-gpio ¼³0dotp-out ¼³0euart0uart0-xfer ¼¶³0?uart0-cts ¼³0Auart0-rts ¼³0@uart1uart1-xfer ¼ ¶ ³0Huart2auart2a-xfer ¼¶ ³uart2buart2b-xfer ¼¶³uart2cuart2c-xfer ¼¶³0Iuart3uart3-xfer ¼¶³0Juart3-cts ¼³uart3-rts ¼³uart4uart4-xfer ¼¶³0uarthdcpuarthdcp-xfer ¼¶³pwm0pwm0-pin ¼³0‹pwm0-pin-pull-down ¼·vop0-pwm-pin ¼³vop1-pwm-pin ¼³pwm1pwm1-pin ¼³0Œpwm1-pin-pull-down ¼·pwm2pwm2-pin ¼³pwm2-pin-pull-down ¼·0pwm3apwm3a-pin ¼³0Žpwm3bpwm3b-pin ¼³hdmihdmi-i2c-xfer ¼³³hdmi-cec ¼³0§pciepci-clkreqn-cpm ¼³pci-clkreqnb-cpm ¼³fusb30xfusb0-int ¼¶0ˆgpio-ledsleds-gpio ¼ ³0¼phyphy-intb ¼ ¶0phy-rstb ¼³0pmiccpu-b-sleep ¼·0ƒgpu-sleep ¼·0„pmic-int-l ¼¶0†rockchip-keypower-key ¼¶0»sdiobt-host-wake-l ¼³0Dbt-reg-on-h ¼ ³0Cbt-wake-l ¼³0Ewifi-reg_on-h ¼ ³0½opp-table0operating-points-v2 Ê0 opp00 ÕQ– Ü 5 êœ@opp01 Õ#ÃF Ü 5opp02 Õ0£, Ü øPopp03 Õ<Ü ÜHopp04 ÕG†Œ ÜB@opp05 ÕTfr Ü*ˆopp-table1operating-points-v2 Ê0 opp00 ÕQ– Ü 5 êœ@opp01 Õ#ÃF Ü 5opp02 Õ0£, Ü –¨opp03 Õ<Ü Ü Yøopp04 ÕG†Œ Ü~ðopp05 ÕTfr Ü£èopp06 Õ_Ø" ÜÈàopp07 ÕkIÒ ÜO€opp-table2operating-points-v20±opp00 Õ ëÂ Ü 5opp01 Õ³Ü@ Ü 5opp02 Õׄ Ü –¨opp03 ÕÍe Ü Yøopp04 Õ#ÃF ÜHopp05 Õ/¯ ÜÈàchosen ûserial2:1500000n8external-gmac-clock fixed-clockÇsY@ ×clkin_gmacê0vcc3v3-sysregulator-fixedŽ¢´2Z Ì2Z  ävcc3v3_sys¸0Fvcc5v0-sysregulator-fixedŽ¢´LK@ÌLK@ ävcc5v0_sys¹0¾vcc1v8-s3regulator-fixedŽ¢´w@Ìw@ ävcc1v8_s3G08vcc3v0-sdregulator-fixed  ¬$?defaultMºŽ´-ÆÀÌ-ÆÀ ävcc3v0_sdF0)vbus-typecregulator-fixed´LK@ÌLK@ ävbus_typecŽ¹0‰gpio-keys gpio-keys ?defaultM»power %d Ë$ 7GPIO Key Power =tMgpio-leds gpio-leds?defaultM¼status Ë$  7status_led Hheartbeatsdio-pwrseqmmc-pwrseq-simpleÑB  ext_clock?defaultM½ ^$ 0 vdd-5vregulator-fixedävdd_5vŽ¢0¹vcc5v0-coreregulator-fixed ävcc5v0_coreŽ¢¹0¸vcc5v0-usb1regulator-fixed ävcc5v0_usb1Ž¢¾0’vcc5v0-usb2regulator-fixed ävcc5v0_usb2Ž¢¾0“ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanesinterrupt-controllerpower-domainsrockchip,grfassigned-clock-parentsassigned-clocksclock_in_outpinctrl-namespinctrl-0phy-handlephy-modephy-supplysnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltregulator-init-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highautorepeatdebounce-intervallabellinux,codelinux,default-triggerreset-gpios