Ð þíæœ8Ú4( hÙüRgoogle,scarlet-rev15-sku6google,scarlet-rev15google,scarlet-rev14-sku6google,scarlet-rev14google,scarlet-rev13-sku6google,scarlet-rev13google,scarlet-rev12-sku6google,scarlet-rev12google,scarlet-rev11-sku6google,scarlet-rev11google,scarlet-rev10-sku6google,scarlet-rev10google,scarlet-rev9-sku6google,scarlet-rev9google,scarlet-rev8-sku6google,scarlet-rev8google,scarlet-rev7-sku6google,scarlet-rev7google,scarlet-rev6-sku6google,scarlet-rev6google,scarlet-rev5-sku6google,scarlet-rev5google,scarlet-rev4-sku6google,scarlet-rev4google,scarletgoogle,grurockchip,rk3399 +7Google Scarletaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcpu@0 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@1 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@2 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@3 cpuarm,cortex-a53¬°psci¾åÑØçd  % 0cpu@100 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0cpu@101 cpuarm,cortex-a72¬°psci¾Ñ Øç´  %0idle-states8pscicpu-sleeparm,idle-stateEVmx~úŽ„0 cluster-sleeparm,idle-stateEVm~ôŽÐ0 display-subsystemrockchip,display-subsystemŸpmu_a53arm,cortex-a53-pmu¥pmu_a72arm,cortex-a72-pmu¥psci arm,psci-1.0·smctimerarm,armv8-timer@¥   °xin24m fixed-clockÇn6×xin24mêamba simple-bus+÷dma-controller@ff6d0000arm,pl330arm,primecell¬ÿm@ ¥þÑÓ  apb_pclk0Udma-controller@ff6e0000arm,pl330arm,primecell¬ÿn@ ¥þÑÔ  apb_pclk0Cpcie@f8000000rockchip,rk3399-pcie ¬øýaxi-baseapb-base+0<� ÑÅÄG  aclkaclk-perfhclkpm0¥123FsyslegacyclientV`iwˆ— Ÿ,¤pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38÷ƒúúàûàûà8®‚ƒ„…†€(µcoremgmtmgmt-stickypipepmpclkaclkÁokay ÈÑdefaultßéù interrupt-controller,0pcie@0,0¬ƒ+÷ethernet@fe300000rockchip,rk3399-gmac¬þ0¥ Fmacirq8ÑighfjÕfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macA®‰ µstmmacethO Ádisableddwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ1@¥@\ðÑ€ ÑîMœ biuciuciu-driveciu-samplejA®yµreset Ádisableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc¬þ2@¥A\ðÑ€uÍ… ë ÑÎLš› biuciuciu-driveciu-samplejA®zµresetÁokayÑdefaultß !"š¤¶ Ç# ÐÛèõ$%sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1¬þ3¥ )uN…ðÑ€ÑNð clk_xinclk_ahb×emmc_cardclockêŸ& ¤phy_arasanA?ÁokayšP_y0†usb@fe380000 generic-ehci¬þ8¥ÑÈÉ' usbhostarbiterutmiŸ(¤usb Ádisabledusb@fe3a0000 generic-ohci¬þ:¥ÑÈÉ' usbhostarbiterutmiŸ(¤usbÁokay+bluetooth@1usbcf3,e300usb4ca,301a¬Ñdefaultß) #¥Fwakeupusb@fe3c0000 generic-ehci¬þ<�¥ÑÊË* usbhostarbiterutmiŸ+¤usb Ádisabledusb@fe3e0000 generic-ohci¬þ>¥ ÑÊË* usbhostarbiterutmiŸ+¤usb Ádisabledusb@fe800000rockchip,rk3399-dwc3+÷0сƒöøôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®% µusb3-otgÁokay‡,usb@fe800000 snps,dwc3¬þ€¥iсöƒ refbus_earlysuspendŽhostŸ-.¤usb2-phyusb3-phy –utmi_wideŸ·ØñAÁokayusb@fe900000rockchip,rk3399-dwc3+÷0Ñ‚„÷øôùG ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk®& µusb3-otg Ádisabledusb@fe900000 snps,dwc3¬þ¥nÑ‚÷„ refbus_earlysuspendŽotgŸ/0¤usb2-phyusb3-phy –utmi_wideŸ·ØñA Ádisableddp@fec00000rockchip,rk3399-cdn-dp¬þÀ¥ ur¡…õá ë Ñru¡o core-clkpclkspdifgrfŸ1A ®HJýµspdifdptxapbcoreO4Áokay‡,0Çportsport+endpoint@0¬E20•endpoint@1¬E30interrupt-controller@fee00000 arm,gic-v3+÷,P¬þàþð ÿðÿñÿò¥ 0interrupt-controller@fee20000arm,gic-v3-itsU¬þâ0ppi-partitionsinterrupt-partition-0d0interrupt-partition-1d0saradc@ff100000rockchip,rk3399-saradc¬ÿ¥>mÑPe saradcapb_pclk®Ô µsaradc-apb Ádisabledi2c@ff110000rockchip,rk3399-i2c¬ÿuA… ëÂÑAU  i2cpclk¥;Ñdefaultß4+ Ádisabledi2c@ff120000rockchip,rk3399-i2c¬ÿuB… ëÂÑBV  i2cpclk¥#Ñdefaultß5+ÁokayÇ€2—,digitizer@9 hid-over-i2c¬  #¥®Ñdefaultß67i2c@ff130000rockchip,rk3399-i2c¬ÿuC… ëÂÑCW  i2cpclk¥"Ñdefaultß8+ÁokayÇ€2—,touchscreen@10elan,ekth3500¬ #¥Ñdefaultß9: ½ i2c@ff140000rockchip,rk3399-i2c¬ÿuD… ëÂÑDX  i2cpclk¥&Ñdefaultß;+ Ádisabledi2c@ff150000rockchip,rk3399-i2c¬ÿuE… ëÂÑEY  i2cpclk¥%Ñdefaultß<�+ Ádisabledi2c@ff160000rockchip,rk3399-i2c¬ÿuF… ëÂÑFZ  i2cpclk¥$Ñdefaultß=>+ÁokayÇ€2—,serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑQ` baudclkapb_pclk¥cÉÓÑdefaultß? Ádisabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑRa baudclkapb_pclk¥bÉÓÑdefaultß@ Ádisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑSb baudclkapb_pclk¥dÉÓÑdefaultßAÁokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿÑTc baudclkapb_pclk¥eÉÓÑdefaultßB Ádisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑG[ spiclkapb_pclk¥DàC C åtxrxÑdefaultßDEFG+ Ádisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑH\ spiclkapb_pclk¥5àC C åtxrxÑdefaultsleepßHIJK+ÁokayïLspiflash@0jedec,spi-nor¬ù˜–€spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑI] spiclkapb_pclk¥4àCCåtxrxÑdefaultßMNOP+Áokayspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿÑJ^ spiclkapb_pclk¥CàCCåtxrxÑdefaultßQRST+ Ádisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ ÑK_ spiclkapb_pclk¥„àUU åtxrxÑdefaultßVWXYA+Áokayec@0google,cros-ec-spi¬ #¥ÑdefaultßZù-ÆÀi2c-tunnelgoogle,cros-ec-i2c-tunnel +sbs-battery@bsbs,sbs-battery¬ 1extcon@0google,extcon-usbc-cros-ecFY0,keyboard-controllergoogle,cros-ec-keybgw Š@¤};0DY1 d>"A#( C  \=@V B |)<?  · + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ithermal-zonescpu±dÇèÕ[tripscpu_alert0åÐñЧpassive0\cpu_alert1åXñЧpassive0]cpu_critåsñÐ §criticalcooling-mapsmap0ü\ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ü]Hÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu±dÇèÕ[tripsgpu_alert0å$øñЧpassivegpu_critåsñÐ §criticaltsadc@ff260000rockchip,rk3399-tsadc¬ÿ&¥auO… q°ÑOd tsadcapb_pclk®è µtsadc-apbOsÑinitdefaultsleepß^ï_'^1ÁokayG^0[qos@ffa58000syscon¬ÿ¥€ 0gqos@ffa5c000syscon¬ÿ¥À 0hqos@ffa60080syscon¬ÿ¦€ qos@ffa60100syscon¬ÿ¦ qos@ffa60180syscon¬ÿ¦€ qos@ffa70000syscon¬ÿ§ 0kqos@ffa70080syscon¬ÿ§€ 0lqos@ffa74000syscon¬ÿ§@ 0iqos@ffa76000syscon¬ÿ§` 0jqos@ffa90000syscon¬ÿ© 0mqos@ffa98000syscon¬ÿ©€ 0`qos@ffaa0000syscon¬ÿª 0nqos@ffaa0080syscon¬ÿª€ 0oqos@ffaa8000syscon¬ÿª€ 0pqos@ffaa8080syscon¬ÿª€€ 0qqos@ffab0000syscon¬ÿ« 0aqos@ffab0080syscon¬ÿ«€ 0bqos@ffab8000syscon¬ÿ«€ 0cqos@ffac0000syscon¬ÿ¬ 0dqos@ffac0080syscon¬ÿ¬€ 0eqos@ffac8000syscon¬ÿ¬€ 0rqos@ffac8080syscon¬ÿ¬€€ 0sqos@ffad0000syscon¬ÿ­ 0tqos@ffad8080syscon¬ÿ­€€ qos@ffae0000syscon¬ÿ® 0fpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¬ÿ1power-controller!rockchip,rk3399-power-controllery+0pd_iep@34¬"Ñáݍ`pd_rga@33¬!ÑÜåabpd_vcodec@31¬Ñëêcpd_vdu@32¬ Ñíìdepd_gpu@35¬#ÑЍfpd_edp@25¬Ñlpd_emmc@23¬Ñðgpd_gmac@22¬ÑÕfhpd_sd@27¬ÑÎLipd_sdioaudio@28¬Ñîjpd_usb3@24¬Ñôklpd_vio@15¬+pd_hdcp@21¬ÑÞçrmpd_isp0@19¬Ñåߍnopd_isp1@20¬Ñæàpqpd_tcpc0@RK3399_PD_TCPC0¬Ñ~}pd_tcpc1@RK3399_PD_TCPC1¬ Ñ€pd_vo@16¬+pd_vopb@17¬ÑÙٍrspd_vopl@18¬ÑÛۍtsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¬ÿ2+0…io-domains&rockchip,rk3399-pmu-io-voltage-domainÁokay”spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¬ÿ5Ñuu spiclkapb_pclk¥<�Ñdefaultßvwxy+ Ádisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¬ÿ7Ñuu" baudclkapb_pclk¥fÉÓÑdefaultßz Ádisabledi2c@ff3c0000rockchip,rk3399-i2c¬ÿ<�uu … ëÂÑu u  i2cpclk¥9Ñdefaultß{+ Ádisabledi2c@ff3d0000rockchip,rk3399-i2c¬ÿ=uu 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pclk_efusecpu-id@7¬cpu-leakage@17¬gpu-leakage@18¬center-leakage@19¬cpu-leakage@1a¬logic-leakage@1b¬wafer-info@1c¬pmu-clock-controller@ff750000rockchip,rk3399-pmucru¬ÿuO…êºuu…(Jñ0uclock-controller@ff760000rockchip,rk3399-cru¬ÿvO꺀uÀÀ@ÂÁBÉÂCãxÞ@…#ÃF_^;šÊðÑ€xhÀ<4`õáõáúð€/¯õáúð€ׄ ë ëÂׄ0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¬ÿw+0io-domains"rockchip,rk3399-io-voltage-domainÁokayÇÔáñ%usb2-phy@e450rockchip,rk3399-usb2phy¬äPÑ{ phyclkê×clk_usbphy0_480mÁokay0'host-portþ¥ FlinestateÁokay0(otg-portþ0¥ghjFotg-bvalidotg-idlinestateÁokay0-usb2-phy@e460rockchip,rk3399-usb2phy¬ä`Ñ| phyclkê×clk_usbphy1_480m Ádisabled0*host-portþ¥ FlinestateÁokay0+otg-portþ0¥lmoFotg-bvalidotg-idlinestateÁokay0/phy@f780rockchip,rk3399-emmc-phy¬÷€$ц emmcclkþÁokay0&pcie-phyrockchip,rk3399-pcie-phyÑŠ refclkþ®‡ 2µphyÁokay0phy@ff7c0000rockchip,rk3399-typec-phy¬ÿ|Ñ~} tcpdcoretcpdphy-refu~…úð€A®•”Lµuphyuphy-pipeuphy-tcphyOÁokay‡,dp-portþ01usb3-portþ0.phy@ff800000rockchip,rk3399-typec-phy¬ÿ€Ñ€ tcpdcoretcpdphy-refu€…úð€A ®œMµuphyuphy-pipeuphy-tcphyO Ádisableddp-portþusb3-portþ00watchdog@ff848000 snps,dw-wdt¬ÿ„€Ñ|¥xrktimer@ff850000rockchip,rk3399-timer¬ÿ…¥QÑhZ  pclktimerspdif@ff870000rockchip,rk3399-spdif¬ÿ‡¥BàUåtx  mclkhclkÑU×Ñdefault߇A4 Ádisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿˆO¥'àUUåtxrx i2s_clki2s_hclkÑVÔÑdefault߈A4Áokay0Ãi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿ‰¥(àUUåtxrx i2s_clki2s_hclkÑWÕÑdefault߉A4 Ádisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¬ÿŠ¥)àUUåtxrx i2s_clki2s_hclkÑXÖA4Áokay0–vop@ff8f0000rockchip,rk3399-vop-lit¬ÿ>ü¥wuÛÛ…ׄõáÑÛµÛ aclk_vopdclk_vophclk_vop¦ŠA® µaxiahbdclkÁokayport+0endpoint@0¬E‹0›endpoint@1¬EŒ0©endpoint@2¬E0™endpoint@3¬EŽ0¥endpoint@4¬E03iommu@ff8f3f00rockchip,iommu¬ÿ?¥w Fvopl_mmuÑÛÛ  aclkifaceA­Áokay0Švop@ff900000rockchip,rk3399-vop-big¬ÿ>ü¥vuÙÙ…ׄõáÑÙ´Ù aclk_vopdclk_vophclk_vop¦A® µaxiahbdclkÁokayport+0endpoint@0¬E‘0¨endpoint@1¬E’0šendpoint@2¬E“0˜endpoint@3¬E”0¤endpoint@4¬E•02iommu@ff903f00rockchip,iommu¬ÿ?¥v Fvopb_mmuÑÙÙ  aclkifaceA­Áokay0iommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P¥+ Fisp0_mmuÑéã  aclkiface­A iommu@ff924000rockchip,iommu ¬ÿ’@ÿ’P¥, Fisp1_mmuÑêä  aclkiface­A hdmi-soundsimple-audio-card 8i2s Q khdmi-sound Ádisabledsimple-audio-card,cpu ‚–simple-audio-card,codec ‚—hdmi@ff940000rockchip,rk3399-dw-hdmi¬ÿ”¥(Ñtqop iahbisfrvpllgrfcecAÓO4 Ádisabled0—portsport+endpoint@0¬E˜0“endpoint@1¬E™0mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€¥- Ñ¢p£o refpclkphy_cfggrfA®ûµapbO+Áokay Œports+port@0¬+endpoint@0¬Eš0’endpoint@1¬E›0‹port@1¬endpointEœ0¢panel@0¬ ™ £žÑdefaultߟinnolux,p097pfg °  ¼¡ports+port@0¬endpointE¢0œport@1¬endpoint@1E£0¦mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¬ÿ–€€¥. Ñ¢q¤o refpclkphy_cfggrfA®üµapbO+Áokayports+port@0¬+endpoint@0¬E¤0”endpoint@1¬E¥0Žport@1¬endpointE¦0£edp@ff970000rockchip,rk3399-edp¬ÿ—€¥ Ñjlo  dppclkgrfÑdefaultߧA®µdpO Ádisabledports+port@0¬+endpoint@0¬E¨0‘endpoint@1¬E©0Œgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¬ÿš0¥ FjobmmugpuÑÐA#Áokayª È«pinctrlrockchip,rk3399-pinctrlO Ô…+÷Ñdefault ߬­®gpio0@ff720000rockchip,gpio-bank¬ÿrÑu¥ á ñ,0gpio1@ff730000rockchip,gpio-bank¬ÿsÑu¥ á ñ,0#gpio2@ff780000rockchip,gpio-bank¬ÿxÑP¥ á ñ,0Ágpio3@ff788000rockchip,gpio-bank¬ÿx€ÑQ¥ á ñ,gpio4@ff790000rockchip,gpio-bank¬ÿyÑR¥ á ñ,0žpcfg-pull-up ý0³pcfg-pull-down 0µpcfg-pull-none 0¯pcfg-pull-none-12ma  & 0±pcfg-pull-none-13ma  & 0°pcfg-pull-none-18ma  &pcfg-pull-none-20ma  &pcfg-pull-up-2ma ý &pcfg-pull-up-8ma ý &pcfg-pull-up-18ma ý &pcfg-pull-up-20ma ý &pcfg-pull-down-4ma  &pcfg-pull-down-8ma  &pcfg-pull-down-12ma  & pcfg-pull-down-18ma  &pcfg-pull-down-20ma  &pcfg-output-high 50¶pcfg-output-low Aclockclk-32k L¯0­edpedp-hpd L¯0§gmacrgmii-pinsð L°¯ ¯ ° ¯ ¯¯¯¯°°¯¯°°rmii-pins  L ¯ ° ¯ ¯ ¯¯¯¯°°i2c0i2c0-xfer L¯¯0{i2c1i2c1-xfer L¯¯04i2c2i2c2-xfer L±±05i2c3i2c3-xfer L¯¯08i2c4i2c4-xfer L ¯ ¯0|i2c5i2c5-xfer L ¯ ¯0;i2c6i2c6-xfer L ¯ ¯0<�i2c7i2c7-xfer L¯¯0=i2c8i2c8-xfer L¯¯0}i2s0i2s0-2ch-bus` L¯¯¯¯¯¯i2s0-8ch-bus` L²²²²²²0ˆi2s1i2s1-2ch-busP L¯¯¯¯¯0‰sdio0sdio0-bus1 L³sdio0-bus4@ L³³³³sdio0-cmd L³sdio0-clk L¯sdio0-cd L³sdio0-pwr L³sdio0-bkpwr L³sdio0-wp L³sdio0-int L³sdmmcsdmmc-bus1 L³sdmmc-bus4@ L´ ´ ´ ´0"sdmmc-clk L ´0sdmmc-cmd L ´0sdmmc-cd L¯0 sdmmc-wp L³sdmmc-cd-gpio L ³0!sleepap-pwroff L¯0¬ddrio-pwroff L¯spdifspdif-bus L¯0‡spdif-bus-1 L¯spi0spi0-clk L³0Dspi0-cs0 L³0Gspi0-cs1 L³spi0-tx L³0Espi0-rx L³0Fspi1spi1-clk L ³0Hspi1-cs0 L ³0Kspi1-rx L³0Jspi1-tx L³0Ispi1-sleep@ L µ µµµ0Lspi2spi2-clk L ³0Mspi2-cs0 L ³0Pspi2-rx L ³0Ospi2-tx L ³0Nspi3spi3-clk L³0vspi3-cs0 L³0yspi3-rx L³0xspi3-tx L³0wspi4spi4-clk L³0Qspi4-cs0 L³0Tspi4-rx L³0Sspi4-tx L³0Rspi5spi5-clk L³0Vspi5-cs0 L³0Yspi5-rx L³0Xspi5-tx L³0Wtestclktest-clkout0 L¯test-clkout1 L¯0>test-clkout2 L¯tsadcotp-gpio L¯0^otp-out L¯0_uart0uart0-xfer L³¯0?uart0-cts L¯uart0-rts L¯uart1uart1-xfer L ³ ¯0@uart2auart2a-xfer L³ ¯uart2buart2b-xfer L³¯uart2cuart2c-xfer L³¯0Auart3uart3-xfer L³¯0Buart3-cts L¯uart3-rts L¯uart4uart4-xfer L³¯0zuarthdcpuarthdcp-xfer L³¯pwm0pwm0-pin L¯0€pwm0-pin-pull-down Lµvop0-pwm-pin L¯vop1-pwm-pin L¯pwm1pwm1-pin L¯0pwm1-pin-pull-down Lµpwm2pwm2-pin L¯0‚pwm2-pin-pull-down Lµpwm3apwm3a-pin L¯0ƒpwm3bpwm3b-pin L¯hdmihdmi-i2c-xfer L¯¯hdmi-cec L¯pciepci-clkreqn-cpm L¯0pci-clkreqnb-cpm L¯pcfg-pull-none-8ma  &0´backlight-enablebl-en L¯0Ðcros-ecec-ap-int-l L³0Zdiscrete-regulatorssd-io-pwr-en L¯0¿sd-pwr-1800-sel L³0Àsd-slot-pwr-en L¯0¾display-rst-l Lµ0Ÿppvarp-lcd-en L¯0Ëppvarn-lcd-en L¯0Êcodecheadset-int-l L³0~mic-int L µmax98357asdmode-en Lµ0Âtouchscreentouch-int-l Lµ09touch-reset-l L µ0:trackpadap-i2c-tp-pu-en L ¶trackpad-int-l L³wifiwlan-module-reset-l L ¯bt-host-wake-l L¯0)bt-en-1v8-l L¯0Íwlan-pd-1v8-l L¯0Îwlan-rf-kill-1v8-l L³0®wifi-perst-l L¯0wlan-host-wake-l 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£wlan_3v3ÑdefaultßÎ ‡ š ò' Ï0backlightpwm-backlight £žÑdefaultßÐ ÑB@ '0dmic dmic-codec žÑdefaultßÒ (ú0Ågpio-keys gpio-keysÑdefaultßÓpen-insert 8Pen Insert Ë# > I Z compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiospinctrl-namespinctrl-0vpcie3v3-supplyvpcie1v8-supplyvpcie0v9-supplypcie-reset-suspendinterrupt-controllerpower-domainsrockchip,grfmax-frequencyfifo-depthassigned-clocksassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removableextcondr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nshid-descr-addrreset-gpiosreg-shiftreg-io-widthdmasdma-namespinctrl-1spi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-id#extcon-cellskeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymappolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplydlg,micbias-lvldlg,mic-amp-in-selVDD-supplyVDDMIC-supplyVDDIO-supplydlg,adc-1bit-rptdlg,btn-avgdlg,btn-cfgdlg,mic-det-thrdlg,jack-ins-debdlg,jack-det-ratedlg,jack-rem-debdlg,a-d-btn-thrdlg,d-b-btn-thrdlg,b-c-btn-thrdlg,c-mic-btn-thr#pwm-cellsiommus#iommu-cells#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightenable-gpiosavdd-supplyavee-supplymali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitctrl-supplyctrl-voltage-rangeregulator-settling-time-up-usenable-active-highgpioenable-gpiosdmode-gpiossdmode-delayrockchip,cpurockchip,codecstartup-delay-usregulator-enable-ramp-delaypwm-delay-usdmicen-gpioswakeup-delay-mslabellinux,codelinux,input-typewakeup-source