Ð þíd¿8^(£]ärockchip,r88rockchip,rk3368 + 7Rockchip R88aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000/spi@ff110000’/spi@ff120000—/spi@ff130000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcore2œcore3œ cpu@0 cpuarm,cortex-a53¬°psci¾Ícpu@1 cpuarm,cortex-a53¬°psci¾Ícpu@2 cpuarm,cortex-a53¬°psci¾Ícpu@3 cpuarm,cortex-a53¬°psci¾Í cpu@100 cpuarm,cortex-a53¬°psci¾Ícpu@101 cpuarm,cortex-a53¬°psci¾Ícpu@102 cpuarm,cortex-a53¬°psci¾Ícpu@103 cpuarm,cortex-a53¬°psci¾Íamba simple-bus+Õdma-controller@ff250000arm,pl330arm,primecell¬ÿ%@Üçò à apb_pclkdma-controller@ff600000arm,pl330arm,primecell¬ÿ`@Üçò  apb_pclkÍ7arm-pmuarm,armv8-pmuv3`Üpqrstuvw   psci arm,psci-0.2·smctimerarm,armv8-timer0Ü ÿÿ ÿ ÿoscillator fixed-clock3n6Cxin24mVdwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ @cðÑ€  È D r vbiuciuciu-driveciu-sampleq Ü | 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disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6 M Ubaudclkapb_pclk Ü7u disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6 N Vbaudclkapb_pclk Ü8u disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6 P Xbaudclkapb_pclk Ü:u disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6 Q Ybaudclkapb_pclk Ü;u disabledthermal-zonescpuŒd¢ˆ°&tripscpu_alert0À$øÌЧpassiveÍ'cpu_alert1À8€ÌЧpassiveÍ(cpu_critÀsÌÐ §criticalcooling-mapsmap0×'0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1×(0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpuŒd¢ˆ°&tripsgpu_alert0À8€ÌЧpassiveÍ)gpu_critÀÁ8ÌÐ §criticalcooling-mapsmap0×)0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¬ÿ( Ü% H Ztsadcapb_pclk| Ÿ ƒtsadc-apbinitdefaultsleep"*ë+õ*ÿsokay,CÍ&ethernet@ff290000rockchip,rk3368-gmac¬ÿ) Ü^macirqn,8  f g c € Å ]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macok{-†rmiioutput œ. ¬ Â'B@default"/×0àusb@ff500000 generic-ehci¬ÿP Ü Âusbhostokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¬ÿX Ü Áotgéhostñ€€@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿe Li2c Ü<�default"0+okaysyr827@40silergy,syr827¬@!>vdd_cpuM,i ß4ã`™@®ÂÔ1hym8563@51haoyu,hym8563¬QV3€Cxin32kÍFi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿf Ü=+i2c Mdefault"2 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿhßdefault"3 _pwm disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿhßdefault"4 _pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh ß _pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh0ßdefault"5 _pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿi O Wbaudclkapb_pclk Ü9default"6uokaymbox@ff6b0000rockchip,rk3368-mailbox¬ÿk0Ü’“”• E pclk_mailboxê disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¬ÿs€Í:io-domains&rockchip,rk3368-pmu-io-voltage-domainokayöreboot-modesyscon-reboot-mode RBÃRBÃ-RBà =RBÃclock-controller@ff760000rockchip,rk3368-cru¬ÿvn,VIÍ syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¬ÿwÍ,io-domains"rockchip,rk3368-io-voltage-domainokVcqwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¬ÿ€ p ÜOokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¬ÿ  ÜBspdif@ff880000rockchip,rk3368-spdif¬ÿˆ Ü6 S Ð mclkhclk7’txdefault"8 disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰ Ü(i2s_clki2s_hclk T ΍77’txrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰€ Ü5i2s_clki2s_hclk R ύ77’txrxdefault"9 disablediommu@ff900800rockchip,iommu¬ÿ Ü^iep_mmu Ê Ô aclkifaceœ disablediommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P Ü^isp_mmu Í Õ aclkifaceœ© disablediommu@ff930300rockchip,iommu¬ÿ“ Ü^vop_mmu Æ Ñ aclkifaceœ disablediommu@ff9a0440rockchip,iommu ¬ÿš@@ÿš€@ Ü  ^hevc_mmu Ð Ü aclkifaceœ disablediommu@ff9a0800rockchip,iommu¬ÿšÜ  ^vepu_mmuvdpu_mmu Ð Ü aclkifaceœ disabledefuse@ffb00000rockchip,rk3368-efuse¬ÿ° + q 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=sdmmc-bus1K=sdmmc-bus4@K====spdifspdif-txK>Í8spi0spi0-clkK=Íspi0-cs0K=Íspi0-cs1K=spi0-txK=Íspi0-rxK=Íspi1spi1-clkK=Íspi1-cs0K=Íspi1-cs1K=spi1-rxK=Íspi1-txK=Íspi2spi2-clkK =Íspi2-cs0K =Í!spi2-rxK =Í spi2-txK =Ítsadcotp-gpioK>Í*otp-outK>Í+uart0uart0-xfer K=>uart0-ctsK>uart0-rtsK>uart1uart1-xfer K=>uart1-ctsK>uart1-rtsK>uart2uart2-xfer K=>Í6uart3uart3-xfer K=>uart3-ctsK>uart3-rtsK>uart4uart4-xfer K=>uart4-ctsK>uart4-rtsK>pcfg-pull-none-drv-8ma/<�Í;pcfg-pull-up-drv-8ma<�Í<�irir-intK=ÍEkeyspwr-keyK=ÍBledsstby-pwrenK >led-ctlK>ÍDsdiowifi-reg-onK>ÍHbt-rstK>ÍGusbhost-vbus-drvK>ÍIchosenYserial2:115200n8memory memory¬@emmc-pwrseqmmc-pwrseq-emmc"@default eAÍgpio-keys gpio-keysdefault"Bpowerq kC GPIO Power…tgpio-leds gpio-ledswork k.r88:green:leddefault"Dir-receivergpio-ir-receiver k.default"Esdio-pwrseqmmc-pwrseq-simple F ext_clockdefault"GHe..Í vcc18-regulatorregulator-fixed>vcc_18iw@w@®ÂÔ1Ívcc-host-regulatorregulator-fixed §Cdefault"I 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compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusassigned-clocksassigned-clock-parentsbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeed#io-channel-cellsvref-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cellspmu-supplyvop-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsaudio-supplygpio30-supplygpio1830-supplywifi-supplydmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codeenable-active-high