Ð þíhÌ8aô(Øa¼'tsd,rk3368-lion-haikourockchip,rk3368 +'7Theobroma Systems RK3368-uQ7 Baseboardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000/spi@ff110000’/spi@ff120000—/spi@ff130000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcore2œcore3œ cpu@0 cpuarm,cortex-a53¬°psci¾Í Øcpu@1 cpuarm,cortex-a53¬°psci¾Í Øcpu@2 cpuarm,cortex-a53¬°psci¾Í Øcpu@3 cpuarm,cortex-a53¬°psci¾Í Ø cpu@100 cpuarm,cortex-a53¬°psci¾Í Øcpu@101 cpuarm,cortex-a53¬°psci¾Í Øcpu@102 cpuarm,cortex-a53¬°psci¾Í Øcpu@103 cpuarm,cortex-a53¬°psci¾Í Øamba simple-bus+àdma-controller@ff250000arm,pl330arm,primecell¬ÿ%@çòý à apb_pclkdma-controller@ff600000arm,pl330arm,primecell¬ÿ`@çòý  apb_pclkØ=arm-pmuarm,armv8-pmuv3`çpqrstuvw + psci arm,psci-0.2·smctimerarm,armv8-timer0ç ÿÿ ÿ ÿoscillator fixed-clock>n6Nxin24madwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ @n}x@  È D r vbiuciuciu-driveciu-sample| ç ‡ €Žresetšokay¡«½ Î ×âdefault ð úZdwmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ @nðÑ€  É E s wbiuciuciu-driveciu-sample| ç!‡ Žreset šdisableddwmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ@nðÑ€  Ë G u ybiuciuciu-driveciu-sample| ç#‡ ƒŽresetšokay¡>ðÑ€$3Aâdefault ðsaradc@ff100000rockchip,saradc¬ÿ ç$N I [saradcapb_pclk‡ W Žsaradc-apb šdisabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ A Rspiclkapb_pclk ç,âdefaultð+ šdisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ B Sspiclkapb_pclk ç-âdefaultð+šokayflash@0jedec,spi-nor¬`úð€spi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ C Tspiclkapb_pclk ç)âdefaultð !+šokayr i2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ ç>+i2c Nâdefaultð"šokayØGi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ ç?+i2c Oâdefaultð# šdisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ ç@+i2c Pâdefaultð$ šdisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ çA+i2c Qâdefaultð% šdisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ>n6 M Ubaudclkapb_pclk ç7{…šokayâdefault ð&'(serial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ>n6 N Vbaudclkapb_pclk ç8{… šdisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ>n6 P Xbaudclkapb_pclk ç:{…šokayserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ>n6 Q Ybaudclkapb_pclk ç;{… šdisabledthermal-zonescpu’d¨ˆ¶)tripscpu_alert0Æ$øÒЧpassiveØ*cpu_alert1Æ8€ÒЧpassiveØ+cpu_critÆsÒÐ §criticalcooling-mapsmap0Ý*0âÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1Ý+0âÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu’d¨ˆ¶)tripsgpu_alert0Æ8€ÒЧpassiveØ,gpu_critÆÁ8ÒÐ §criticalcooling-mapsmap0Ý,0âÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¬ÿ( ç% H Ztsadcapb_pclk‡ Ÿ Žtsadc-apbâinitdefaultsleepð-ñ.û-s šdisabledØ)ethernet@ff290000rockchip,rk3368-gmac¬ÿ) ç2macirqB/8  f g c € Å ]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macšokayO _0vinputƒŽrgmiiâdefaultð1— ­'ÃP Â2 ÒÛusb@ff500000 generic-ehci¬ÿP ç Âusbhostšokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¬ÿX ç Áotgäotgìþ €€@@ šokayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿe Li2c ç<�âdefaultð3+šokaypmic@1brockchip,rk808¬ 4çNxin32krk808-clkout2aâdefaultð56=7I7U7a7m7y7…7‘77ª7·7regulatorsDCDC_REG1Ävdd_cpuÓ ®`ëã`Ø DCDC_REG2Ävdd_logÓ ®`ëã`DCDC_REG3Ävcc_ddrDCDC_REG4 Ävcc33_ioÓ2Z ë2Z ØLDO_REG2 Ävcc33_videoÓ2Z ë2Z LDO_REG3 Ävdd10_pllÓB@ëB@LDO_REG4 Ävcc18_ioÓw@ëw@ØLDO_REG6 Ävdd10_videoÓB@ëB@LDO_REG8 Ävcc18_videoÓw@ëw@i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿf ç=+i2c Mâdefaultð8šokayØEpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh)âdefaultð9 _pwm šdisabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh)âdefaultð: _pwm šdisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh ) _pwm šdisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh0)âdefaultð; _pwm šdisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿi O Wbaudclkapb_pclk ç9âdefaultð<�{… šdisabledmbox@ff6b0000rockchip,rk3368-mailbox¬ÿk0ç’“”• E pclk_mailbox4 šdisabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¬ÿs€Ø@io-domains&rockchip,rk3368-pmu-io-voltage-domain šdisabledreboot-modesyscon-reboot-mode@GRBÃSRBÃaRBà qRBÃclock-controller@ff760000rockchip,rk3368-cru¬ÿvB/a}Ø syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¬ÿwØ/io-domains"rockchip,rk3368-io-voltage-domain šdisabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¬ÿ€ p çOšokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¬ÿ  çBspdif@ff880000rockchip,rk3368-spdif¬ÿˆ ç6 S Ð mclkhclkŠ=txâdefaultð> šdisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰ ç(i2s_clki2s_hclk T Ί==txrx šdisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰€ ç5i2s_clki2s_hclk R ÏŠ==txrxâdefaultð? šdisablediommu@ff900800rockchip,iommu¬ÿ ç2iep_mmu Ê Ô aclkiface™ šdisablediommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P ç2isp_mmu Í Õ aclkiface™¦ šdisablediommu@ff930300rockchip,iommu¬ÿ“ ç2vop_mmu Æ Ñ aclkiface™ šdisablediommu@ff9a0440rockchip,iommu ¬ÿš@@ÿš€@ ç  2hevc_mmu Ð Ü aclkiface™ šdisablediommu@ff9a0800rockchip,iommu¬ÿšç  2vepu_mmuvdpu_mmu Ð Ü aclkiface™ šdisabledefuse@ffb00000rockchip,rk3368-efuse¬ÿ° + q pclk_efusecpu-leakage@17¬temp-adjust@1f¬interrupt-controller@ffb71000 arm,gic-400ÁÖ@¬ÿ·ÿ· ÿ·@ ÿ·`  ç ÿØpinctrlrockchip,rk3368-pinctrlB/ç@+àâdefaultðAgpio0@ff750000rockchip,gpio-bank¬ÿu @ çQôÁÖØ4gpio1@ff780000rockchip,gpio-bank¬ÿx A çRôÁÖØFgpio2@ff790000rockchip,gpio-bank¬ÿy B çSôÁÖØ gpio3@ff7a0000rockchip,gpio-bank¬ÿz C çTôÁÖØ2pcfg-pull-upØCpcfg-pull-downpcfg-pull-none,ØBpcfg-pull-none-12ma,9 ØDemmcemmc-clkHBØemmc-cmdHCØemmc-pwrHCemmc-bus1HCemmc-bus4@HCCCCemmc-bus8€HCCCCCCCCØgmacrgmii-pinsðHBBBD D DDD DBBBBBBØ1rmii-pins HBBBD D DBBBBi2c0i2c0-xfer HBBØ3i2c1i2c1-xfer HBBØ8i2c2i2c2-xfer H BBØ"i2c3i2c3-xfer HBBØ#i2c4i2c4-xfer HBBØ$i2c5i2c5-xfer HBBØ%i2si2s-8ch-busH B BBBBBBBBØ?pwm0pwm0-pinHBØ9pwm1pwm1-pinHBØ:pwm3pwm3-pinHBØ;sdio0sdio0-bus1HCsdio0-bus4@HCCCCsdio0-cmdHCsdio0-clkHBsdio0-cdHCsdio0-wpHCsdio0-pwrHCsdio0-bkpwrHCsdio0-intHCsdmmcsdmmc-clkH BØ sdmmc-cmdH CØsdmmc-cdH Csdmmc-bus1HCsdmmc-bus4@HCCCCØsdmmc-cd-gpioH Bspdifspdif-txHBØ>spi0spi0-clkHCØspi0-cs0HCØspi0-cs1HCspi0-txHCØspi0-rxHCØspi1spi1-clkHCØspi1-cs0HCØspi1-cs1HCspi1-rxHCØspi1-txHCØspi2spi2-clkH CØspi2-cs0H CØ!spi2-rxH CØ spi2-txH CØtsadcotp-gpioHBØ-otp-outHBØ.uart0uart0-xfer HCBØ&uart0-ctsHBØ'uart0-rtsHBØ(uart1uart1-xfer HCBuart1-ctsHBuart1-rtsHBuart2uart2-xfer HCBØ<�uart3uart3-xfer HCBuart3-ctsHBuart3-rtsHBuart4uart4-xfer HCBuart4-ctsHBuart4-rtsHBledsled-module-gpio H BBØHled-sd-gpioHBØIpmicpmic-int-lHCØ5pmic-sleepHBØ6hoghaikou-pin-hog@HCCCCØAusb_otgotg-vbus-drvHBØKchosenVserial0:115200n8gmac-clk fixed-clock>sY@ Next_gmacaØ0i2cmux1 i2c-mux-gpio+bE mFi2c@0¬+i2c@1¬+i2cmux2 i2c-mux-gpio+bG mF i2c@0¬+fan@18 ti,amc6821¬¾rtc@6f isil,isl1208¬oeeprom@50 atmel,24c01w¬Pi2c@1¬+leds gpio-ledsâdefaultðHImodule_led1 €module_led1 Ñ  †heartbeatœmodule_led2 €module_led2 Ñ2¬offsd-card-led €sd_card_led Ñ4†mmc0vcc-sys-regulatorregulator-fixedÄvcc_sysÓLK@ëLK@Ø7dc-12vregulator-fixedÄdc_12vÓ·ë·ØJvcc3v3-baseboardregulator-fixedÄvcc3v3_baseboardÓ2Z ë2Z ºJØvcc5v0-otg-regulatorregulator-fixedÅ Í4âdefaultðK Ävcc5v0_otg compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellscpu-supplyphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wppinctrl-namespinctrl-0rockchip,default-sample-phasevmmc-supplymmc-hs200-1_8vnon-removablevqmmc-supply#io-channel-cellsspi-max-frequencycs-gpiosreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-on#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathi2c-parentmux-gpiospagesizelabellinux,default-triggerpanic-indicatordefault-statevin-supplyenable-active-high