Ð
þíh;8aü(?aÄ,rockchip,rk3368-evb-act8846rockchip,rk3368+&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000/spi@ff110000’/spi@ff120000—/spi@ff130000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcore2œcore3œ cpu@0 cpuarm,cortex-a53¬°psci¾Ícpu@1 cpuarm,cortex-a53¬°psci¾Ícpu@2 cpuarm,cortex-a53¬°psci¾Ícpu@3 cpuarm,cortex-a53¬°psci¾Í cpu@100 cpuarm,cortex-a53¬°psci¾Ícpu@101 cpuarm,cortex-a53¬°psci¾Ícpu@102 cpuarm,cortex-a53¬°psci¾Ícpu@103 cpuarm,cortex-a53¬°psci¾Íambasimple-bus+Õdma-controller@ff250000arm,pl330arm,primecell¬ÿ%@Üçò
à apb_pclkdma-controller@ff600000arm,pl330arm,primecell¬ÿ`@Üçò
 apb_pclkÍ2arm-pmuarm,armv8-pmuv3`Üpqrstuvw psci
arm,psci-0.2·smctimerarm,armv8-timer0Ü
ÿÿÿ
ÿoscillatorfixed-clock3n6Cxin24mVdwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ@cðÑ€
È
D
r
vbiuciuciu-driveciu-sampleqÜ |
€ƒreset disableddwmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ
@cðÑ€
É
E
s
wbiuciuciu-driveciu-sampleqÜ!|
ƒreset disableddwmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ@cðÑ€
Ë
G
u
ybiuciuciu-driveciu-sampleqÜ#|
ƒƒresetokay– ²½ËdefaultÙ
saradc@ff100000rockchip,saradc¬ÿÜ$ã
I
[saradcapb_pclk|
Wƒsaradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ
A
Rspiclkapb_pclkÜ,ËdefaultÙ+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ
B
Sspiclkapb_pclkÜ-ËdefaultÙ+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ
C
Tspiclkapb_pclkÜ)ËdefaultÙ+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿÜ>+i2c
NËdefaultÙ disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿÜ?+i2c
OËdefaultÙ disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿÜ@+i2c
PËdefaultÙ disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿÜA+i2c
QËdefaultÙ disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6
M
Ubaudclkapb_pclkÜ7õÿ disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6
N
Vbaudclkapb_pclkÜ8õÿ disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6
P
Xbaudclkapb_pclkÜ:õÿ disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿ3n6
Q
Ybaudclkapb_pclkÜ;õÿ disabledthermal-zonescpud"ˆ0tripscpu_alert0@$øLЧpassiveÍ cpu_alert1@8€LЧpassiveÍ!cpu_crit@sLÐ §criticalcooling-mapsmap0W 0\ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1W!0\ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpud"ˆ0tripsgpu_alert0@8€LЧpassiveÍ"gpu_crit@Á8LÐ §criticalcooling-mapsmap0W"0\ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¬ÿ(Ü%
H
Ztsadcapb_pclk|
Ÿ
ƒtsadc-apbËinitdefaultsleepÙ#k$u#•sokay¬ÃÍethernet@ff290000rockchip,rk3368-gmac¬ÿ)ÜÞmacirqî%8
f
g
c
€
Å
]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokû&rmiioutput',B'B@ËdefaultÙ(W0`usb@ff500000
generic-ehci¬ÿPÜ
Âusbhostokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¬ÿXÜ
Áotgihostqƒ’€€@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿe
Li2cÜ<�ËdefaultÙ)+okay3€syr827@40silergy,syr827¬@¡¾vdd_cpuÍøPå™pý#*syr828@41silergy,syr828¬A¡¾vdd_gpuÍøPå™pý#*act8846@5aactive-semi,act8846¬Zokay.*9*D*O*Z+f*r,regulatorsREG1¾VCC_DDRÍO€åO€ýREG2¾VCC_IOÍ2Z å2Z ýÍ+REG3¾VDD_LOGÍ
®`åã`ýREG4¾VCC_20Í„€å„€ýÍ,REG5 ¾VCCIO_SDÍw@å2Z ýREG6
¾VDD10_LCDÍB@åB@ýREG7¾VCCA_CODECÍ2Z å2Z ýREG8¾VCCA_TPÍ2Z å2Z ýREG9
¾VCCIO_PMUÍ2Z å2Z ýREG10¾VDD_10ÍB@åB@ýREG11¾VCC_18Íw@åw@ýREG12
¾VCC18_LCDÍw@åw@ýi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿfÜ=+i2c
MËdefaultÙ- disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh~ËdefaultÙ.
_pwmokayÍ=pwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh~ËdefaultÙ/
_pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh ~
_pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh0~ËdefaultÙ0
_pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿi
O
Wbaudclkapb_pclkÜ9ËdefaultÙ1õÿokaymbox@ff6b0000rockchip,rk3368-mailbox¬ÿk0Ü’“”•
E
pclk_mailbox‰ disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¬ÿs€Í5io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-mode•œRBèRBöRBà ÆRBÃclock-controller@ff760000rockchip,rk3368-cru¬ÿvî%VÒÍ
syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¬ÿwÍ%io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¬ÿ€
pÜOokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¬ÿ ÜBspdif@ff880000rockchip,rk3368-spdif¬ÿˆÜ6
S
Ð
mclkhclkß2ätxËdefaultÙ3 disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰Ü(i2s_clki2s_hclk
T
Îß22ätxrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰€Ü5i2s_clki2s_hclk
R
Ïß22ätxrxËdefaultÙ4 disablediommu@ff900800rockchip,iommu¬ÿÜÞiep_mmu
Ê
Ôaclkifaceî disablediommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘PÜÞisp_mmu
Í
Õaclkifaceîû disablediommu@ff930300rockchip,iommu¬ÿ“ÜÞvop_mmu
Æ
Ñaclkifaceî disablediommu@ff9a0440rockchip,iommu ¬ÿš@@ÿš€@Ü Þhevc_mmu
Ð
Üaclkifaceî disablediommu@ff9a0800rockchip,iommu¬ÿšÜ
Þvepu_mmuvdpu_mmu
Ð
Üaclkifaceî disabledefuse@ffb00000rockchip,rk3368-efuse¬ÿ° +
qpclk_efusecpu-leakage@17¬temp-adjust@1f¬interrupt-controller@ffb71000arm,gic-400+@¬ÿ·ÿ· ÿ·@ ÿ·` Ü ÿÍpinctrlrockchip,rk3368-pinctrlî%<�5+Õgpio0@ff750000rockchip,gpio-bank¬ÿu
@ÜQIY+Í;gpio1@ff780000rockchip,gpio-bank¬ÿx
AÜRIY+gpio2@ff790000rockchip,gpio-bank¬ÿy
BÜSIY+Í?gpio3@ff7a0000rockchip,gpio-bank¬ÿz
CÜTIY+Í'pcfg-pull-upeÍ8pcfg-pull-downrpcfg-pull-noneÍ9pcfg-pull-none-12maŽÍ:emmcemmc-clk6Íemmc-cmd7Í
emmc-pwr8emmc-bus18emmc-bus4@8888emmc-bus8€77777777Íemmc-reset9Í>gmacrgmii-pinsð999: :
:::
:999999rmii-pins 999: :
:9999Í(i2c0i2c0-xfer 99Í)i2c1i2c1-xfer 99Í-i2c2i2c2-xfer 99Íi2c3i2c3-xfer 99Íi2c4i2c4-xfer 99Íi2c5i2c5-xfer 99Íi2si2s-8ch-bus9
99999999Í4pwm0pwm0-pin9Í.pwm1pwm1-pin9Í/pwm3pwm3-pin9Í0sdio0sdio0-bus18sdio0-bus4@8888sdio0-cmd8sdio0-clk9sdio0-cd8sdio0-wp8sdio0-pwr8sdio0-bkpwr8sdio0-int8sdmmcsdmmc-clk 9sdmmc-cmd
8sdmmc-cd8sdmmc-bus18sdmmc-bus4@8888spdifspdif-tx9Í3spi0spi0-clk8Íspi0-cs08Íspi0-cs18spi0-tx8Íspi0-rx8Íspi1spi1-clk8Íspi1-cs08Íspi1-cs18spi1-rx8Íspi1-tx8Íspi2spi2-clk8Íspi2-cs0
8Íspi2-rx
8Íspi2-tx8Ítsadcotp-gpio9Í#otp-out9Í$uart0uart0-xfer 89uart0-cts9uart0-rts9uart1uart1-xfer 89uart1-cts9uart1-rts9uart2uart2-xfer 89Í1uart3uart3-xfer 89uart3-cts9uart3-rts9uart4uart4-xfer 89uart4-cts9uart4-rts9pcfg-pull-none-drv-8maŽÍ6pcfg-pull-up-drv-8maeŽÍ7backlightbl-en9Í<�keyspwr-key8Í@pmicpmic-int8sdiowifi-reg-on9bt-rst9usbhost-vbus-drv9ÍAchosen«serial2:115200n8memory memory¬@backlightpwm-backlight·
!"#$%&'()*+,-./0123456789:;<�=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€‚ƒ„…†‡ˆ‰Š‹ŒŽ‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨©ª«¬®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿÉ€â;ËdefaultÙ<�ï=B@ô'emmc-pwrseqmmc-pwrseq-emmcÙ>Ëdefault?Ígpio-keys
gpio-keysËdefaultÙ@power
é;GPIO Power!tvcc-host-regulatorregulator-fixed,';ËdefaultÙA ¾vcc_hostý#*vcc-lan-regulatorregulator-fixed¾vcc_lanÍ2Z å2Z ý#+Í&vcc-sys-regulatorregulator-fixed¾vcc_sysÍLK@åLK@ýÍ* compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedmmc-pwrseqnon-removablepinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmspwm-delay-usreset-gpioswakeup-sourcelabellinux,codeenable-active-high