Ð þí4Ò82¼(2„$mediatek,mt8183-evbmediatek,mt8183 +!7MediaTek MT8183 evaluation boardaliases=/soc/i2c@11007000B/soc/i2c@11011000G/soc/i2c@11009000L/soc/i2c@1100f000Q/soc/i2c@11008000V/soc/i2c@11016000[/soc/i2c@11005000`/soc/i2c@1101a000e/soc/i2c@1101b000j/soc/i2c@11014000o/soc/i2c@11015000u/soc/i2c@11017000{/soc/serial@11002000cpus+cpu-mapcluster0core0ƒcore1ƒcore2ƒcore3ƒcluster1core0ƒcore1ƒcore2ƒcore3ƒ cpu@0‡cpuarm,cortex-a53“—psci¥å¸cpu@1‡cpuarm,cortex-a53“—psci¥å¸cpu@2‡cpuarm,cortex-a53“—psci¥å¸cpu@3‡cpuarm,cortex-a53“—psci¥å¸cpu@100‡cpuarm,cortex-a73“—psci¥¸cpu@101‡cpuarm,cortex-a73“—psci¥¸cpu@102‡cpuarm,cortex-a73“—psci¥¸cpu@103‡cpuarm,cortex-a73“—psci¥¸ pmu-a53arm,cortex-a53-pmu À pmu-a73arm,cortex-a73-pmu À psci arm,psci-1.0žsmcoscillator fixed-clockËØŒº€èclk26m¸timerarm,armv8-timer @À   soc+ simple-busûsoc_data@8000000%mediatek,mt8183-efusemediatek,efuse“+ disabledinterrupt-controller@c000000 arm,gic-v3  P“   @ A B À ¸ ppi-partitionsinterrupt-partition-0/¸ interrupt-partition-1/ ¸ syscon@c530000mediatek,mt8183-mcucfgsyscon“ SËinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirq  “ S €P¸syscon@10000000 mediatek,mt8183-topckgensyscon“˸syscon@10001000 mediatek,mt8183-infracfgsyscon“˸pinctrl@10005000mediatek,mt8183-pinctrl “PòèçéÓÒÅó°D8iocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eintBR^ À À± ¸ i2c0¸pins_i2cjRSq†i2c1¸pins_i2cjQTq†i2c2¸pins_i2cjghq†i2c3¸pins_i2cj23q†i2c4¸pins_i2cjijq†i2c5¸pins_i2cj01q†spi0¸pins_spijUVWX¢spi1¸pins_spij¡¢£¤¢spi2¸pins_spij^¢spi3¸pins_spij¢spi4¸pins_spij¢spi5¸pins_spij ¢syscon@1000c000"mediatek,mt8183-apmixedsyssyscon“ÀËpwrap@1000d000mediatek,mt8183-pwrap“Ð8pwrap À¹¯) ¶spiwrapauxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc“¯#¶mainÂokayserial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart“  À[ ¯ ¶baudbusokayserial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart“0 À\ ¯ ¶baudbus disabledserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart“@ À] ¯ ¶baudbus disabledi2c@11005000mediatek,mt8183-i2c “P€ ÀW¯W* ¶maindmaÔ+ disabledi2c@11007000mediatek,mt8183-i2c “p€€ ÀQ¯ * ¶maindmaÔ+okayÞdefaultì؆ i2c@11008000mediatek,mt8183-i2c “€€ ÀR¯ *G ¶maindmaarbÔ+okayÞdefaultìØB@i2c@11009000mediatek,mt8183-i2c “€€ ÀS¯ *I ¶maindmaarbÔ+okayÞdefaultì؆ spi@1100a000mediatek,mt8183-spi+“  Àx¯6¶parent-clksel-clkspi-clkokayÞdefaultìöi2c@1100f000mediatek,mt8183-i2c “ð€ ÀT¯ * ¶maindmaÔ+okayÞdefaultì؆ spi@11010000mediatek,mt8183-spi+“ À|¯68¶parent-clksel-clkspi-clkokayÞdefaultìöi2c@11011000mediatek,mt8183-i2c “€€ ÀU¯9* ¶maindmaÔ+okayÞdefaultì؆ spi@11012000mediatek,mt8183-spi+“  À¯6;¶parent-clksel-clkspi-clkokayÞdefaultìöspi@11013000mediatek,mt8183-spi+“0 À‚¯6<�¶parent-clksel-clkspi-clkokayÞdefaultìöi2c@11014000mediatek,mt8183-i2c “@€€ Àƒ¯H*G ¶maindmaarbÔ+ disabledi2c@11015000mediatek,mt8183-i2c “P€ À„¯J*I ¶maindmaarbÔ+ disabledi2c@11016000mediatek,mt8183-i2c “`€ ÀV¯D*E ¶maindmaarbÔ+okayÞdefaultìØB@i2c@11017000mediatek,mt8183-i2c “p€€ À…¯F*E ¶maindmaarbÔ+ disabledspi@11018000mediatek,mt8183-spi+“€ À†¯6K¶parent-clksel-clkspi-clkokayÞdefaultìöspi@11019000mediatek,mt8183-spi+“ À‡¯6L¶parent-clksel-clkspi-clkokayÞdefaultìöi2c@1101a000mediatek,mt8183-i2c “ €€ ÀX¯b* ¶maindmaÔ+ disabledi2c@1101b000mediatek,mt8183-i2c “°€ ÀY¯c* ¶maindmaÔ+ disabledsyscon@11220000 mediatek,mt8183-audiosyssyscon“"Ëefuse@11f10000%mediatek,mt8183-efusemediatek,efuse“ñsyscon@13000000mediatek,mt8183-mfgcfgsyscon“Ësyscon@14000000mediatek,mt8183-mmsyssyscon“Ësyscon@15020000mediatek,mt8183-imgsyssyscon“Ësyscon@16000000mediatek,mt8183-vdecsyssyscon“Ësyscon@17000000mediatek,mt8183-vencsyssyscon“Ësyscon@19000000 mediatek,mt8183-ipu_connsyscon“Ësyscon@19010000mediatek,mt8183-ipu_adlsyscon“Ësyscon@19180000!mediatek,mt8183-ipu_core0syscon“Ësyscon@19280000!mediatek,mt8183-ipu_core1syscon“(Ësyscon@1a000000mediatek,mt8183-camsyssyscon“Ëmemory@40000000‡memory“@€chosen serial0:921600n8 compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11serial0cpudevice_typeregenable-methodcapacity-dmips-mhzphandleinterrupts#clock-cellsclock-frequencyclock-output-namesrangesstatus#interrupt-cellsinterrupt-controlleraffinityreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxmediatek,pull-up-advmediatek,drive-strength-advbias-disableclocksclock-names#io-channel-cellsclock-divpinctrl-namespinctrl-0mediatek,pad-selectstdout-path