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þí§8(‹älge,lg1312-reflge,lg1312&/7LG Electronics, DTV SoC LG1312 Reference Boardcpuscpu@0=cpuarm,cortex-a53IM^cpu@1=cpuarm,cortex-a53IfpsciM^cpu@2=cpuarm,cortex-a53IfpsciM^cpu@3=cpuarm,cortex-a53IfpsciM^l2-cache0cache^psciarm,psci-0.2arm,pscimsmct„€„ˆ„interrupt-controller@c0001000arm,gic-400 0IÀÀ À@ À` ^pmuarm,cortex-a53-pmu0µ•–—˜Àtimerarm,armv8-timer0µ
clk_busÓfixed-clockàÍ=€ðBUSCLK^socsimple-busðernet@c1b00000 cdns,gemIÁ°µ
hclkpclkrmii&amba2simple-bus&timer@fd100000
arm,sp804Iýµ
apb_pclkwatchdog@fd200000arm,sp805arm,primecellIý µ
apb_pclkserial@fe000000arm,pl011arm,primecellIþµ
apb_pclkDokayserial@fe100000arm,pl011arm,primecellIþµ
apb_pclk Ddisabledserial@fe200000arm,pl011arm,primecellIþ µ
apb_pclk Ddisabledspi@fe800000arm,pl022arm,primecellIþ€µ
apb_pclkspi@fe900000arm,pl022arm,primecellIþµ
apb_pclkdma@c1128000arm,pl330arm,primecellIÁ€µ
apb_pclkgpio@fd400000Karm,pl061arm,primecellWIý@
apb_pclk Ddisabledgpio@fd410000Karm,pl061arm,primecellWIýA
apb_pclk Ddisabledgpio@fd420000Karm,pl061arm,primecellWIýB
apb_pclk Ddisabledgpio@fd430000Karm,pl061arm,primecellWIýC
apb_pclkgpio@fd440000Karm,pl061arm,primecellWIýD
apb_pclk Ddisabledgpio@fd450000Karm,pl061arm,primecellWIýE
apb_pclk Ddisabledgpio@fd460000Karm,pl061arm,primecellWIýF
apb_pclk Ddisabledgpio@fd470000Karm,pl061arm,primecellWIýG
apb_pclk Ddisabledgpio@fd480000Karm,pl061arm,primecellWIýH
apb_pclk Ddisabledgpio@fd490000Karm,pl061arm,primecellWIýI
apb_pclk Ddisabledgpio@fd4a0000Karm,pl061arm,primecellWIýJ
apb_pclk Ddisabledgpio@fd4b0000Karm,pl061arm,primecellWIýK
apb_pclkgpio@fd4c0000Karm,pl061arm,primecellWIýL
apb_pclk Ddisabledgpio@fd4d0000Karm,pl061arm,primecellWIýM
apb_pclk Ddisabledgpio@fd4e0000Karm,pl061arm,primecellWIýN
apb_pclk Ddisabledgpio@fd4f0000Karm,pl061arm,primecellWIýO
apb_pclk Ddisabledgpio@fd500000Karm,pl061arm,primecellWIýP
apb_pclk Ddisabledgpio@fd510000Karm,pl061arm,primecellWIýQ
apb_pclkaliasesg/amba/serial@fe000000o/amba/serial@fe100000w/amba/serial@fe200000memory=memoryI chosenserial0:115200n8 #address-cells#size-cellscompatibleinterrupt-parentmodeldevice_typeregnext-level-cachephandleenable-methodcpu_suspendcpu_offcpu_on#interrupt-cellsinterrupt-controllerinterruptsinterrupt-affinity#clock-cellsclock-frequencyclock-output-namesrangesclocksclock-namesphy-modemac-address#interrupts-cellsstatus#gpio-cellsgpio-controllerserial0serial1serial2stdout-path