Ð þí6182”(2\ ,Freescale i.MX8QXP MEK2fsl,imx8qxp-mekfsl,imx8qxpaliases=/bus@5d000000/gpio@5d080000C/bus@5d000000/gpio@5d090000I/bus@5d000000/gpio@5d0a0000O/bus@5d000000/gpio@5d0b0000U/bus@5d000000/gpio@5d0c0000[/bus@5d000000/gpio@5d0d0000a/bus@5d000000/gpio@5d0e0000g/bus@5d000000/gpio@5d0f0000m/bus@5b000000/mmc@5b010000r/bus@5b000000/mmc@5b020000w/bus@5b000000/mmc@5b030000|/bus@5d000000/mailbox@5d1c0000€/bus@59000000/serial@5a060000ˆ/bus@59000000/serial@5a070000/bus@59000000/serial@5a080000˜/bus@59000000/serial@5a090000cpus cpu@0 cpu2arm,cortex-a35¬°psci¾ÏÖêcpu@1 cpu2arm,cortex-a35¬°psci¾ÏÖêcpu@2 cpu2arm,cortex-a35¬°psci¾ÏÖêcpu@3 cpu2arm,cortex-a35¬°psci¾ÏÖêl2-cache02cacheùopp-table2operating-points-v2ùopp-900000000 5¤éB@!Iðopp-1200000000 G†ŒÈà!Ið2interrupt-controller@51a00000 2arm,gic-v3 ¬Q Q° >O d ùreserved-memory odsp@92400000¬’@vù pmu2arm,armv8-pmuv3 dpsci 2arm,psci-1.0·smcscu 2fsl,imx-scu%}tx0tx1tx2tx3rx0rx1rx2rx3gip3lˆclock-controller2fsl,imx8qxp-clkÏœxtal_32KHzxtal_24Mhzùpinctrl2fsl,imx8qxp-iomuxcfec1grp¨¨5 4 & % ' ( ) * , - . / 0 1 ùioexp_rst_grp ¨Z!ùisl29023grp ¨[!ùlpi2c1grp¨!!ù lpuart0grp¨o p ù usdhc1grp„¨ A ! ! ! !!!!!!Aùusdhc2grpT¨A! !!!"!#!!ùimx8qx-ocotp2fsl,imx8qxp-scu-ocotp imx8qx-pd2fsl,imx8qxp-scu-pd±ù rtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdtÅ<�timer2arm,armv8-timer0d   clock-xtal32k 2fixed-clockÑ€ áxtal_32KHzùclock-xtal24m 2fixed-clockÑn6 áxtal_24MHzùbus@59000000 2simple-bus oYYclock-controller@590000002fsl,imx8qxp-lpcg-adma¬Yùdsp@596e80002fsl,imx8qxp-dsp¬Yn€€Ï*,+œipgocramcore ô â ë  }txdb0txdb1rxdb0rxdb10ˆ     okayserial@5a060000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuart¬Z dáÏ œipgbaudô 9okaydefault% serial@5a070000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuart¬Z dâÏ œipgbaudô : disabledserial@5a080000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuart¬Z dãÏ œipgbaudô ; disabledserial@5a090000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuart¬Z  däÏ œipgbaudô <� disabledi2c@5a800000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c¬Z€@ dÜÏœper/µ?n6ô ` disabledi2c@5a810000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c¬Z@ dÝÏœper/¶?n6ô aokay ц default% i2c-switch@712nxp,pca9646nxp,pca9546 ¬q Ti2c@0 ¬gpio@682maxim,max7322¬h`pi2c@1 ¬i2c@2 ¬pressure-sensor@60 2fsl,mpl3115¬`i2c@3 ¬gpio@1a 2nxp,pca9557¬`pgpio@1d 2nxp,pca9557¬`plight-sensor@44default%2isil,isl29023¬Ddi2c@5a820000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c¬Z‚@ dÞÏœper/·?n6ô b disabledi2c@5a830000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c¬Zƒ@ dßÏœper/¸?n6ô c disabledbus@5b000000 2simple-bus o[[clock-controller@5b2000002fsl,imx8qxp-lpcg-conn¬[ ùmmc@5b010000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc dè¬[Ï œipgperahb/(? ëÂô øokaydefault%|†Œ”mmc@5b020000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc dé¬[Ï œipgperahb/)? ëÂô ù¢·okaydefault%|Ç Ó Ümmc@5b030000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc dê¬[Ï œipgperahb/*? ëÂô ú disabledethernet@5b0400002fsl,imx8qxp-fecfsl,imx6sx-fec¬[0d Ïœipgahbenet_clk_refptpå÷ô ûokaydefault%  rgmii-idmdio ethernet-phy@02ethernet-phy-ieee802.3-c22¬ùethernet@5b0500002fsl,imx8qxp-fecfsl,imx6sx-fec¬[0d Ïœipgahbenet_clk_refptpå÷ô ü disabledbus@5c000000 2simple-bus o\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu¬\ dƒbus@5d000000 2simple-bus o]]gpio@5d080000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬] dˆ`pO>ô Çgpio@5d090000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬]  d‰`pO>ô Èùgpio@5d0a0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬]  dŠ`pO>ô Égpio@5d0b0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬]  d‹`pO>ô Êgpio@5d0c0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬]  dŒ`pO>ô Ëùgpio@5d0d0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬]  d`pO>ô Ìgpio@5d0e0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬] dŽ`pO>ô Ígpio@5d0f0000 2fsl,imx8qxp-gpiofsl,imx35-gpio¬] d`pO>ô Îmailbox@5d1b00002fsl,imx8qxp-mufsl,imx6sx-mu¬] d°. disabledmailbox@5d1c00002fsl,imx8qxp-mufsl,imx6sx-mu¬] d±.ùmailbox@5d1d00002fsl,imx8qxp-mufsl,imx6sx-mu¬] d². disabledmailbox@5d1e00002fsl,imx8qxp-mufsl,imx6sx-mu¬] d³. disabledmailbox@5d1f00002fsl,imx8qxp-mufsl,imx6sx-mu¬] d´. disabledmailbox@5d2800002fsl,imx8qxp-mufsl,imx6sx-mu¬]( dÀ.ô âù clock-controller@5d4000002fsl,imx8qxp-lpcg-lsio¬]@@chosen:/bus@59000000/serial@5a060000memory@80000000 memory¬€@usdhc2-vmmc2regulator-fixed FSD1_SPWRU-ÆÀm-ÆÀ …Šù interrupt-parent#address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7mmc0mmc1mmc2mu1serial0serial1serial2serial3device_typeregenable-methodnext-level-cacheclocksoperating-points-v2#cooling-cellsphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapmbox-namesmboxes#clock-cellsclock-namesfsl,pins#power-domain-cellstimeout-secclock-frequencyclock-output-namespower-domainsmemory-regionstatuspinctrl-namespinctrl-0assigned-clocksassigned-clock-ratesreset-gpiosgpio-controller#gpio-cellsbus-widthno-sdno-sdionon-removablefsl,tuning-start-tapfsl,tuning-stepvmmc-supplycd-gpioswp-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packet#mbox-cellsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high