Ð þí•Ð8¨((p(hisilicon,hi6220-hikeyhisilicon,hi6220 +7HiKey Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D idle-statesHpscicpu-sleeparm,idle-stateUf}¼Žúžè¯ cluster-sleeparm,idle-stateUf}莼ž Œ·Ü¯cpu@0arm,cortex-a53ÉcpuÕÙpsciç ø ÿ  #27¯cpu@1arm,cortex-a53ÉcpuÕÙpsciç ø ÿ  #27¯cpu@2arm,cortex-a53ÉcpuÕÙpsciç ø ÿ  #27¯cpu@3arm,cortex-a53ÉcpuÕÙpsciç ø ÿ  #27¯cpu@100arm,cortex-a53ÉcpuÕÙpsciçø ÿ  #27¯cpu@101arm,cortex-a53ÉcpuÕÙpsciçø ÿ  #27¯cpu@102arm,cortex-a53ÉcpuÕÙpsciçø ÿ  #27¯cpu@103arm,cortex-a53ÉcpuÕÙpsciçø ÿ  #27¯ l2-cache0cache¯ l2-cache1cache¯cpu_opp_tableoperating-points-v2L¯ opp00W eÔ^Þ€l¡ opp01W¿Ì^Þ€l¡ opp02W+s¨@^¡Ðl¡ opp03W98p^`l¡ opp04WG†Œ^KPl¡ interrupt-controller@f6801000 arm,gic-400@Õö€ö€ ö€@ ö€` }Ž £ ÿ¯timerarm,armv8-timer 0£ ÿÿ ÿ ÿsoc simple-bus+®sram@fff80000!hisilicon,hi6220-sramctrlsysconÕÿø ¯ao_ctrl@f7800000hisilicon,hi6220-aoctrlsysconÕ÷€ µ¯sys_ctrl@f7030000 hisilicon,hi6220-sysctrlsysconÕ÷ µÂ¯media_ctrl@f4410000"hisilicon,hi6220-mediactrlsysconÕôAµÂ¯Tpm_ctrl@f7032000hisilicon,hi6220-pmctrlsysconÕ÷ µacpu_sctrl@f6504000#hisilicon,hi6220-acpu-sctrlsysconÕöP@µ¯Xmedianoc_ade@f4520000sysconÕôR@¯Sstub_clockhisilicon,hi6220-stub-clkϵémbox-txô ¯ uart@f8015000arm,pl011arm,primecellÕøP £$ø$$ûuartclkapb_pclkuart@f7111000arm,pl011arm,primecellÕ÷ £%øûuartclkapb_pclkdefault  $rxtx.ok5)EðÑ€bluetooth ti,wl1835-st Zø ûext_clockuart@f7112000arm,pl011arm,primecellÕ÷  £&øûuartclkapb_pclkdefault.ok gLS-UART0uart@f7113000arm,pl011arm,primecellÕ÷0 £'øûuartclkapb_pclkdefault.ok gLS-UART1uart@f7114000arm,pl011arm,primecellÕ÷@ £(øûuartclkapb_pclkdefault .disableddma@f7370000hisilicon,k3-dma-1.0Õ÷7mx…  £Tø ’ hi6220_dma.ok¯timer@f8008000arm,sp804arm,primecellÕø€£øûtimer1timer2apb_pclkrtc@f8003000arm,pl031arm,primecellÕø0 £ ø% ûapb_pclkrtc@f8004000arm,pl031arm,primecellÕø@ £ø& ûapb_pclkpinmux@f7010000pinctrl-singleÕ÷|+¦µÇ åp P X ` h p x       ! + 0 8 J z ~  ‡  —default!"#$%¯,gpio-range¯ boot_sel_pmx_func=¯!emmc_pmx_funcP=  $¯;sd_pmx_func0=  ¯@sd_pmx_idle0=  ¯Csdio_pmx_func0=(,048<�¯Hsdio_pmx_idle0=(,048<�¯Kisp_pmx_func€=$(,048<�@DHLPTX\`hkadc_ssi_pmx_func=h¯"codec_clk_pmx_func=l¯#codec_pmx_func =ptx|fm_pmx_func =€„ˆŒbt_pmx_func =”˜œpwm_in_pmx_func=¸¯$bl_pwm_pmx_func=¼¯%uart0_pmx_func=ÀÄuart1_pmx_func =ÈÌÐÔ¯uart2_pmx_func =ØÜàä¯uart3_pmx_func =€„ˆŒ¯uart4_pmx_func =ÐÔØܯuart5_pmx_func=ÈÌi2c0_pmx_func=èì¯0i2c1_pmx_func=ðô¯2i2c2_pmx_func=øü¯4spi0_pmx_func = ¤¨¬¯-pinmux@f7010800pinconf-singleÕ÷Œ+¦Ç default&'()*boot_sel_cfg_func=Qn‰p¯&hkadc_ssi_cfg_func=lQn‰p¯'emmc_clk_cfg_func=Qn‰ p¯<�emmc_cfg_funcH=  $(Qn‰p¯=emmc_rst_cfg_func=,Qn‰p¯>sd_clk_cfg_func= Qn‰0p¯Asd_clk_cfg_idle= Qn‰p¯Dsd_cfg_func(= Qn‰ p¯Bsd_cfg_idle(= Qn‰p¯Esdio_clk_cfg_func=4Qn‰ p¯Isdio_clk_cfg_idle=4Qn‰p¯Lsdio_cfg_func(=8<�@DHQn‰p¯Jsdio_cfg_idle(=8<�@DHQn‰p¯Misp_cfg_func1x=(,048<�@DHLPX\`dQn‰pisp_cfg_idle1=48Qn‰pisp_cfg_func2=TQn‰pcodec_clk_cfg_func=pQn‰p¯(codec_clk_cfg_idle=pQn‰pcodec_cfg_func1=tQn‰pcodec_cfg_func2=x|€Qn‰pcodec_cfg_idle2=x|€Qn‰pfm_cfg_func =„ˆŒQn‰pbt_cfg_func =”˜œ Qn‰pbt_cfg_idle =”˜œ Qn‰ppwm_in_cfg_func=¼Qn‰p¯)bl_pwm_cfg_func=ÀQn‰p¯*uart0_cfg_func1=ÄQn‰puart0_cfg_func2=ÈQn‰puart1_cfg_func1=ÌÔQn‰p¯uart1_cfg_func2=ÐØQn‰p¯uart2_cfg_func =ÜàäèQn‰p¯uart3_cfg_func =”˜œQn‰p¯uart4_cfg_func =àäèìQn‰p¯uart5_cfg_func=ØÜQn‰pi2c0_cfg_func=ìðQn‰p¯1i2c1_cfg_func=ôøQn‰p¯3i2c2_cfg_func=üQn‰p¯5spi0_cfg_func =°´¸¼Qn‰p¯.pinmux@f8001800pinconf-singleÕøx+¦Ç default+rstout_n_cfg_func=Qn‰p¯+pmu_peri_en_cfg_func=Qn‰psysclk0_en_cfg_func=Qn‰pjtag_tdo_cfg_func= Qn‰ prf_reset_cfg_func=ptQn‰pgpio@f8011000arm,pl061arm,primecellÕø £4§·Ž}ø ûapb_pclkOÃPWR_HOLDDSI_SELUSB_HUB_RESET_NUSB_SELHDMI_PDWL_REG_ONPWRON_DET5V_HUB_EN¯6gpio@f8012000arm,pl061arm,primecellÕø  £5§·Ž}ø ûapb_pclk:ÃSD_DETHDMI_INTPMU_IRQ_NWL_HOST_WAKENCNCNCBT_REG_ON¯gpio@f8013000arm,pl061arm,primecellÕø0 £6§·Ž}ø ûapb_pclkBÃGPIO-AGPIO-BGPIO-CGPIO-DGPIO-EUSB_ID_DETUSB_VBUS_DETGPIO-Hgpio@f8014000arm,pl061arm,primecellÕø@ £7§·Ó,PŽ}ø ûapb_pclk%ÃGPIO3_0NCNCNCWLAN_ACTIVENCNC¯ugpio@f7020000arm,pl061arm,primecellÕ÷ £8§·Ó,XŽ}ø ûapb_pclk?ÃUSER_LED1USER_LED2USER_LED3USER_LED4SD_SELNCNCBT_ACTIVE¯tgpio@f7021000arm,pl061arm,primecellÕ÷ £9§·Ó,`Ž}ø ûapb_pclk?ÃNCNC[UART1_RxD][UART1_TxD][AUX_SSI1]NC[PCM_CLK][PCM_FS]gpio@f7022000arm,pl061arm,primecellÕ÷  £:§·Ó,hŽ}ø ûapb_pclk=Ã[SPI0_DIN][SPI0_DOUT][SPI0_CS][SPI0_SCLK]NCNCNCGPIO-G¯/gpio@f7023000arm,pl061arm,primecellÕ÷0 £;§·Ó,pŽ}ø ûapb_pclk$ÃNCNCNCNC[PCM_DI][PCM_DO]NCNCgpio@f7024000arm,pl061arm,primecellÕ÷@ £<�§· Ó,x,Ž}ø ûapb_pclkÃNC[CEC_CLK_19_2MHZ]NCgpio@f7025000arm,pl061arm,primecellÕ÷P £=§·Ó,Ž}ø ûapb_pclk'ÃGPIO-JGPIO-LNCNCNCNC[ISP_CCLK0]gpio@f7026000arm,pl061arm,primecellÕ÷` £>§· Ó,,Ž}ø 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ggreen:user4 atÞÈnonewlan_active_led gyellow:wlan auÈphy0txîoffbt_active_ledgblue:bt at Èhci0-powerîoffpmic@f8000000hisilicon,hi655x-pmicÕøµŽ} ü¯regulatorsLDO2 "LDO2_2V81&% I0ÔxLDO7 "LDO7_SDIO1w@I2Z x¯FLDO10 "LDO10_2V851w@I-ÆÀh¯GLDO13 "LDO13_1V81jIÁ0xLDO14 "LDO14_2V81&% I0ÔxLDO15 "LDO15_1V81jIÁ0asxLDO17 "LDO17_2V51&% I0ÔxLDO19 "LDO19_3V01w@I-ÆÀh¯?LDO21 "LDO21_1V81-PI„€sxLDO22 "LDO22_1V21 » IO€asxfirmwareopteelinaro,optee-tz=smcsound_cardaudio-graph-card#v compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpuentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usphandlewakeup-latency-usdevice_typeregenable-methodnext-level-cacheclocksoperating-points-v2cpu-idle-states#cooling-cellsdynamic-power-coefficientopp-sharedopp-hzopp-microvoltclock-latency-ns#interrupt-cellsinterrupt-controllerinterruptsranges#clock-cells#reset-cellshisilicon,hi6220-clk-srammbox-namesmboxesclock-namespinctrl-namespinctrl-0dmasdma-namesstatusassigned-clocksassigned-clock-ratesenable-gpioslabel#dma-cellsdma-channelsdma-requestsdma-no-ccidma-type#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthgpio-controller#gpio-cellsgpio-line-namesgpio-rangesbus-idenable-dmanum-cscs-gpiosi2c-sda-hold-time-nspd-gpioadi,dsi-lanes#sound-dai-cellsremote-endpoint#phy-cellsphy-supplyhisilicon,peripheral-sysconphysphy-namesdr_modeg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-size#mbox-cellsresetsreset-namescap-mmc-highspeednon-removablebus-widthvmmc-supplypinctrl-1card-detect-delaycap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50vqmmc-supplydisable-wpcd-gpioscap-power-off-cardmmc-pwrseq#thermal-sensor-cellshisilicon,sysctrl-syscondai-formatpolling-delaypolling-delay-passivesustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicereg-nameshisilicon,noc-syscondma-coherentserial0serial1serial2serial3stdout-pathrecord-sizeconsole-sizeftrace-sizereusablelinux,cma-defaultoffsetmode-normalmode-bootloadermode-recoveryregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onvin-supplyreset-gpiospost-power-on-delay-mspower-off-delay-uslinux,default-triggerpanic-indicatordefault-statepmic-gpiosregulator-enable-ramp-delaydais