Ð þíDxH@((P?à€fsl,lx2160a-rdbfsl,lx2160a +7NXP Layerscape LX2160ARDBcpus+cpu@0=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@1=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@100=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@101=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@200=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@201=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@300=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@301=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@400=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@401=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­ÀºËcpu@500=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ëcpu@501=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ëcpu@600=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ëcpu@601=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ëcpu@700=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ëcpu@701=cpuarm,cortex-a72IpsciW [b€o@€ŽÀ›@­Àº Ël2-cache0cachedq@ƒÛçl2-cache1cachedq@ƒÛçl2-cache2cachedq@ƒÛçl2-cache3cachedq@ƒÛçl2-cache4cachedq@ƒÛçl2-cache5cachedq@ƒÛç l2-cache6cachedq@ƒÛç l2-cache7cachedq@ƒÛç cpu-pw15arm,idle-stateïPW15ÿÐ'Ð7pçinterrupt-controller@6000000 arm,gic-v3PW  H+Y` u çgic-its@6020000arm,gic-v3-its€Wçtimerarm,armv8-timer0u   pmuarm,cortex-a72-pmu upsci arm,psci-0.2Psmcmemory@80000000=memoryW€€memory-controller@1080000fsl,qoriq-memory-controllerW umemory-controller@1090000fsl,qoriq-memory-controllerW  usysclk fixed-clockªõáºsysclkç soc simple-bus+YÍcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0Ø +YW u‹äñokayjr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringW uŒjr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringW ujr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringW uŽjr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringW uclock-controller@1300000fsl,lx2160a-clockgenW0 [ çsyscon@1e00000fsl,lx2160a-dcfgsysconWài2c@2000000fsl,vf610-i2c+W u"øi2c [  ñokayi2c-mux@77 nxp,pca9547Ww+i2c@2+Wpower-monitor@40 ti,ina220W@ èi2c@3+Wtemperature-sensor@4c nxp,sa56004WLtemperature-sensor@4d nxp,sa56004WMi2c@2010000fsl,vf610-i2c+W u"øi2c [ ñdisabledi2c@2020000fsl,vf610-i2c+W u#øi2c [ ñdisabledi2c@2030000fsl,vf610-i2c+W u#øi2c [ ñdisabledi2c@2040000fsl,vf610-i2c+W uJøi2c [  ñokayrtc@51 nxp,pcf2129WQ u–i2c@2050000fsl,vf610-i2c+W uJøi2c [ ñdisabledi2c@2060000fsl,vf610-i2c+W uKøi2c [ ñdisabledi2c@2070000fsl,vf610-i2c+W uKøi2c [ ñdisabledspi@20c0000nxp,lx2160a-fspi+ W  'fspi_basefspi_mmap u[ øfspi_enfspiñokayflash@0+spansion,m25p801@úð€WRcflash@1+spansion,m25p801@úð€WRcesdhc@2140000 fsl,esdhcW u [t ä 䃏Yñokay”¢¯¼esdhc@2150000 fsl,esdhcW u? [t ä äƒÉYñokayÓâserial@21c0000arm,sbsa-uartarm,pl011W u ñÂñokayserial@21d0000arm,sbsa-uartarm,pl011W u!ñÂñokayserial@21e0000arm,sbsa-uartarm,pl011W uHñ ñdisabledserial@21f0000arm,sbsa-uartarm,pl011W uIñ ñdisabledgpio@2300000fsl,qoriq-gpioW0 u$ÿ`Hgpio@2310000fsl,qoriq-gpioW1 u$ÿ`Hgpio@2320000fsl,qoriq-gpioW2 u%ÿ`Hç gpio@2330000fsl,qoriq-gpioW3 u%ÿ`Hwatchdog@23a0000arm,sbsa-gwdt W:9 u;usb@3100000 snps,dwc3W uP'host/ Rlñokayusb@3110000 snps,dwc3W uQ'host/ Rlñokaysata@3200000fsl,lx2160a-ahci W  'ahcisata-ecc u… [äñokaysata@3210000fsl,lx2160a-ahci W! 'ahcisata-ecc uˆ [äñokaysata@3220000fsl,lx2160a-ahci W" 'ahcisata-ecc ua [äñokaysata@3230000fsl,lx2160a-ahci W# 'ahcisata-ecc ud [äñokayiommu@5000000 arm,mmu-500W€Œ™¨u ÓÔÕÖ×ØÙÚÛÜ’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑäçconsole@8340020fsl,dpaa2-consoleW4 ptp-timer@8b95000fsl,dpaa2-ptpW¹P [¬fsl-mc@80c000000 fsl,qoriq-mc W @4»Æä+0Y dpmacs+dpmac@1fsl,qoriq-mc-dpmacWdpmac@2fsl,qoriq-mc-dpmacWdpmac@3fsl,qoriq-mc-dpmacWdpmac@4fsl,qoriq-mc-dpmacWdpmac@5fsl,qoriq-mc-dpmacWdpmac@6fsl,qoriq-mc-dpmacWdpmac@7fsl,qoriq-mc-dpmacWdpmac@8fsl,qoriq-mc-dpmacWdpmac@9fsl,qoriq-mc-dpmacW dpmac@afsl,qoriq-mc-dpmacW dpmac@bfsl,qoriq-mc-dpmacW dpmac@cfsl,qoriq-mc-dpmacW dpmac@dfsl,qoriq-mc-dpmacW dpmac@efsl,qoriq-mc-dpmacWdpmac@ffsl,qoriq-mc-dpmacWdpmac@10fsl,qoriq-mc-dpmacWdpmac@11fsl,qoriq-mc-dpmacWdpmac@12fsl,qoriq-mc-dpmacWaliasesÐ/soc/crypto@8000000×/soc/serial@21c0000chosenßserial0:115200n8regulator-sb3v3regulator-fixedëMC34717-3.3VSBú2Z 2Z *<�ç compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeenable-methodregclocksd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecpu-idle-statescache-levelphandleidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controllerlittle-endian#clock-cellsclock-frequencyclock-output-namesdma-rangesfsl,sec-eradma-coherentstatusclock-namesscl-gpioshunt-resistorvcc-supplyreg-namesm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthvoltage-rangessdhci,auto-cmd12sd-uhs-sdr104sd-uhs-sdr50sd-uhs-sdr25sd-uhs-sdr12broken-cdmmc-hs200-1_8vmmc-hs400-1_8vcurrent-speedgpio-controller#gpio-cellstimeout-secdr_modesnps,quirk-frame-length-adjustmentsnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustment#iommu-cells#global-interruptsfsl,extts-fifomsi-parentiommu-mapcryptoserial0stdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on