Ð þí'8('È"amd,seattle-overdriveamd,seattle +*7AMD Seattle Development Board (Overdrive)interrupt-controller@e1101000arm,gic-400arm,cortex-a15-gic=R+@cááð á á  g ráyv2m@e0080000arm,gic-v2m-framec@¡ytimerarm,armv8-timer0g ÿÿ ÿ ÿpmuarm,armv8-pmuv3`g     smb simple-bus+r²clk100mhz_0 fixed-clock½ÊõáÚadl3clk_100mhzclk375mhz fixed-clock½ÊZ ÀÚccpclk_375mhzclk333mhz fixed-clock½ÊÙ-@Úsataclk_333mhzyclk500mhz_0 fixed-clock½ÊÍeÚpcieclk_500mhzclk500mhz_1 fixed-clock½ÊÍeÚdmaclk_500mhzclk250mhz_4 fixed-clock½Êæ²€Úmiscclk_250mhzyclk100mhz_1 fixed-clock½ÊõáÚuartspiclk_100mhzysata@e0300000snps,dwc-ahcicà0 gcíôsata@e0d00000 disabledsnps,dwc-ahcicàÐ gbíôi2c@e1000000oksnps,designware-i2ccá geíi2c@e0050000 disabledsnps,designware-i2ccà gTíserial@e1010000arm,pl011arm,primecellcá gHíuartclkapb_pclkspi@e1020000okarm,pl022arm,primecellcá gJí apb_pclkspi@e1030000okarm,pl022arm,primecellcá gIí apb_pclk#+sdcard@0 mmc-spi-slotc*1-<� € H K gQaq€”gpio@e1040000okarm,pl061arm,primecell¨cá´ gg=Rí apb_pclkygpio@e1050000okarm,pl061arm,primecell¨cá´=R gfí apb_pclkgpio@e0020000 disabledarm,pl061arm,primecell¨cà´=R gní apb_pclkgpio@e0030000 disabledarm,pl061arm,primecell¨cà´=R gmí apb_pclkgpio@e0080000 disabledarm,pl061arm,primecell¨cà´=R gií apb_pclkccp@e0100000okamd,ccp-seattle-v1acà gôpcie@f0000000pci-host-ecam-generic+RÄpciÐÚcðåø ø !"#ô²CTrïÿ@@€okccn@e8000000 arm,ccn-504cè g|kcs@e0010000 disabled ipmi-kcsÄipmicà g…chosen/smb/serial@e1010000 compatibleinterrupt-parent#address-cells#size-cellsmodelinterrupt-controller#interrupt-cellsreginterruptsrangesphandlemsi-controllerarm,msi-base-spiarm,msi-num-spisdma-ranges#clock-cellsclock-frequencyclock-output-namesclocksdma-coherentstatusclock-namesspi-controllernum-csspi-max-frequencyvoltage-rangesgpiospl022,hierarchypl022,interfacepl022,com-modepl022,rx-level-trigpl022,tx-level-trig#gpio-cellsgpio-controllerdevice_typebus-rangemsi-parentinterrupt-map-maskinterrupt-mapreg-sizereg-spacingstdout-path