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arm,psci-0.2úsmc compatibleinterrupt-parent#address-cells#size-cellsmodelinterrupt-controller#interrupt-cellsreginterruptsrangesphandlemsi-controllerdma-ranges#clock-cellsclock-frequencyclock-output-namesclocksdma-coherentstatusclock-namesspi-controllernum-csspi-max-frequencyvoltage-rangespl022,hierarchypl022,interfacepl022,com-modepl022,rx-level-trigpl022,tx-level-trig#gpio-cellsgpio-controlleramd,zlib-supportdevice_typebus-rangemsi-parentinterrupt-map-maskinterrupt-mapreg-sizereg-spacingamd,per-channel-interruptamd,speed-setamd,serdes-blwcamd,serdes-cdr-rateamd,serdes-pq-skewamd,serdes-tx-ampamd,serdes-dfe-tap-configamd,serdes-dfe-tap-enablemac-addressphy-mode#stream-id-cells#global-interruptsmmu-mastersstdout-pathmethod