Ð þí¿ã8³H( ›³google,veyron-tiger-rev8google,veyron-tiger-rev7google,veyron-tiger-rev6google,veyron-tiger-rev5google,veyron-tiger-rev4google,veyron-tiger-rev3google,veyron-tiger-rev2google,veyron-tiger-rev1google,veyron-tiger-rev0google,veyron-tigergoogle,veyronrockchip,rk3288& 7Google Tigeraliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000‚/i2c@ff140000‡/i2c@ff660000Œ/i2c@ff150000‘/i2c@ff160000–/i2c@ff170000›/mmc@ff0f0000¡/mmc@ff0c0000§/mmc@ff0d0000­/mmc@ff0e0000³/serial@ff180000»/serial@ff190000Ã/serial@ff690000Ë/serial@ff1b0000Ó/serial@ff1c0000Û/spi@ff110000à/spi@ff120000å/spi@ff130000ê/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0ï—˜™šúcpus rockchip,rk3066-smpcpu@500(cpuarm,cortex-a1248?Sbœ@pwr‘ cpu@501(cpuarm,cortex-a1248?Sbœ@pwrcpu@502(cpuarm,cortex-a1248?Sbœ@pwrcpu@503(cpuarm,cortex-a1248?Sbœ@pwropp-table-0operating-points-v2¥opp-126000000°‚›€· » opp-216000000° ßæ· » opp-408000000°Q–· » opp-600000000°#ÃF· » opp-696000000°)|·~ðopp-816000000°0£,·B@opp-1008000000°<Ü·opp-1200000000°G†Œ·Èàopp-1416000000°Tfr·O€opp-1512000000°ZJ·Ðopp-1608000000°_Ø"·Ö opp-1704000000°eú·™popp-1800000000°kIÒ·\Àreserved-memoryÅdma-unusable@fe0000004þoscillator fixed-clockÌn6Üxin24mï timerarm,armv7-timerü0ï   Ìn6 timer@ff810000rockchip,rk3288-timer4ÿ  ïH pa  7pclktimerdisplay-subsystemrockchip,display-subsystemC mmc@ff0c0000rockchip,rk3288-dw-mshcIðÑ€ pÈDrv7biuciuciu-driveciu-sampleW ï 4ÿ @8€breset ndisabledmmc@ff0d0000rockchip,rk3288-dw-mshcIðÑ€ pÉEsw7biuciuciu-driveciu-sampleW ï!4ÿ @8bresetnokayu³ ¾Ìdefault Úäñþ %btmrvl@2marvell,sd8897-bt4&ï2 ÌdefaultÚmmc@ff0e0000rockchip,rk3288-dw-mshcIðÑ€ pÊFtx7biuciuciu-driveciu-sampleW ï"4ÿ@8‚breset ndisabledmmc@ff0f0000rockchip,rk3288-dw-mshcIðÑ€ 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bstmmacethnokayž—®?ÅinputÒ@ÝrgmiiæAÌdefaultÚBCDEñú0  )'u0Bmdio0snps,dwmac-mdioethernet-phy@14@usb@ff500000 generic-ehci4ÿP ïpÂ>FCusbnokayMusb@ff520000 generic-ohci4ÿR ï)pÂ>FCusb ndisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24ÿT ïpÃ7otgchost>G Cusb2-phyknokay‚usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24ÿX ïpÁ7otgchost™«º€€@@ >H Cusb2-phynokayžz®H‚usb@ff5c0000 generic-ehci4ÿ\ ïpÄ ndisableddma-controller@ff600000arm,pl330arm,primecell4ÿ`@ïr}˜pÁ 7apb_pclk ndisabledi2c@ff650000rockchip,rk3288-i2c4ÿe ï<�7i2cpLÌdefaultÚInokayÌ€Õ2ídpmic@1brockchip,rk8084Üxin32kwifibt_32kin&-ïÌdefault ÚJKLÉBïêö&2>K+XeM MoN˜regulatorsDCDC_REG1|vdd_arm‹Ÿ± q°É áq regulator-state-memöDCDC_REG2|vdd_gpu‹Ÿ± 5ÉÐáq„regulator-state-memöDCDC_REG3 |vcc135_ddr‹Ÿregulator-state-memDCDC_REG4|vcc_18‹Ÿ±w@Éw@regulator-state-mem'w@LDO_REG3|vdd_10‹Ÿ±B@ÉB@regulator-state-mem'B@LDO_REG7 |vdd10_lcd‹Ÿ±B@ÉB@regulator-state-memöSWITCH_REG1 |vcc33_lcd‹Ÿdregulator-state-memöLDO_REG6 |vcc18_codec‹Ÿ±w@Éw@eregulator-state-memöLDO_REG2‹Ÿ±w@Éw@ |vdd18_lcdtregulator-state-memöLDO_REG8‹Ÿ±2Z É2Z  |vcc33_ccdregulator-state-memöSWITCH_REG2 |vcc33_lanAi2c@ff660000rockchip,rk3288-i2c4ÿf ï=7i2cpNÌdefaultÚOnokay̆ Õ2í max98090@10maxim,max980904&Pï7mclkpqÌdefaultÚQ¡pwm@ff680000rockchip,rk3288-pwm4ÿhCÌdefaultÚRp_nokay«pwm@ff680010rockchip,rk3288-pwm4ÿhCÌdefaultÚSp_nokaypwm@ff680020rockchip,rk3288-pwm4ÿh CÌdefaultÚTp_ ndisabledpwm@ff680030rockchip,rk3288-pwm4ÿh0CÌdefaultÚUp_ ndisabledsram@ff700000 mmio-sram4ÿp€Åÿp€smp-sram@0rockchip,rk3066-smp-sram4sram@ff720000#rockchip,rk3288-pmu-srammmio-sram4ÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd4ÿspower-controller!rockchip,rk3288-power-controllerNžh® ipower-domain@94 ÈpÊÍÈÌÅƾ¿ÔÕÖÙÑÒchgfdehilkj$bVWXYZ[\]^Npower-domain@114 pÏopb_`Npower-domain@124 pÐÜbaNpower-domain@134 pÀbbcNreboot-modesyscon-reboot-modei”pRBÃ|RBÊRBà šRBÃsyscon@ff740000rockchip,rk3288-sgrfsyscon4ÿtclock-controller@ff760000rockchip,rk3288-cru4ÿvp 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baxiahbdclk µjnokayport endpoint@04 ¼k€endpoint@14 ¼l{endpoint@24 ¼mtendpoint@34 ¼nwiommu@ff930300rockchip,iommu4ÿ“ ïpÅÑ 7aclkiface §i  nokayjvop@ff940000rockchip,rk3288-vop 4ÿ”œÿ” ïpÆ¿Ò7aclk_vopdclk_vophclk_vop §i 8°±² baxiahbdclk µonokayport endpoint@04 ¼pendpoint@14 ¼q|endpoint@24 ¼ruendpoint@34 ¼sxiommu@ff940300rockchip,iommu4ÿ” ïpÆÒ 7aclkiface §i  nokayodsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi4ÿ–@ ïp~d 7refpclk §i 8> ndisabledportsport@04endpoint@04 ¼tmendpoint@14 ¼urport@14lvds@ff96c000rockchip,rk3288-lvds4ÿ–À@pg 7pclk_lvdsÌlcdcÚv §i 8> ndisabledportsport@04endpoint@04 ¼wnendpoint@14 ¼xsport@14dp@ff970000rockchip,rk3288-dp4ÿ—@ ïbpic7dppclk>yCdp §i 8obdp8>nokayÌdefaultÚzportsport@04endpoint@04 ¼{lendpoint@14 ¼|qport@14endpoint@04 ¼}¯hdmi@ff980000rockchip,rk3288-dw-hdmi4ÿ˜e ïgphmn7iahbisfrcec §i 8> 9nokayÌdefaultunwedgeÚ~£portsport@04endpoint@04 ¼€kendpoint@14 ¼pport@14video-codec@ff9a0000rockchip,rk3288-vpu4ÿšï   ŽvepuvdpupÐÜ 7aclkhclk µ‚ §i iommu@ff9a0800rockchip,iommu4ÿš ï pÐÜ 7aclkiface  §i ‚iommu@ff9c0440rockchip,iommu 4ÿœ@@ÿœ€@ ïopÏÛ 7aclkiface  ndisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t7604ÿ£$ï ŽjobmmugpupÀ?ƒS §i nokay Ì„;opp-table-1operating-points-v2ƒopp-100000000°õá·~ðopp-200000000° ë·~ðopp-300000000°á£·B@opp-400000000°ׄ·Èàopp-600000000°#ÃF·Ðqos@ffaa0000rockchip,rk3288-qossyscon4ÿª bqos@ffaa0080rockchip,rk3288-qossyscon4ÿª€ cqos@ffad0000rockchip,rk3288-qossyscon4ÿ­ Wqos@ffad0100rockchip,rk3288-qossyscon4ÿ­ Xqos@ffad0180rockchip,rk3288-qossyscon4ÿ­€ Yqos@ffad0400rockchip,rk3288-qossyscon4ÿ­ Zqos@ffad0480rockchip,rk3288-qossyscon4ÿ­€ [qos@ffad0500rockchip,rk3288-qossyscon4ÿ­ Vqos@ffad0800rockchip,rk3288-qossyscon4ÿ­ \qos@ffad0880rockchip,rk3288-qossyscon4ÿ­€ ]qos@ffad0900rockchip,rk3288-qossyscon4ÿ­ ^qos@ffae0000rockchip,rk3288-qossyscon4ÿ® aqos@ffaf0000rockchip,rk3288-qossyscon4ÿ¯ _qos@ffaf0080rockchip,rk3288-qossyscon4ÿ¯€ `dma-controller@ffb20000arm,pl330arm,primecell4ÿ²@ïr}˜pÁ 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MAC_MDCMAC_RXDVMAC_RXERMAC_CLKPHY_TXENMAC_MDIOMAC_RXCLKPHY_RSTPHY_TXCLKUART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEgpio@ff7c0000rockchip,gpio-bank4ÿ| ïVpE þ  Ø í… USB_OTG_CTL1HUB_USB2_CTL1HUB_USB2_PWR_ENHUB_USB_ILIM_SELUSB_OTG_STATUS_LHUB_USB1_CTL1HUB_USB1_PWR_ENVCC50_HDMI_EN›gpio@ff7d0000rockchip,gpio-bank4ÿ} ïWpF þ  Ø í’ I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETHUB_USB2_nFALUTUSB_OTG_ILIM_SELPgpio@ff7e0000rockchip,gpio-bank4ÿ~ ïXpG þ  Ø í½ LCD_BL_PWMPWM_LOGBL_ENPWR_LED1TPM_INT_HSPK_ONAP_FLASH_WP_LCPU_NMIDVSOKEDP_HPDDVS1LCD_ENDVS2HDMI_CECI2C4_SDAI2C4_SCLI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXDMgpio@ff7f0000rockchip,gpio-bank4ÿ ïYpH þ  Ø í^ RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 *Žhdmi-cec-c7 *Žhdmi-ddc *ŽŽ~hdmi-ddc-unwedge *Žvcc50-hdmi-en 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