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þíÓ³8Ì(#ÌX 8,samsung,chagall-wifisamsung,exynos5420samsung,exynos57tablet)DSamsung Chagall WiFi based on Exynos5420aliasesJ/soc/i2c@12c60000O/soc/i2c@12c70000T/soc/i2c@12c80000Y/soc/i2c@12c90000^/soc/serial@12c00000f/soc/serial@12c10000n/soc/serial@12c20000v/soc/serial@12c30000~/soc/i2c@12ca0000ƒ/soc/i2c@12cb0000ˆ/soc/i2c@12cc0000/soc/i2c@12cd0000’/soc/phy@12100000/soc/phy@12500000¨/soc/pinctrl@13400000±/soc/pinctrl@13410000º/soc/pinctrl@14000000Ã/soc/pinctrl@14010000Ì/soc/pinctrl@3860000Õ/soc/i2c@12e00000Ú/soc/i2c@12e10000ß/soc/i2c@12e20000å/soc/video-scaler@13e00000ê/soc/video-scaler@13e10000ï/soc/spi@12d20000ô/soc/spi@12d30000ù/soc/spi@12d40000þ/soc/mmc@12200000/soc/mmc@12210000/soc/mmc@12220000soc,simple-bus
chipid@10000000,samsung,exynos4210-chipidmemory-controller@12250000,samsung,exynos4210-srom%interrupt-controller@10440000,samsung,exynos4210-combiner)> D€R
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m0m1dp-controller@145b0000,samsung,exynos5-dp[R
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regulatorsBUCK1ˆVDD_MIF_1V1—
®`¯Ö ÇÛregulator-state-memíBUCK2ˆVDD_ARM_1V0—5¯ã`ÇÛ]hregulator-state-memíBUCK3ˆVDD_INT_1V0—5¯\ÀÇÛregulator-state-memíBUCK4ˆVDD_G3D_1V0—
®`¯\ÀÇÛ]Nregulator-state-memíBUCK5ˆVDD_MEM_1V2—O€¯O€ÇÛregulator-state-memíBUCK6ˆVDD_KFC_1V0—5¯ã`ÇÛ]kregulator-state-memíBUCK7
ˆVIN_LLDO_1V4—O€¯ã`ÇBUCK8
ˆVIN_MLDO_2V0—w@¯ ÇBUCK9
ˆVIN_HLDO_3V5—-ÆÀ¯5gàÇBUCK10ˆVDD_CAM_ISP_1V0—q°¯6+0LDO1ˆVDD_ALIVE_1.0V—B@¯B@ÇLDO2
ˆVDD_APIO_1V8—w@¯w@ÇÛ]/regulator-state-memLDO3ˆVDD_APIO_MMC01_1V8—w@¯w@Ç]'regulator-state-memíLDO4ˆVDD_ADC_1V8—w@¯w@ÇÛregulator-state-memLDO5 ˆVDD_LDO5—w@¯w@LDO6
ˆVDD_MIPI_1V0—B@¯B@ÇÛregulator-state-memíLDO7ˆVDD_MIPI_PLL_ABB1_18V—w@¯w@ÇÛregulator-state-memíLDO8 ˆVDD_LDO8—w@¯w@LDO9
ˆVDD_UOTG_3V0—-ÆÀ¯-ÆÀÇÛ]regulator-state-memLDO10
ˆVDDQ_PRE_1V8—w@¯w@ÇÛ]Xregulator-state-memLDO11
ˆVDD_HSIC_1V0—B@¯B@ÇÛ]regulator-state-memLDO12
ˆVDD_HSIC_1V8—w@¯w@ÇÛregulator-state-memLDO13ˆVDD_APIO_MMC2_2V8—w@¯*¹€Û]7regulator-state-memíLDO14ˆVDD_MOTOR_3V0—-ÆÀ¯-ÆÀregulator-state-memíLDO15
ˆVDD_LDO15—2Z ¯2Z LDO16ˆVDD_AP_2V8—*¹€¯*¹€ÇÛregulator-state-memLDO17ˆVDD_IRLED_3V3—2Z ¯3ðÇÛregulator-state-memíLDO18
ˆVDD_LDO18—w@¯w@LDO19ˆVDD_VTF_2V8—*¹€¯*¹€]6regulator-state-memíLDO20ˆVDD_CAM1_CAM_1V8—w@¯w@regulator-state-memíLDO21ˆVDD_CAM_IO_1V8—w@¯w@regulator-state-memíLDO22ˆVDD_CAM0_S_CORE_1V1—¯O€regulator-state-memíLDO23
ˆVDD_MIFS_1V1—5¯ÈàÇregulator-state-memLDO24ˆVDD_TSP_3V3—2Z ¯2Z regulator-state-memíLDO25
ˆVDD_LDO25—5¯i2c4-hs-bus-pinsgpa2-0gpa2-12B]i2c5-hs-bus-pinsgpa2-2gpa2-32B]i2s1-bus-pins#gpb0-0gpb0-1gpb0-2gpb0-3gpb0-42B];pcm1-bus-pins#gpb0-0gpb0-1gpb0-2gpb0-3gpb0-42Bi2s2-bus-pins#gpb1-0gpb1-1gpb1-2gpb1-3gpb1-42B]<�pcm2-bus-pins#gpb1-0gpb1-1gpb1-2gpb1-3gpb1-42Bspdif-bus-pinsgpb1-0gpb1-12Bspi2-bus-pinsgpb1-1gpb1-3gpb1-42B]?i2c6-hs-bus-pinsgpb1-3gpb1-42B]pwm0-out-pinsgpb2-02Bpwm1-out-pinsgpb2-12Bpwm2-out-pinsgpb2-22Bpwm3-out-pinsgpb2-32Bi2c7-hs-bus-pinsgpb2-2gpb2-32B]i2c0-bus-pinsgpb3-0gpb3-12B]i2c1-bus-pinsgpb3-2gpb3-32B]i2c8-hs-bus-pinsgpb3-4gpb3-52B]Ai2c9-hs-bus-pinsgpb3-6gpb3-72B]Bi2c10-hs-bus-pinsgpb4-0gpb4-12B]Cpinctrl@3860000,samsung,exynos5420-pinctrl†R/ûgpz-gpio-bankô)i2s0-bus-pins*gpz-0gpz-1gpz-2gpz-3gpz-4gpz-5gpz-62B]:dma-controller@3880000,arm,pl330arm,primecellˆRne8
lapb_pclkRû]9dma-controller@121a0000,arm,pl330arm,primecellR"ej lapb_pclkR]dma-controller@121b0000,arm,pl330arm,primecellR#ek lapb_pclkR]dma-controller@10800000,arm,pl330arm,primecell€R!eÙ lapb_pclkRdma-controller@11c10000,arm,pl330arm,primecellÁR|eº lapb_pclkR ždisabledi2s@3830000,samsung,exynos5420-i2sƒx999
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Gžokayrotator@11c00000,samsung,exynos5250-rotatorÀdRTe¹lrotator Hvideo-scaler@13e00000+,samsung,exynos5420-gscsamsung,exynos5-gscàRUeÑlgsclûI Jvideo-scaler@13e10000+,samsung,exynos5420-gscsamsung,exynos5-gscáRVeÒlgsclûI Kgpu@11800000&,samsung,exynos5420-maliarm,mali-t628€P$RÛJuÜjobmmugpueõlcoreûL‘Mžokay¥´Nopp-table,operating-points-v2]Mopp-177000000À
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ltmu_apbifèþX]atmu@10064000,samsung,exynos5420-tmu@R·e>
ltmu_apbifèþX]btmu@10068000$,samsung,exynos5420-tmu-ext-triminfo€ÀR¸e>>ltmu_apbiftmu_triminfo_apbifèþX]ctmu@1006c000$,samsung,exynos5420-tmu-ext-triminfoÀ
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€R×e?>ltmu_apbiftmu_triminfo_apbifèþX]esysmmu@10a60000,samsung,exynos-sysmmu¦Rlsysmmumastere÷á
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]sysmmu@14650000,samsung,exynos-sysmmueRlsysmmumastereö¯û
]Gsysmmu@13e80000,samsung,exynos-sysmmuèRlsysmmumastereÍÑûI
]Jsysmmu@13e90000,samsung,exynos-sysmmuéRlsysmmumastereÎÒûI
]Ksysmmu@12880000,samsung,exynos-sysmmuˆRlsysmmumastere€}ûO
]Psysmmu@12890000,samsung,exynos-sysmmu‰Rºlsysmmumastere~ûO
]Rsysmmu@128a0000,samsung,exynos-sysmmuŠR¼lsysmmumastere‚ûO
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]Qsysmmu@128d0000,samsung,exynos-sysmmuRlsysmmumastere~ûO
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]Usysmmu@11d40000,samsung,exynos-sysmmuÔRlsysmmumastere»¹
]Hsysmmu@11f10000,samsung,exynos-sysmmuñRlsysmmumastereÅÃ
]Vsysmmu@11f20000,samsung,exynos-sysmmuòR©lsysmmumastereÆÄ
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]!sysmmu@14640000,samsung,exynos-sysmmudRlsysmmumastere¦¥û
]sysmmu@14680000,samsung,exynos-sysmmuhRlsysmmumastere§¥û
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*n6bus-disp1,samsung,exynos-buselbus ždisabledbus-disp1-fimd,samsung,exynos-buselbus ždisabledbus-fsys,samsung,exynos-buselbus ždisabledbus-fsys2,samsung,exynos-buselbus ždisabledbus-fsys-apb,samsung,exynos-buselbus ždisabledbus-g2d,samsung,exynos-buselbus ždisabledbus-g2d-acp,samsung,exynos-buselbus ždisabledbus-gen,samsung,exynos-buse
lbus ždisabledbus-gscl-scaler,samsung,exynos-buselbus ždisabledbus-jpeg,samsung,exynos-buselbus ždisabledbus-jpeg-apb,samsung,exynos-buselbus ždisabledbus-mfc,samsung,exynos-buselbus ždisabledbus-mscl,samsung,exynos-buselbus ždisabledbus-noc,samsung,exynos-buselbus ždisabledbus-peri,samsung,exynos-buselbus ždisabledbus-wcore,samsung,exynos-buselbus ždisabledopp-table-0,operating-points-v2:]gopp-1800000000ÀkIÒÇÐÐã`E"àopp-1700000000ÀeSñÇ€T€Tã`E"àopp-1600000000À_^ÇíØíØã`E"àopp-1500000000ÀYh/Ç[\[\ã`E"àopp-1400000000ÀSrNÇù´ù´ã`E"àopp-1300000000ÀM|mÇ6d6dã`E"àopp-1200000000ÀG†ŒÇÔ¼Ô¼ã`E"àopp-1100000000ÀA«Çssã`E"àopp-1000000000À;šÊÇllã`E"àopp-900000000À5¤éǯįÄã`E"àopp-800000000À/¯ÇNNã`E"àopp-700000000À)¹'Ç
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lext_clock]( interrupt-parent#address-cells#size-cellscompatiblechassis-typemodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3i2c4i2c5i2c6i2c7usbdrdphy0usbdrdphy1pinctrl0pinctrl1pinctrl2pinctrl3pinctrl4i2c8i2c9i2c10gsc0gsc1spi0spi1spi2mmc0mmc1mmc2rangesreg#interrupt-cellsinterrupt-controllersamsung,combiner-nrinterruptsphandleclocksclock-namesdmasdma-namessamsung,sysreg-phandlestatuspinctrl-namespinctrl-0samsung,pwm-outputs#pwm-cellsinterrupt-namessamsung,sysregpower-domainsiommusiommu-namesphysphy-namesinterrupts-extendedsamsung,syscon-phandle#io-channel-cells#clock-cellsclock-output-namesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendvdd33-supplyvdd10-supplysnps,dis_u3_susphy_quirkdr_mode#phy-cellssamsung,pmu-sysconsamsung,pmureg-phandleinterface-typefifo-depthbus-widthcap-mmc-highspeedcard-detect-delaymmc-ddr-1_8vmmc-hs200-1_8vnon-removablesamsung,dw-mshc-ciu-divsamsung,dw-mshc-ddr-timingsamsung,dw-mshc-sdr-timingvqmmc-supplycap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqcd-gpiossd-uhs-sdr50vmmc-supplysamsung,syscon-clkevent-name#power-domain-cellslabelgpio-controller#gpio-cellssamsung,pinssamsung,pin-functionsamsung,pin-pudsamsung,pin-drv#dma-cells#sound-dai-cellssamsung,idma-addrphyhdmi-phandleoperating-points-v2#cooling-cellsmali-supplyopp-hzopp-microvoltregmapoffsetmask#thermal-sensor-cellsvtmu-supply#iommu-cellsinterrupt-affinityclock-frequencyopp-sharedclock-latency-nsthermal-sensorspolling-delay-passivepolling-delaytemperaturehysteresiscpudevice_typecci-control-portcapacity-dmips-mhzcpu-supplystdout-pathdebounce-intervallinux,codewakeup-sourcereset-gpios