Ð þíB,81Ä(h1Œ(ti,dra72-evmti,dra722ti,dra72ti,dra7&7TI DRA722 Rev C EVMchosenB=/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?X/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0Bb/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bj/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0B‚/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0BŠ/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0B’/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0Bš/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0B¢/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0Eª/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0X²/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@1X¼/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@2BÆ/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0?Í/ocp/interconnect@48400000/segment@0/target-module@80000/can@0"Ô/ocp/target-module@4b300000/spi@0Ù/ocp/ipu@58820000à/ocp/ipu@55020000ç/ocp/dsp@40800000 î/connectortimerarm,armv7-timer ÷disabled0þ   &interrupt-controller@48211000arm,cortex-a15-gic @/H!H! H!@ H!`  þ &3interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpu /H(&3 cpuscpu@0;cpuarm,cortex-a15/G[bcpun“à|‹–3opp-tableoperating-points-v2-ti-cpu¡3opp-1000000000¨;šÊ¯,  øPŒ0,  øPŒ0½ÿÎopp-1176000000¨FV¯³@ ³@³@ ³@½ÿopp-1500000000¨Yh/¯v~ðÐv~ðнÿocpsimple-pm-busÚ[ èÀ€l3-noc@44000000ti,dra7-l3-noc/DE ú interconnect@4a000000ti,dra7-l4-cfgsimple-pm-busÚ  [ bfck/JJJ aplaia0$èJJ J segment@0simple-pm-bus\è @@PP``€€   ``ppàà €€€ € € €       Ð Ð à à@@PP``pp € € €target-module@2000ti,sysc-omap4ti,sysc/ rev è scm@0ti,dra7-scm-coresimple-bus/  è scm_conf@0sysconsimple-bus/ è3pbias_regulator@e00ti,pbias-dra7ti,pbias-omap/¡pbias_mmc_omap5pbias_mmc_omap5'w@?2Z 3¨phy-gmii-sel@554ti,dra7xx-phy-gmii-sel/TW3Îclocksclock-dss-deshdcp-0@558bti,gate-clockodss_deshdcp_clk[‚/Xclock-ehrpwm0-tbclk-20@558bti,gate-clockoehrpwm0_tbclk[‚/X3Æclock-ehrpwm1-tbclk-21@558bti,gate-clockoehrpwm1_tbclk[‚/X3Çclock-ehrpwm2-tbclk-22@558bti,gate-clockoehrpwm2_tbclk[‚/X3Èclock-sys-32k@6c4b ti,mux-clock osys_32k_ck[‚/Ä3Upinmux@1400ti,dra7-padconfpinctrl-single/h ž ¼?ÿÿÿ3ždcan1-default-pinsÙÐ3˜dcan1-sleep-pinsÙÐ3—mmc1-default-pins0ÙTX\`dh3©mmc1-sdr12-pins0ÙTX\`dh3®mmc1-hs-pins0ÙTX\`dh3­mmc1-sdr25-pins0ÙTX\`dh3¯mmc1-sdr50-pins0ÙTðXð\ð`ðdðhð3°mmc1-ddr50-rev10-pins0ÙTàXà\à`àdàhàmmc1-ddr50-rev20-pins0ÙTX\`dh3±mmc1-sdr104-pins0ÙTX\`dh3³mmc2-default-pinsPÙœ° ¤¨¬Œ”˜3µmmc2-hs-pinsPÙœ° ¤¨¬Œ”˜3¶mmc2-ddr-rev10-pinsPÙŒ”˜œ ¤¨¬°mmc2-ddr-rev20-pinsPÙœ° ¤¨¬Œ”˜3·mmc2-hs200-pinsPÙœ° ¤¨¬Œ”˜3¹mmc4-default-pins0Ùèìðôøü3¾scm_conf@1c04syscon/ í3Þscm_conf@1c24syscon/$$3ddma-router@b78ti,dra7-dma-crossbar/ xüûÍ#3›dma-router@c78ti,dra7-dma-crossbar/ x|ûÌ#3Étarget-module@5000ti,sysc-omap4ti,sysc/Prev èPcm_core_aon@0ti,dra7-cm-core-aonsimple-bus/  è clocksclock-atl-clkin0bti,dra7-atl-clockoatl_clkin0_ck [3Âclock-atl-clkin1bti,dra7-atl-clockoatl_clkin1_ck [3Ãclock-atl-clkin2bti,dra7-atl-clockoatl_clkin2_ck [3Äclock-atl-clkin3bti,dra7-atl-clockoatl_clkin3_ck [3Åclock-hdmi-clkinb fixed-clockohdmi_clkin_ck/35clock-mlb-clkinb fixed-clock omlb_clkin_ck/3”clock-mlbp-clkinb fixed-clockomlbp_clkin_ck/3•clock-pciesref-acsb fixed-clockopciesref_acs_clk_ck/õá3Eclock-ref-clkin0b fixed-clockoref_clkin0_ck/clock-ref-clkin1b fixed-clockoref_clkin1_ck/clock-ref-clkin2b fixed-clockoref_clkin2_ck/clock-ref-clkin3b fixed-clockoref_clkin3_ck/clock-rmiib fixed-clock ormii_clk_ck/clock-sdvenc-clkinb fixed-clockosdvenc_clkin_ck/clock-secure-32k-clk-srcb fixed-clockosecure_32k_clk_src_ck/€3~clock-sys-clk32-crystalb fixed-clockosys_clk32_crystal_ck/€3clock-sys-clk32-pseudobfixed-factor-clockosys_clk32_pseudo_ck[?Jb3clock-virt-12000000b fixed-clockovirt_12000000_ck/·3lclock-virt-13000000b fixed-clockovirt_13000000_ck/Æ]@clock-virt-16800000b fixed-clockovirt_16800000_ck/Y3nclock-virt-19200000b fixed-clockovirt_19200000_ck/$ø3oclock-virt-20000000b fixed-clockovirt_20000000_ck/1-3mclock-virt-26000000b fixed-clockovirt_26000000_ck/Œº€3pclock-virt-27000000b fixed-clockovirt_27000000_ck/›üÀ3qclock-virt-38400000b fixed-clockovirt_38400000_ck/Ið3rclock-sys-clkin2b fixed-clock osys_clkin2/Xˆ3sclock-usb-otg-clkinb fixed-clockousb_otg_clkin_ck/3{clock-video1-clkinb fixed-clockovideo1_clkin_ck/3?clock-video1-m2-clkinb fixed-clockovideo1_m2_clkin_ck/34clock-video2-clkinb fixed-clockovideo2_clkin_ck/3@clock-video2-m2-clkinb fixed-clockovideo2_m2_clkin_ck/33clock@1e0bti,omap4-dpll-m4xen-clock odpll_abe_ck[/àäìè3clock-dpll-abe-x2bti,omap4-dpll-x2-clockodpll_abe_x2_ck[3clock-dpll-abe-m2x2-8@1f0bti,divider-clockodpll_abe_m2x2_ck[T_/ðqˆ3clock-abe@108bti,divider-clockoabe_clk[T/Ÿ3uclock-dpll-abe-m2-8@1f0bti,divider-clockodpll_abe_m2_ck[T_/ðqˆ3wclock-dpll-abe-m3x2-8@1f4bti,divider-clockodpll_abe_m3x2_ck[T_/ôqˆ3clock@12c ti,clksel/,bclock@23/ ti,mux-clockodpll_core_byp_mux[b3clock@120bti,omap4-dpll-core-clock odpll_core_ck[/ $,(3clock-dpll-core-x2bti,omap4-dpll-x2-clockodpll_core_x2_ck[3clock-dpll-core-h12x2-8@13cbti,divider-clockodpll_core_h12x2_ck[T?_/<�qˆ3 clock-mpu-dpll-hs-clk-divbfixed-factor-clockompu_dpll_hs_clk_div[ ?J3!clock@160bti,omap5-mpu-dpll-clock odpll_mpu_ck[!/`dlh3clock-dpll-mpu-m2-8@170bti,divider-clockodpll_mpu_m2_ck[T_/pqˆ3"clock-mpu-dclk-divbfixed-factor-clock ompu_dclk_div["?J3‚clock-dsp-dpll-hs-clk-divbfixed-factor-clockodsp_dpll_hs_clk_div[ ?J3#clock@240 ti,clksel/@bclock@23/ ti,mux-clockodpll_dsp_byp_mux[#b3$clock@234bti,omap4-dpll-clock odpll_dsp_ck[$/48@<�µ%Å#ÃF3%clock-dpll-dsp-m2-8@244bti,divider-clockodpll_dsp_m2_ck[%T_/Dqˆµ&Å#ÃF3&clock-iva-dpll-hs-clk-divbfixed-factor-clockoiva_dpll_hs_clk_div[ ?J3'clock@1ac ti,clksel/¬bclock@23/ ti,mux-clockodpll_iva_byp_mux['b3(clock@1a0bti,omap4-dpll-clock odpll_iva_ck[(/ ¤¬¨µ)ÅEp}@3)clock-dpll-iva-m2-8@1b0bti,divider-clockodpll_iva_m2_ck[)T_/°qˆµ*Å%3*clock-iva-dclkbfixed-factor-clock oiva_dclk[*?J3„clock@2e4 ti,clksel/äbclock@23/ ti,mux-clockodpll_gpu_byp_mux[b3+clock@2d8bti,omap4-dpll-clock odpll_gpu_ck[+/ØÜäàµ,ÅLy@3,clock-dpll-gpu-m2-8@2e8bti,divider-clockodpll_gpu_m2_ck[,T_/èqˆµ-Å_(k3-clock-dpll-core-m2-8@130bti,divider-clockodpll_core_m2_ck[T_/0qˆ3.clock-core-dpll-out-dclk-divbfixed-factor-clockocore_dpll_out_dclk_div[.?J3†clock@21c ti,clksel/bclock@23/ ti,mux-clockodpll_ddr_byp_mux[b3/clock@210bti,omap4-dpll-clock odpll_ddr_ck[//30clock-dpll-ddr-m2-8@220bti,divider-clockodpll_ddr_m2_ck[0T_/ qˆ3xclock@2b4 ti,clksel/´bclock@23/ ti,mux-clockodpll_gmac_byp_mux[b31clock@2a8bti,omap4-dpll-clock odpll_gmac_ck[1/¨¬´°32clock-dpll-gmac-m2-8@2b8bti,divider-clockodpll_gmac_m2_ck[2T_/¸qˆ3yclock-video2-dclk-divbfixed-factor-clockovideo2_dclk_div[3?J3ˆclock-video1-dclk-divbfixed-factor-clockovideo1_dclk_div[4?J3‰clock-hdmi-dclk-divbfixed-factor-clockohdmi_dclk_div[5?J3Šclock-per-dpll-hs-clk-divbfixed-factor-clockoper_dpll_hs_clk_div[?J3Hclock-usb-dpll-hs-clk-divbfixed-factor-clockousb_dpll_hs_clk_div[?J3Lclock-eve-dpll-hs-clk-divbfixed-factor-clockoeve_dpll_hs_clk_div[ ?J36clock@290 ti,clksel/bclock@23/ ti,mux-clockodpll_eve_byp_mux[6b37clock@284bti,omap4-dpll-clock odpll_eve_ck[7/„ˆŒ38clock-dpll-eve-m2-8@294bti,divider-clockodpll_eve_m2_ck[8T_/”qˆ39clock-eve-dclk-divbfixed-factor-clock oeve_dclk_div[9?J3“clock-dpll-core-h13x2-8@140bti,divider-clockodpll_core_h13x2_ck[T?_/@qˆclock-dpll-core-h14x2-8@144bti,divider-clockodpll_core_h14x2_ck[T?_/Dqˆ3Vclock-dpll-core-h22x2-8@154bti,divider-clockodpll_core_h22x2_ck[T?_/Tqˆ3Bclock-dpll-core-h23x2-8@158bti,divider-clockodpll_core_h23x2_ck[T?_/Xqˆ3[clock-dpll-core-h24x2-8@15cbti,divider-clockodpll_core_h24x2_ck[T?_/\qˆclock-dpll-ddr-x2bti,omap4-dpll-x2-clockodpll_ddr_x2_ck[03:clock-dpll-ddr-h11x2-8@228bti,divider-clockodpll_ddr_h11x2_ck[:T?_/(qˆclock-dpll-dsp-x2bti,omap4-dpll-x2-clockodpll_dsp_x2_ck[%3;clock-dpll-dsp-m3x2-8@248bti,divider-clockodpll_dsp_m3x2_ck[;T_/Hqˆµ<�Åׄ3<�clock-dpll-gmac-x2bti,omap4-dpll-x2-clockodpll_gmac_x2_ck[23=clock-dpll-gmac-h11x2-8@2c0bti,divider-clockodpll_gmac_h11x2_ck[=T?_/Àqˆ3>clock-dpll-gmac-h12x2-8@2c4bti,divider-clockodpll_gmac_h12x2_ck[=T?_/Äqˆclock-dpll-gmac-h13x2-8@2c8bti,divider-clockodpll_gmac_h13x2_ck[=T?_/Èqˆclock-dpll-gmac-m3x2-8@2bcbti,divider-clockodpll_gmac_m3x2_ck[=T_/¼qˆclock-gmii-m-clk-divbfixed-factor-clockogmii_m_clk_div[>?Jclock-hdmi-clk2-divbfixed-factor-clockohdmi_clk2_div[5?Jclock-hdmi-divbfixed-factor-clock ohdmi_div_clk[5?Jclock@100 ti,clksel/bclock@4/ti,divider-clock ol3_iclk_divT[ Ÿb3clock-l4-root-clk-divbfixed-factor-clockol4_root_clk_div[?J3clock-video1-clk2-divbfixed-factor-clockovideo1_clk2_div[??Jclock-video1-divbfixed-factor-clockovideo1_div_clk[??Jclock-video2-clk2-divbfixed-factor-clockovideo2_clk2_div[@?Jclock-video2-divbfixed-factor-clockovideo2_div_clk[@?Jclock-dummyb fixed-clock odummy_ck/clockdomainsclock@300 ti,omap4-cmompu_cm/ èclock@20 ti,clkctrl ompu_clkctrl/ b3Áclock@400 ti,omap4-cmodsp1_cm/ èclock@20 ti,clkctrl odsp1_clkctrl/ b3öclock@500 ti,omap4-cmoipu_cm/ èclock@20 ti,clkctrl oipu1_clkctrl/ b µAÚB3Aclock@50 ti,clkctrl oipu_clkctrl/P4b3clock@600 ti,omap4-cmodsp2_cm/ èclock@20 ti,clkctrl odsp2_clkctrl/ bclock@700 ti,omap4-cmortc_cm/` è`clock@20 ti,clkctrl ortc_clkctrl/ (b3Ôclock@760 ti,omap4-cmovpe_cm/`  è` clock@0 ti,clkctrl ovpe_clkctrl/ b3Ûtarget-module@8000ti,sysc-omap4ti,sysc/€rev è€ cm_core@0ti,dra7-cm-coresimple-bus/0 è0clocksclock@200bti,omap4-dpll-clockodpll_pcie_ref_ck[/ 3Cclock-dpll-pcie-ref-m2ldo-8@210bti,divider-clockodpll_pcie_ref_m2ldo_ck[CT_/qˆ3Dclock-apll-pcie-in-clk-mux-7@4ae06118 ti,mux-clockoapll_pcie_in_clk_mux[DEb/‚3Fclock@21cbti,dra7-apll-clock oapll_pcie_ck[FC/ 3Gclock-optfclk-pciephy-div-8@4a00821cti,divider-clockooptfclk_pciephy_div[Gb/ñ‚T3fclock-apll-pcie-clkvcoldobfixed-factor-clockoapll_pcie_clkvcoldo[G?Jclock-apll-pcie-clkvcoldo-divbfixed-factor-clockoapll_pcie_clkvcoldo_div[G?Jclock-apll-pcie-m2bfixed-factor-clockoapll_pcie_m2_ck[G?J3}clock@14c ti,clksel/Lbclock@23/ ti,mux-clockodpll_per_byp_mux[Hb3Iclock@140bti,omap4-dpll-clock odpll_per_ck[I/@DLH3Jclock-dpll-per-m2-8@150bti,divider-clockodpll_per_m2_ck[JT_/Pqˆ3Kclock-func-96m-aon-dclk-divbfixed-factor-clockofunc_96m_aon_dclk_div[K?J3‹clock@18c ti,clksel/Œbclock@23/ ti,mux-clockodpll_usb_byp_mux[Lb3Mclock@180bti,omap4-dpll-j-type-clock odpll_usb_ck[M/€„Œˆ3Nclock-dpll-usb-m2-8@190bti,divider-clockodpll_usb_m2_ck[NT_/qˆ3Rclock-dpll-pcie-ref-m2-8@210bti,divider-clockodpll_pcie_ref_m2_ck[CT_/qˆ3|clock-dpll-per-x2bti,omap4-dpll-x2-clockodpll_per_x2_ck[J3Oclock-dpll-per-h11x2-8@158bti,divider-clockodpll_per_h11x2_ck[OT?_/Xqˆ3Pclock-dpll-per-h12x2-8@15cbti,divider-clockodpll_per_h12x2_ck[OT?_/\qˆclock-dpll-per-h13x2-8@160bti,divider-clockodpll_per_h13x2_ck[OT?_/`qˆclock-dpll-per-h14x2-8@164bti,divider-clockodpll_per_h14x2_ck[OT?_/dqˆ3Wclock-dpll-per-m2x2-8@150bti,divider-clockodpll_per_m2x2_ck[OT_/Pqˆ3Qclock-dpll-usb-clkdcoldobfixed-factor-clockodpll_usb_clkdcoldo[N?J3Tclock-func-128mbfixed-factor-clockofunc_128m_clk[P?Jclock-func-12m-fclkbfixed-factor-clockofunc_12m_fclk[Q?Jclock-func-24mbfixed-factor-clock ofunc_24m_clk[K?Jclock-func-48m-fclkbfixed-factor-clockofunc_48m_fclk[Q?Jclock-func-96m-fclkbfixed-factor-clockofunc_96m_fclk[Q?Jclock-l3init-60m@104bti,divider-clockol3init_60m_fclk[R/ñclock-clkout2-8@6b0bti,gate-clock oclkout2_clk[S‚/°clock-l3init-960m-gfclk-8@6c0bti,gate-clockol3init_960m_gfclk[T‚/Àclock-usb-phy1-always-on-clk32k-8@640bti,gate-clockousb_phy1_always_on_clk32k[U‚/@3`clock-usb-phy2-always-on-clk32k-8@688bti,gate-clockousb_phy2_always_on_clk32k[U‚/ˆ3bclock-usb-phy3-always-on-clk32k-8@698bti,gate-clockousb_phy3_always_on_clk32k[U‚/˜3cclock-gpu-core-gclk-mux-24@1220b ti,mux-clockogpu_core_gclk_mux [VW-‚/ µXÚ-3Xclock-gpu-hyd-gclk-mux-26@1220b ti,mux-clockogpu_hyd_gclk_mux [VW-‚/ µYÚ-3Yclock-l3instr-ts-gclk-div-24@e50bti,divider-clockol3instr_ts_gclk_div[Z‚/P ñ clock-vip1-gclk-mux-24@1020b ti,mux-clockovip1_gclk_mux[[‚/ clock-vip2-gclk-mux-24@1028b ti,mux-clockovip2_gclk_mux[[‚/(clock-vip3-gclk-mux-24@1030b ti,mux-clockovip3_gclk_mux[[‚/0clockdomainsclock-coreaon-clkdmti,clockdomainocoreaon_clkdm[Nclock@600 ti,omap4-cm ocoreaon_cm/ èclock@20 ti,clkctrlocoreaon_clkctrl/ b3gclock@700 ti,omap4-cm ol3main1_cm/ èclock@20 ti,clkctrlol3main1_clkctrl/ tb3 clock@900 ti,omap4-cmoipu2_cm/  è clock@20 ti,clkctrl oipu2_clkctrl/ b3ìclock@a00 ti,omap4-cmodma_cm/  è clock@20 ti,clkctrl odma_clkctrl/ b3^clock@b00 ti,omap4-cmoemif_cm/  è clock@20 ti,clkctrl oemif_clkctrl/ bclock@c00 ti,omap4-cmoatl_cm/  è clock@0 ti,clkctrl oatl_clkctrl/b3clock@d00 ti,omap4-cm ol4cfg_cm/  è clock@20 ti,clkctrlol4cfg_clkctrl/ „b3 clock@e00 ti,omap4-cm ol3instr_cm/ èclock@20 ti,clkctrlol3instr_clkctrl/ b3 clock@f00 ti,omap4-cmoiva_cm/ èclock@20 ti,clkctrl oiva_clkctrl/ b3clock@1000 ti,omap4-cmocam_cm/ èclock@20 ti,clkctrl ocam_clkctrl/ ,b3Ñclock@1100 ti,omap4-cmodss_cm/ èclock@20 ti,clkctrl odss_clkctrl/ b3ÿclock@1200 ti,omap4-cmogpu_cm/ èclock@20 ti,clkctrl ogpu_clkctrl/ b3þclock@1300 ti,omap4-cm ol3init_cm/ èclock@20 ti,clkctrlol3init_clkctrl/ làb3_clock@b0 ti,clkctrl opcie_clkctrl/° b3eclock@d0 ti,clkctrl ogmac_clkctrl/Ðb3Êclock@1700 ti,omap4-cm ol4per_cm/ èclock@28 ti,clkctrlol4per_clkctrl(/(d $ð<�@pb µ\\Ú]3šclock@1a0 ti,clkctrlol4sec_clkctrl/ ,b3§clock@c ti,clkctrlol4per2_clkctrl@/   Ä8` x$Ð<�b3\clock@14 ti,clkctrlol4per3_clkctrl/È0b3Ótarget-module@56000ti,sysc-omap2ti,sysc/``,`(revsyscsyssý# & [^bfck è`dma-controller@0ti,omap4430-sdmati,omap-sdma/0þ  û3 3target-module@5e000ti,sysc ÷disabled èà target-module@80000ti,sysc-omap2ti,sysc/revsyscsyssý & [_Àbfck è€ocp2scp@0ti,omap-ocp2scp è€/ phy@4000ti,dra7x-usb2ti,omap-usb2/@@[`_ÐbwkupclkrefclkWQa3Öphy@5000 ti,dra7x-usb2-phy2ti,omap-usb2/P@t[b_ bwkupclkrefclkWQa3Ùphy@4400 ti,omap-usb3/D€HdL@phy_rxphy_txpll_ctrl@p[c_ÐbwkupclksysclkrefclkW3×target-module@90000ti,sysc-omap2ti,sysc/   revsyscsyssý & [_Èbfck è €ocp2scp@0ti,omap-ocp2scp è€/ pciephy@4000ti,phy-pipe3-pcie/@€Ddphy_rxphy_tx@d\d4[CDee e f;bdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkW3Üpciephy@5000ti,phy-pipe3-pcie/P€Tdphy_rxphy_tx@d \d4[CDee e f;bdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkW ÷disabled3ßphy@6000ti,phy-pipe3-sata/`€ddh@phy_rxphy_txpll_ctrl@t[_hbsysclkrefclkgüW3itarget-module@a0000ti,sysc ÷disabled è €target-module@d9000ti,sysc-omap4-srti,sysc/ 8syscý [gbfck è target-module@dd000ti,sysc-omap4-srti,sysc/ Ð8syscý [gbfck è Ðtarget-module@e0000ti,sysc ÷disabled ètarget-module@f4000ti,sysc-omap4ti,sysc/@@ revsyscý  [ bfck è@mailbox@0ti,omap4-mailbox/$þ‡†wƒ• ÷disabledtarget-module@f6000ti,sysc-omap2ti,sysc/```revsyscsyssý & [ bfck è`spinlock@0ti,omap4-hwspinlock/§segment@100000simple-pm-bus¸è  00€€  00@@PP``pp€€°°ÀÀÐÐààðð  00@@PP``pp€€ÐÐàà  00@@PP``pp€€  00@@PP``pp€€    °°ÀÀ°°ÀÀÐÐàà  target-module@2000ti,sysc ÷disabled è target-module@8000ti,sysc ÷disabled è€target-module@40000ti,sysc-omap4ti,sysc/ü revsysc  Úh [_hbfck èsata@0snps,dwc-ahci/ þ1µi ºsata-phy [_hÄtarget-module@51000ti,sysc ÷disabled ètarget-module@53000ti,sysc ÷disabled è0target-module@55000ti,sysc ÷disabled èPtarget-module@57000ti,sysc ÷disabled èptarget-module@59000ti,sysc ÷disabled ètarget-module@5b000ti,sysc ÷disabled è°target-module@5d000ti,sysc ÷disabled èÐtarget-module@5f000ti,sysc ÷disabled èðtarget-module@61000ti,sysc ÷disabled ètarget-module@63000ti,sysc ÷disabled è0target-module@65000ti,sysc ÷disabled èPtarget-module@67000ti,sysc ÷disabled èptarget-module@69000ti,sysc ÷disabled ètarget-module@6b000ti,sysc ÷disabled è°target-module@6d000ti,sysc ÷disabled èÐtarget-module@71000ti,sysc ÷disabled ètarget-module@73000ti,sysc ÷disabled è0target-module@75000ti,sysc ÷disabled èPtarget-module@77000ti,sysc ÷disabled èptarget-module@79000ti,sysc ÷disabled ètarget-module@7b000ti,sysc ÷disabled è°target-module@7d000ti,sysc ÷disabled èÐtarget-module@81000ti,sysc ÷disabled ètarget-module@83000ti,sysc ÷disabled è0target-module@85000ti,sysc ÷disabled èPtarget-module@87000ti,sysc ÷disabled èpsegment@200000simple-pm-busøè€!€!     ° °À ÀÐ Ðà àð ð!! ! 0!0@!@P!P " °"°À!ÀÐ!Ðà!àð!ð""@"@P"P`"`p"pÀ"ÀÐ"Ðà"àð"ð## # 0#0@#@P#P`#`p#p ! °!°target-module@0ti,sysc ÷disabled ètarget-module@a000ti,sysc ÷disabled è target-module@c000ti,sysc ÷disabled èÀtarget-module@e000ti,sysc ÷disabled èàtarget-module@10000ti,sysc ÷disabled ètarget-module@12000ti,sysc ÷disabled è target-module@14000ti,sysc ÷disabled è@target-module@18000ti,sysc ÷disabled è€target-module@1a000ti,sysc ÷disabled è target-module@1c000ti,sysc ÷disabled èÀtarget-module@1e000ti,sysc ÷disabled èàtarget-module@20000ti,sysc ÷disabled ètarget-module@24000ti,sysc ÷disabled è@target-module@26000ti,sysc ÷disabled è`target-module@2a000ti,sysc ÷disabled è target-module@2c000ti,sysc ÷disabled èÀtarget-module@2e000ti,sysc ÷disabled èàtarget-module@30000ti,sysc ÷disabled ètarget-module@32000ti,sysc ÷disabled è target-module@34000ti,sysc ÷disabled è@target-module@36000ti,sysc ÷disabled è`interconnect@4ae00000ti,dra7-l4-wkupsimple-pm-busÚj [kbfck/JàJàJà aplaia00èJàJáJâJãsegment@0simple-pm-buslè`` €€@@PPÀÀÐÐtarget-module@4000ti,sysc-omap2ti,sysc/@@ revsysc [k0bfck è@counter@0ti,omap-counter32k/@target-module@6000ti,sysc-omap4ti,sysc/`rev è` prm@0ti,dra7-prmsimple-bus/0 þ è0clocksclock-sys-clkin1@110b ti,mux-clock osys_clkin1[lmnopqr/q3clock@118 ti,clksel/bclock@0/ ti,mux-clockoabe_dpll_sys_clk_mux[sb3tclock-abe-dpll-bypass-clk-mux@114b ti,mux-clockoabe_dpll_bypass_clk_mux[tU/3clock-abe-dpll-clk-mux@10cb ti,mux-clockoabe_dpll_clk_mux[tU/ 3clock-abe-24m@11cbti,divider-clock oabe_24m_fclk[/ñ3]clock-aess@178bti,divider-clock oaess_fclk[u/xT3vclock-abe-giclk-div@174bti,divider-clockoabe_giclk_div[v/tTclock-abe-lp-clk-div@1d8bti,divider-clockoabe_lp_clk_div[/Øñ 3–clock-abe-sys-clk-div@120bti,divider-clockoabe_sys_clk_div[/ Tclock-adc-gfclk-mux@1dcb ti,mux-clockoadc_gfclk_mux [sU/Üclock-sys-clk1-dclk-div@1c8bti,divider-clockosys_clk1_dclk_div[T@/ÈŸ3clock-sys-clk2-dclk-div@1ccbti,divider-clockosys_clk2_dclk_div[sT@/ÌŸ3€clock-per-abe-x1-dclk-div@1bcbti,divider-clockoper_abe_x1_dclk_div[wT@/¼Ÿ3clock@18c ti,clksel/Œbclock@0/ti,divider-clock odsp_gclk_div[&T@Ÿb3ƒclock-gpu-dclk@1a0bti,divider-clock ogpu_dclk[-T@/ Ÿ3…clock-emif-phy-dclk-div@190bti,divider-clockoemif_phy_dclk_div[xT@/Ÿ3‡clock-gmac-250m-dclk-div@19cbti,divider-clockogmac_250m_dclk_div[yT@/œŸ3zclock-gmac-mainbfixed-factor-clockogmac_main_clk[z?J3Ëclock-l3init-480m-dclk-div@1acbti,divider-clockol3init_480m_dclk_div[RT@/¬Ÿ3Œclock-usb-otg-dclk-div@184bti,divider-clockousb_otg_dclk_div[{T@/„Ÿ3clock-sata-dclk-div@1c0bti,divider-clockosata_dclk_div[T@/ÀŸ3Žclock-pcie2-dclk-div@1b8bti,divider-clockopcie2_dclk_div[|T@/¸Ÿ3clock-pcie-dclk-div@1b4bti,divider-clockopcie_dclk_div[}T@/´Ÿ3clock-emu-dclk-div@194bti,divider-clock oemu_dclk_div[T@/”Ÿ3‘clock-secure-32k-dclk-div@1c4bti,divider-clockosecure_32k_dclk_div[~T@/ÄŸ3’clock-clkoutmux0-clk-mux@158b ti,mux-clockoclkoutmux0_clk_muxX[€‚ƒ„…†‡zˆ‰Š‹ŒŽ‘’“/Xclock-clkoutmux1-clk-mux@15cb ti,mux-clockoclkoutmux1_clk_muxX[€‚ƒ„…†‡zˆ‰Š‹ŒŽ‘’“/\clock-clkoutmux2-clk-mux@160b ti,mux-clockoclkoutmux2_clk_muxX[€‚ƒ„…†‡zˆ‰Š‹ŒŽ‘’“/`3Sclock-custefuse-sys-gfclk-divbfixed-factor-clockocustefuse_sys_gfclk_div[?Jclock-eve@180b ti,mux-clockoeve_clk[9<�/€clock-hdmi-dpll-clk-mux@164b ti,mux-clockohdmi_dpll_clk_mux[s/dclock-mlb@134bti,divider-clockomlb_clk[”T@/4Ÿclock-mlbp@130bti,divider-clock omlbp_clk[•T@/0Ÿclock-per-abe-x1-gfclk2-div@138bti,divider-clockoper_abe_x1_gfclk2_div[wT@/8Ÿclock-timer-sys-clk-div@144bti,divider-clockotimer_sys_clk_div[/DT3œclock-video1-dpll-clk-mux@168b ti,mux-clockovideo1_dpll_clk_mux[s/hclock-video2-dpll-clk-mux@16cb ti,mux-clockovideo2_dpll_clk_mux[s/lclock-wkupaon-iclk-mux@108b ti,mux-clockowkupaon_iclk_mux[–/3Zclockdomainsclock@1800 ti,omap4-cm owkupaon_cm/ èclock@20 ti,clkctrlowkupaon_clkctrl/ lb3kprm@300"ti,dra7-prm-instti,omap-prm-inst/Ö3Àprm@400"ti,dra7-prm-instti,omap-prm-inst/êÖ3õprm@500"ti,dra7-prm-instti,omap-prm-inst/êÖ3äprm@628"ti,dra7-prm-instti,omap-prm-inst/(ØÖ3 prm@700"ti,dra7-prm-instti,omap-prm-inst/êÖ3prm@f00"ti,dra7-prm-instti,omap-prm-inst/êÖ3prm@1000"ti,dra7-prm-instti,omap-prm-inst/Öprm@1100"ti,dra7-prm-instti,omap-prm-inst/Öprm@1200"ti,dra7-prm-instti,omap-prm-inst/Öprm@1300"ti,dra7-prm-instti,omap-prm-inst/êÖ3hprm@1400"ti,dra7-prm-instti,omap-prm-inst/Ö3™prm@1600"ti,dra7-prm-instti,omap-prm-inst/Öprm@1724"ti,dra7-prm-instti,omap-prm-inst/$Ö3jprm@1b00"ti,dra7-prm-instti,omap-prm-inst/@êÖprm@1b40"ti,dra7-prm-instti,omap-prm-inst/@@Öprm@1b80"ti,dra7-prm-instti,omap-prm-inst/€@Öprm@1bc0"ti,dra7-prm-instti,omap-prm-inst/À@Öprm@1c00"ti,dra7-prm-instti,omap-prm-inst/`Öprm@1c60"ti,dra7-prm-instti,omap-prm-inst/` Öprm@1c80"ti,dra7-prm-instti,omap-prm-inst/€€Ö3Útarget-module@c000ti,sysc-omap4ti,sysc/Àrev èÀscm_conf@0syscon/3segment@10000simple-pm-bus`è@@PP€€ÀÀÐÐtarget-module@0ti,sysc-omap2ti,sysc/revsyscsyssý&[kk bfckdbclk ègpio@0ti,omap4-gpio/ þ÷ target-module@4000ti,sysc-omap2ti,sysc/@@@revsyscsyssý"& [kbfck è@wdt@0 ti,omap3-wdt/€ þKtarget-module@8000ti,sysc-omap4-timerti,sysc/€€ revsyscý [k bfck è€'timer@0ti,omap5430-timer/€ [k bfck þ 2 µk ÚUtarget-module@c000ti,sysc ÷disabled èÀsegment@20000simple-pm-bus¨è``    00pp€€ˆˆŠŠ°°ÀÀððtarget-module@0ti,sysc-omap4-timerti,sysc/ revsyscý [k(bfck ètimer@0ti,omap5430-timer/€ þZ2Atarget-module@2000ti,sysc ÷disabled è target-module@6000ti,sysc ÷disabledHè`p €(ˆ*Š0target-module@b000ti,sysc-omap2ti,sysc/°P°T°Xrevsyscsyssý& [k`bfck è°serial@0ti,dra742-uart/ þÝ/Ül ÷disabledtarget-module@f000ti,sysc ÷disabled èðsegment@30000simple-pm-busœèÀÀ àà  00@@PP``pp€€  target-module@1000ti,sysc ÷disabled ètarget-module@3000ti,sysc ÷disabled è0target-module@5000ti,sysc ÷disabled èPtarget-module@7000ti,sysc ÷disabled èptarget-module@9000ti,sysc ÷disabled ètarget-module@c000ti,sysc-omap4ti,sysc/À rev [khbfck èÀ can@0ti,dra7-d_can/  QX þÞ [kh÷okay`defaultsleepactiven—x—‚˜interconnect@48000000ti,dra7-l4-per1simple-pm-busÚ™ [š˜bfck0/HHHHHHaplaia0ia1ia2ia3èH H segment@0simple-pm-busüè  00@@PP``ppààððPP``pp€€  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  0000@@  0 0€€``pp€€   € €       ° ° À À РЀ€  @ @ ` ` € €@ À À Ð Ð à à``pp @ @ P P € €       ° °    P P ` `  0 0 P P  °°ÀÀÐÐtarget-module@20000ti,sysc-omap2ti,sysc/PTXrevsyscsyssý& [š(bfck èserial@0ti,dra742-uart/ þE/Ül ÷disabledŒ›5›6‘txrxtarget-module@32000ti,sysc-omap4-timerti,sysc/   revsyscý [šbfck è timer@0ti,omap5430-timer/€[šœbfcktimer_sys_ck þ!target-module@34000ti,sysc-omap4-timerti,sysc/@@ revsyscý [šbfck è@timer@0ti,omap5430-timer/€[šœbfcktimer_sys_ck þ"3ïtarget-module@36000ti,sysc-omap4-timerti,sysc/`` revsyscý [š bfck è`timer@0ti,omap5430-timer/€[š œbfcktimer_sys_ck þ#3ðtarget-module@3e000ti,sysc-omap4-timerti,sysc/àà revsyscý [š(bfck èàtimer@0ti,omap5430-timer/€[š(œbfcktimer_sys_ck þ(3ñtarget-module@51000ti,sysc-omap2ti,sysc/revsyscsyssý&[šèšè bfckdbclk ègpio@0ti,omap4-gpio/ þ÷ 3 target-module@53000ti,sysc-omap2ti,sysc/001revsyscsyssý&[šðšð bfckdbclk è0gpio@0ti,omap4-gpio/ þt÷ target-module@55000ti,sysc-omap2ti,sysc/PPQrevsyscsyssý&[š8š8 bfckdbclk èPgpio@0ti,omap4-gpio/ þ÷ target-module@57000ti,sysc-omap2ti,sysc/ppqrevsyscsyssý&[š@š@ bfckdbclk èpgpio@0ti,omap4-gpio/ þ÷ 3Ÿtarget-module@59000ti,sysc-omap2ti,sysc/‘revsyscsyssý&[šHšH bfckdbclk ègpio@0ti,omap4-gpio/ þ÷ target-module@5b000ti,sysc-omap2ti,sysc/°°±revsyscsyssý&[šPšP bfckdbclk è°gpio@0ti,omap4-gpio/ þ÷ 3¿target-module@5d000ti,sysc-omap2ti,sysc/ÐÐÑrevsyscsyssý&[šXšX bfckdbclk èÐgpio@0ti,omap4-gpio/ þ÷ 3«target-module@60000ti,sysc-omap2ti,sysc/revsyscsyssý& [šˆbfck èi2c@0 ti,omap4-i2c/ þ8 ÷disabledtarget-module@66000ti,sysc-omap2ti,sysc/`P`T`Xrevsyscsyssý& [šHbfck è`serial@0ti,dra742-uart/ þd/Ül ÷disabledŒ›?›@‘txrxtarget-module@68000ti,sysc-omap2ti,sysc/€P€T€Xrevsyscsyssý& [0bfck è€serial@0ti,dra742-uart/ þe/Ül ÷disabledŒ›O›P‘txrxtarget-module@6a000ti,sysc-omap2ti,sysc/ P T Xrevsyscsyssý& [šbfck è serial@0ti,dra742-uart/úCžà/Ül÷okayŒ›1›2‘txrxtarget-module@6c000ti,sysc-omap2ti,sysc/ÀPÀTÀXrevsyscsyssý& [š bfck èÀserial@0ti,dra742-uart/ þD/Ül ÷disabledŒ›3›4‘txrxtarget-module@6e000ti,sysc-omap2ti,sysc/àPàTàXrevsyscsyssý& [š0bfck èàserial@0ti,dra742-uart/ þA/Ül ÷disabledŒ›7›8‘txrxtarget-module@70000ti,sysc-omap2ti,sysc/revsyscsyssý& [šxbfck èi2c@0 ti,omap4-i2c/ þ3÷okay/€gpio@20 nxp,pcf8575/ ÷ gpio@21 nxp,pcf8575/!›÷ &Ÿþ3Ìtlv320aic3106@19°ti,tlv320aic3106/Á(Ï÷okayß ë ø ¡3tps65917@58/X þ ti,tps65917 3¤tps65917_pmicti,tps65917-pmic,¢<�¢L¢\¢l¢|¢‹¢š¢©£¸¢regulatorssmps1smps1' øP?ÐÇÛ3smps2smps2' øP?Œ0ÛÇsmps3smps3' øP?ÐÛÇsmps4smps4'w@?w@ÇÛ3smps5smps5'™p?™pÛÇldo1ldo1'w@?2Z ÇÛí3¬ldo2ldo2'w@?w@íÇÛ3ldo3ldo3'w@?w@ÛÇldo5ldo5'w@?w@ÇÛ3ldo4ldo4'2Z ?2Z Û3atps65917_power_buttonti,palmas-pwrbutton&¤þtarget-module@72000ti,sysc-omap2ti,sysc/   revsyscsyssý& [š€bfck è i2c@0 ti,omap4-i2c/ þ4 ÷disabledtarget-module@78000ti,sysc-omap2ti,sysc/€€€revsyscsyssý& [š0bfck è€elm@0ti,am3352-elm/À þ÷okay3ýtarget-module@7a000ti,sysc-omap2ti,sysc/   revsyscsyssý& [šbfck è i2c@0 ti,omap4-i2c/ þ9 ÷disabledtarget-module@7c000ti,sysc-omap2ti,sysc/ÀÀÀrevsyscsyssý& [(bfck èÀi2c@0 ti,omap4-i2c/ þ7÷okay/€pcf8575@26 nxp,pcf8575/&÷›+3Íhdmi-audio-hog/8> Ivin6_sel_s0ov5640@3c ovti,ov5640/<�[¥bxclkportendpointS¦co3Òtarget-module@86000ti,sysc-omap4-timerti,sysc/`` revsyscý [šbfck è`timer@0ti,omap5430-timer/€[šœbfcktimer_sys_ck þ)3ùtarget-module@88000ti,sysc-omap4-timerti,sysc/€€ revsyscý [šbfck è€timer@0ti,omap5430-timer/€[šœbfcktimer_sys_ck þ*3çtarget-module@90000ti,sysc-omap2ti,sysc/ à ä revsyscý [§ bfck è rng@0 ti,omap4-rng/  þ/[bfcktarget-module@98000ti,sysc-omap4ti,sysc/ € € revsyscý [šÈbfck è €spi@0ti,omap4-mcspi/ þ<�z@Œ›#›$›%›&›'›(›)›* ‘tx0rx0tx1rx1tx2rx2tx3rx3 ÷disabledtarget-module@9a000ti,sysc-omap4ti,sysc/     revsyscý [šÐbfck è  spi@0ti,omap4-mcspi/ þ=z Œ›+›,›-›.‘tx0rx0tx1rx1 ÷disabledtarget-module@9c000ti,sysc-omap4ti,sysc/ À À revsyscý  [_bfck è Àmmc@0ti,dra7-sdhci/ þN÷okayˆ¨• q°£°*`defaulthssdr12sdr25sdr50ddr50sdr104n©½ªÉ Ó«ܬx­‚®é¯ó°ý±²³´target-module@a2000ti,sysc ÷disabled è target-module@a4000ti,sysc ÷disabledè @ Ptarget-module@a5000ti,sysc-omap2ti,sysc/ P0 P4 P8revsyscsyssý& [§bfck è Pdes@0 ti,omap4-des/  þMŒ›u›t‘txrx[bfcktarget-module@a8000ti,sysc ÷disabled è €@target-module@ad000ti,sysc-omap4ti,sysc/ Ð Ð revsyscý  [šøbfck è Ðmmc@0ti,dra7-sdhci/ þY ÷disabled•А@target-module@b2000ti,sysc-omap2ti,sysc/   revsyscsyssý& [š`bfck è 1w@0 ti,omap3-1w/ þ5target-module@b4000ti,sysc-omap4ti,sysc/ @ @ revsyscý  [_bfck è @mmc@0ti,dra7-sdhci/ þQ÷okay• q°!£°`defaulthsddr_1_8vhs200_1_8vnµÉ0x¶‚·¸鹺½»target-module@b8000ti,sysc-omap4ti,sysc/ € € revsyscý [šØbfck è €spi@0ti,omap4-mcspi/ þVzŒ››‘tx0rx0 ÷disabledtarget-module@ba000ti,sysc-omap4ti,sysc/     revsyscý [šàbfck è  spi@0ti,omap4-mcspi/ þ+zŒ›F›G‘tx0rx0 ÷disabledtarget-module@d1000ti,sysc-omap4ti,sysc/   revsyscý  [šbfck è mmc@0ti,dra7-sdhci/ þ[÷okay• q°@½¼ܽÉ>Q0`defaulthssdr12sdr25n¾x¾‚¾é¾wifi@2 ti,wl1835/&¿þtarget-module@d5000ti,sysc ÷disabled è Psegment@200000simple-pm-bustarget-module@48210000ti,sysc-omap4-simpleti,syscÚÀ [Ábfck èH!mpu ti,omap5-mpuinterconnect@48400000ti,dra7-l4-per2simple-pm-busÚ™ [\bfck(/H@H@H@H@H@aplaia0ia1ia2lèH@@E€E€@EÀEÀ@FF@HC`HC`@HC HC @HDÀHDÀ@HEHE@HE@HE@@segment@0simple-pm-busTè@@@€€ÀÀÐÐ   @@ ``€€   ÀÀ àà``pp     °°ÀÀÐÐààðð  00     °°@@ ``€€   @@PPÀÀ ààÀÀÐÐ  00@@PP``pp€€€€   °°ÀÀÐÐààE€E€@EÀEÀ@FF@HC`HC`@HC HC @HDÀHDÀ@HEHE@HE@HE@@target-module@20000ti,sysc-omap2ti,sysc/PTXrevsyscsyssý& [\Äbfck èserial@0ti,dra742-uart/ þÚ/Ül ÷disabledtarget-module@22000ti,sysc-omap2ti,sysc/ P T Xrevsyscsyssý& [\Ôbfck è serial@0ti,dra742-uart/ þÛ/Ül ÷disabledtarget-module@24000ti,sysc-omap2ti,sysc/@P@T@Xrevsyscsyssý& [\Übfck è@serial@0ti,dra742-uart/ þÜ/Ül ÷disabledtarget-module@2c000ti,sysc ÷disabled èÀtarget-module@36000ti,sysc ÷disabled è`target-module@3a000ti,sysc ÷disabled è target-module@3c000ti,sysc-omap4ti,sysc/Àrev [bfck èÀatl@0 ti,dra7-atl/ÿgÂÃÄÅ [bfck÷okayµtÄÚswÅ Ä@ˆ€V"atl2z~target-module@3e000ti,sysc-omap4ti,sysc/àà revsyscý  [\¸bfck èàepwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 ÷disabled èpwm@100ti,dra746-ecapti,am3352-ecap‚/€[bfck ÷disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm‚/€[Æ btbclkfck ÷disabledtarget-module@40000ti,sysc-omap4ti,sysc/ revsyscý  [\„bfck èepwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 ÷disabled èpwm@100ti,dra746-ecapti,am3352-ecap‚/€[bfck ÷disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm‚/€[Ç btbclkfck ÷disabledtarget-module@42000ti,sysc-omap4ti,sysc/   revsyscý  [\Œbfck è epwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 ÷disabled èpwm@100ti,dra746-ecapti,am3352-ecap‚/€[bfck ÷disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm‚/€[È btbclkfck ÷disabledtarget-module@46000ti,sysc ÷disabled è`target-module@48000ti,sysc ÷disabled è€target-module@4a000ti,sysc ÷disabled è target-module@4c000ti,sysc ÷disabled èÀtarget-module@50000ti,sysc ÷disabled ètarget-module@54000ti,sysc ÷disabled è@target-module@58000ti,sysc ÷disabled è€ target-module@5b000ti,sysc ÷disabled è°target-module@5d000ti,sysc ÷disabled èÐtarget-module@60000ti,sysc-dra7-mcaspti,sysc/ revsysc $[bfckahclkxahclkrè E€E€@mcasp@0ti,dra7-mcasp-audio/ E€mpudatþhgtxrxŒÉÉ€‘txrx$[bfckahclkxahclkr ÷disabledtarget-module@64000ti,sysc-dra7-mcaspti,sysc/@@ revsysc $[\T\T\Tbfckahclkxahclkrè@ EÀEÀ@mcasp@0ti,dra7-mcasp-audio/ EÀmpudatþ•”txrxŒÉƒÉ‚‘txrx$[\T\Tbfckahclkxahclkr ÷disabledtarget-module@68000ti,sysc-dra7-mcaspti,sysc/€€ revsysc [\\\\ bfckahclkxè€ FF@mcasp@0ti,dra7-mcasp-audio/ Fmpudatþ—–txrxŒÉ…É„‘txrx[\\\\ bfckahclkx÷okay° µ\\Úĝ¥¯º Å 3target-module@6c000ti,sysc-dra7-mcaspti,sysc/ÀÀ revsysc [\Œ\Œ bfckahclkxèÀ HC`HC`@mcasp@0ti,dra7-mcasp-audio/ HC`mpudatþ™˜txrxŒÉ‡Ɇ‘txrx[\Œ\Œ bfckahclkx ÷disabledtarget-module@70000ti,sysc-dra7-mcaspti,sysc/ revsysc [\l\l bfckahclkxè HC HC @mcasp@0ti,dra7-mcasp-audio/ HC mpudatþ›štxrxŒÉ‰Ɉ‘txrx[\l\l bfckahclkx ÷disabledtarget-module@74000ti,sysc-dra7-mcaspti,sysc/@@ revsysc [\ø\ø bfckahclkxè@ HDÀHDÀ@mcasp@0ti,dra7-mcasp-audio/ HDÀmpudatþœtxrxŒÉ‹ÉŠ‘txrx[\ø\ø bfckahclkx ÷disabledtarget-module@78000ti,sysc-dra7-mcaspti,sysc/€€ revsysc [\ü\ü bfckahclkxè€ HEHE@mcasp@0ti,dra7-mcasp-audio/ HEmpudatþŸžtxrxŒÉÉŒ‘txrx[\ü\ü bfckahclkx ÷disabledtarget-module@7c000ti,sysc-dra7-mcaspti,sysc/ÀÀ revsysc [\„\„ bfckahclkxèÀ HE@HE@@mcasp@0ti,dra7-mcasp-audio/ HE@mpudatþ¡ txrxŒÉÉŽ‘txrx[\„\„ bfckahclkx ÷disabledtarget-module@80000ti,sysc-omap4ti,sysc/ rev [\äbfck è can@0ti,dra7-d_can/  QX þá[ ÷disabledtarget-module@84000ti,sysc-omap4-simpleti,sysc/RRRrevsyscsyssý & [Êbfck è@@'switch@0#ti,dra7-cpsw-switchti,cpsw-switch/@ è@[Ëbfck¡÷okay0þNOPQrx_threshrxtxmisc$ÐÌÍ Í ethernet-portsport@1/Ûport1áµÎíÏ ørgmii-id port@2/Ûport2áµÎíÐ ørgmii-id mdio@1000ti,cpsw-mdioti,davinci_mdio[Ëbfck B@/ethernet-phy@2/  1 F T&«þ l3Ïethernet-phy@3/  1 F T&«þ l3Ðcpts [Êbcptstarget-module@5b000ti,sysc-omap4ti,sysc/°° revsysc  [Ñbfck è°cal@0 ti,dra72-cal/@ @"cal_topcal_rx_core0cal_rx_core1 þw Š”portsport@0/endpointSÒco3¦port@1/interconnect@48800000ti,dra7-l4-per3simple-pm-busÚ™ [Óbfck(/H€H€H€H€H€aplaia0ia1ia2 èH€ segment@0simple-pm-busŒè  00@@PP``pp€€  °°ÀÀÐÐààðð€€ÀÀÐР °°ÀÀÐÐààðð  00@@PP``pp€€  °°ÀÀÐÐààðð  00@@PP``pp€€  °°@@PPààðð  00``pp @@PP   °°ÀÀÐÐààðð 00target-module@2000ti,sysc-omap4ti,sysc/   revsyscý  [ €bfck è mailbox@0ti,omap4-mailbox/0þ{|}~wƒ•  ÷disabledtarget-module@4000ti,sysc ÷disabled è@target-module@a000ti,sysc ÷disabled è target-module@10000ti,sysc ÷disabled ètarget-module@16000ti,sysc ÷disabled è`target-module@1c000ti,sysc ÷disabled èÀtarget-module@1e000ti,sysc ÷disabled èàtarget-module@20000ti,sysc-omap4-timerti,sysc/ revsyscý [bfck ètimer@0ti,omap5430-timer/€[œbfcktimer_sys_ck þ$3øtarget-module@22000ti,sysc-omap4-timerti,sysc/   revsyscý [bfck è timer@0ti,omap5430-timer/€[œbfcktimer_sys_ck þ%target-module@24000ti,sysc-omap4-timerti,sysc/@@ revsyscý [bfck è@timer@0ti,omap5430-timer/€[œbfcktimer_sys_ck þ&3ètarget-module@26000ti,sysc-omap4-timerti,sysc/`` revsyscý [ bfck è`timer@0ti,omap5430-timer/€[ œbfcktimer_sys_ck þ'3étarget-module@28000ti,sysc-omap4-timerti,sysc/€€ revsyscý [Ó´bfck è€timer@0ti,omap5430-timer/€[Ó´œbfcktimer_sys_ck þS target-module@2a000ti,sysc-omap4-timerti,sysc/   revsyscý [Ó¼bfck è timer@0ti,omap5430-timer/€[Ó¼œbfcktimer_sys_ck þT target-module@2c000ti,sysc-omap4-timerti,sysc/ÀÀ revsyscý [ÓÄbfck èÀ'timer@0ti,omap5430-timer/€[ÓÄœbfcktimer_sys_ck þU  µÓÄÚœtarget-module@2e000ti,sysc-omap4-timerti,sysc/àà revsyscý [Óbfck èà'timer@0ti,omap5430-timer/€[Óœbfcktimer_sys_ck þV  µÓÚœtarget-module@38000ti,sysc-omap4-simpleti,sysc/€t€x revsysc [Ô$bfck è€rtc@0ti,am3352-rtc/þÙÙ[Utarget-module@3a000ti,sysc-omap4ti,sysc/   revsyscý  [ (bfck è mailbox@0ti,omap4-mailbox/0þíîïðwƒ•  ÷disabledtarget-module@3c000ti,sysc-omap4ti,sysc/ÀÀ revsyscý  [ 0bfck èÀmailbox@0ti,omap4-mailbox/0þñòóôwƒ•  ÷disabledtarget-module@3e000ti,sysc-omap4ti,sysc/àà revsyscý  [ 8bfck èàmailbox@0ti,omap4-mailbox/0þõö÷øwƒ•  ÷disabledtarget-module@40000ti,sysc-omap4ti,sysc/ revsyscý  [ @bfck èmailbox@0ti,omap4-mailbox/0þùúûüwƒ• ÷okay3åmbox-ipu1-ipc3x ª µ÷okay3æmbox-dsp1-ipc3x ª µ÷okay3÷target-module@42000ti,sysc-omap4ti,sysc/   revsyscý  [ Hbfck è mailbox@0ti,omap4-mailbox/0þýþÿwƒ• ÷okay3ímbox-ipu2-ipc3x ª µ÷okay3îtarget-module@44000ti,sysc-omap4ti,sysc/@@ revsyscý  [ Pbfck è@mailbox@0ti,omap4-mailbox/0þwƒ•  ÷disabledtarget-module@46000ti,sysc-omap4ti,sysc/`` revsyscý  [ Xbfck è`mailbox@0ti,omap4-mailbox/0þwƒ•  ÷disabledtarget-module@48000ti,sysc ÷disabled è€target-module@4a000ti,sysc ÷disabled è target-module@4c000ti,sysc ÷disabled èÀtarget-module@4e000ti,sysc ÷disabled èàtarget-module@50000ti,sysc ÷disabled ètarget-module@52000ti,sysc ÷disabled è target-module@54000ti,sysc ÷disabled è@target-module@56000ti,sysc ÷disabled è`target-module@58000ti,sysc ÷disabled è€target-module@5a000ti,sysc ÷disabled è target-module@5c000ti,sysc ÷disabled èÀtarget-module@5e000ti,sysc-omap4ti,sysc/àà revsyscý  [ `bfck èàmailbox@0ti,omap4-mailbox/0þ    wƒ•  ÷disabledtarget-module@60000ti,sysc-omap4ti,sysc/ revsyscý  [ hbfck èmailbox@0ti,omap4-mailbox/0þ wƒ•  ÷disabledtarget-module@62000ti,sysc-omap4ti,sysc/   revsyscý  [ pbfck è mailbox@0ti,omap4-mailbox/0þwƒ•  ÷disabledtarget-module@64000ti,sysc-omap4ti,sysc/@@ revsyscý  [ xbfck è@mailbox@0ti,omap4-mailbox/0þwƒ•  ÷disabledtarget-module@80000ti,sysc-omap4ti,sysc/ revsyscý  [_Ðbfck èomap_dwc3_1@0ti,dwc3/ þH À è ÊÕusb@10000 snps,dwc3/p$þGGHperipheralhostotgµÖ׺usb2-phyusb3-phy Ñsuper-speed ßotg ç  ÊÕtarget-module@c0000ti,sysc-omap4ti,sysc/   revsyscý  [_ bfck è omap_dwc3_2@0ti,dwc3/ þW À è ÊØusb@10000 snps,dwc3/p$þIIWperipheralhostotgµÙ ºusb2-phy Ñhigh-speed ßhost ç   ÊØtarget-module@100000ti,sysc-omap4ti,sysc/ revsyscý  [_(bfck èomap_dwc3_3@0ti,dwc3/ þX À è ÷disabledusb@10000 snps,dwc3/p$þXXXperipheralhostotg Ñhigh-speed ßotg ç target-module@170000ti,sysc-omap4ti,sysc/sysc    [Ñbfck è ÷disabledtarget-module@190000ti,sysc-omap4ti,sysc/sysc    [Ñbfck è ÷disabledtarget-module@1b0000ti,sysc-omap4ti,sysc/ revsysc    [Ñbfck è ÷disabledtarget-module@1d0010ti,sysc-omap4ti,sysc/sysc  ÚÚ [Ûbfck èvpe@0 ti,dra7-vpe / €WÐvpe_topsccscvpdma þbtarget-module@51000000ti,sysc-omap4ti,syscÚh 6h =rstctrl$[ee e bfckphy-clkphy-clk-divèQQ0 ïpcie@51000000/Q Q L  rc_dbicsti_confconfigþèé;pci0è 0‚ 0 0þÐ Iÿ S ]µÜ ºpcie-phy0 nd ` ”ÝÝÝÝ ¢Þ÷okayti,dra726-pcie-rcti,dra7-pcieinterrupt-controller 3Ýpcie_ep@51000000 /Q(Q LQ( &ep_dbicsti_confep_dbics2addr_space þè S ½ ÌµÜ ºpcie-phy0 ¢Þ nd ÷disabled"ti,dra726-pcie-epti,dra7-pcie-eptarget-module@51800000ti,sysc-omap4ti,sysc$[ee e bfckphy-clkphy-clk-divÚh 6h =rstctrlèQ€Q€000ï ÷disabledpcie@51800000/Q€ Q€ L0 rc_dbicsti_confconfigþcd;pci0è00‚0000þÐ Iÿ S ]µß ºpcie-phy0 ` ”àààà ¢Þti,dra726-pcie-rcti,dra7-pcieinterrupt-controller 3àocmcram@40300000 mmio-sram/@0 è@0sram-hs@0ti,secure-ram/ocmcram@40400000 ÷disabled mmio-sram/@@ è@@ocmcram@40500000 ÷disabled mmio-sram/@P è@Pbandgap@4a0021e00/J!à J#, J#€,J#ÀHV"3 simple-audio-card,codec>[Äfixedregulator-mmcwlregulator-fixed vmmcwl_fixed'w@?w@ f¿S3½clock fixed-clockb/n63¥memory@0;memory/€€reserved-memoryèipu2_cma@95800000shared-dma-pool/•€€_÷okay3òdsp1_cma@99000000shared-dma-pool/™_÷okay3úipu1_cma@9d000000shared-dma-pool/_÷okay3êfixedregulator-evm_1v8regulator-fixedevm_1v8'w@?w@HÇÛ3» #address-cells#size-cellscompatibleinterrupt-parentmodelstdout-pathi2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0rproc0rproc1rproc2display0statusinterruptsinterrupt-controller#interrupt-cellsregphandledevice_typeoperating-points-v2clocksclock-namesclock-latency#cooling-cellsvbb-supplyvdd-supplysysconopp-hzopp-microvoltopp-supported-hwopp-suspendpower-domainsrangesdma-rangesinterrupts-extendedreg-namesregulator-nameregulator-min-microvoltregulator-max-microvolt#phy-cells#clock-cellsclock-output-namesti,bit-shift#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#syscon-cells#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesassigned-clock-parentsti,dividersti,sysc-maskti,sysc-midleti,sysc-sidleti,syss-maskdma-channelssyscon-phy-powerphy-supplysyscon-pcssyscon-pllreset#mbox-cellsti,mbox-num-usersti,mbox-num-fifos#hwlock-cellsphysphy-namesports-implemented#power-domain-cells#reset-cellsgpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonti,timer-securesyscon-raminitpinctrl-namespinctrl-0pinctrl-1pinctrl-2dmasdma-nameslines-initial-states#sound-dai-cellsadc-settle-msai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyti,system-power-controllersmps1-in-supplysmps2-in-supplysmps3-in-supplysmps4-in-supplysmps5-in-supplyldo1-in-supplyldo2-in-supplyldo3-in-supplyldo4-in-supplyldo5-in-supplyregulator-always-onregulator-boot-onregulator-allow-bypasswakeup-sourceti,palmas-long-press-secondsgpio-hoggpiosoutput-lowline-nameremote-endpointclock-lanesdata-lanesti,spi-num-cspbias-supplymax-frequencymmc-ddr-1_8vmmc-ddr-3_3vvmmc-supplybus-widthcd-gpiosvqmmc-supplypinctrl-3pinctrl-4pinctrl-5pinctrl-6sdhci-caps-maskmmc-hs200-1_8vnon-removablecap-power-off-cardkeep-power-in-suspendti,provided-clocksbwsaws#pwm-cellsinterrupt-namesop-modetdm-slotsserial-dirtx-num-evtrx-num-evtmode-gpioslabelmac-addressphy-handlephy-modeti,dual-emac-pvidbus_freqti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,min-output-impedanceti,dp83867-rxctrl-strap-quirkti,camerrx-controlti,timer-pwmti,mbox-txti,mbox-rxutmi-modeextconmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirksnps,dis_metastability_quirkresetsreset-namesbus-rangenum-laneslinux,pci-domainti,syscon-lane-selinterrupt-map-maskinterrupt-mapti,syscon-unaligned-accessnum-ib-windowsnum-ob-windows#thermal-sensor-cellspinctrl-pin-arrayti,tptcsiommusfirmware-namemboxesti,timersti,watchdog-timersmemory-regionti,bootreg#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infosyscon-chipselectsspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthgpmc,num-csgpmc,num-waitpinsrb-gpiosti,nand-xfer-typeti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,wr-access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyti,efuse-settingsti,absolute-max-voltage-uvpolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicevin-supplyenable-active-highgpioid-gpiossimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-daisystem-clock-frequencyreusable