Ð
þíI8E$(óDì
V2P-CA15_CA7I& arm,vexpress,v2p-ca15_a7arm,vexpress+<�Kregulator-3v3 regulator-fixedW3V3f2Z ~2Z –ªclock-24000000 fixed-clock²¿n6
Ïv2m:clk24mhzª clock-1000000 fixed-clock²¿B@Ïv2m:refclk1mhzªclock-32768 fixed-clock²¿€Ïv2m:refclk32khzªleds
gpio-ledsled-1âv2m:green:user1è
îheartbeatled-2âv2m:green:user2èîdisk-activityled-3âv2m:green:user3èîcpu0led-4âv2m:green:user4èîcpu1led-5âv2m:green:user5èîcpu2led-6âv2m:green:user6èîcpu3led-7âv2m:green:user7èîcpu4led-8âv2m:green:user8èîcpu5bus@8000000 simple-bus<�K?(
!!""##$$%%&&''(())**6motherboard-bus@8000000 arm,vexpress,v2m-p1simple-bus<�K`6flash@0 arm,vexpress-flashcfi-flash=A Ldisabledpartitions arm,arm-firmware-suitepsram@100000000 arm,vexpress-psrammtd-ram=Aethernet@202000000 smsc,lan9118smsc,lan9115=S^miigt‰œªusb@203000000 nxp,usb-isp1761=Sºperipheraliofpga-bus@300000000 simple-bus<�K6 sysreg@10000 arm,vexpress-sysreg=<�K6ªgpio@8 arm,vexpress-sysreg,sys_led=ÂÒªgpio@48 arm,vexpress-sysreg,sys_mci=HÂÒªgpio@4c arm,vexpress-sysreg,sys_flash=LÂÒsysctl@20000 arm,sp810arm,primecell=Þårefclktimclkapb_pclk²0Ïtimerclken0timerclken1timerclken2timerclken3 ñªi2c@30000 arm,versatile-i2c=<�Kpcie-switch@60 idt,89hpes32h8=`aaci@40000 arm,pl041arm,primecell=SÞ åapb_pclkmmc@50000 arm,pl180arm,primecell=S
!*·8Þ åmclkapb_pclkkmi@60000 arm,pl050arm,primecell=SÞ åKMIREFCLKapb_pclkkmi@70000 arm,pl050arm,primecell=S
Þ åKMIREFCLKapb_pclkserial@90000 arm,pl011arm,primecell= SÞ
åuartclkapb_pclkserial@a0000 arm,pl011arm,primecell=
SÞ
åuartclkapb_pclkserial@b0000 arm,pl011arm,primecell=SÞ
åuartclkapb_pclkserial@c0000 arm,pl011arm,primecell=SÞ
åuartclkapb_pclkwatchdog@f0000 arm,sp805arm,primecell=SÞåwdog_clkapb_pclktimer@110000 arm,sp804arm,primecell=SÞåtimclken1timclken2apb_pclktimer@120000 arm,sp804arm,primecell=SÞåtimclken1timclken2apb_pclki2c@160000 arm,versatile-i2c=<�Kdvi-transmitter@39 sil,sii9022-tpisil,sii9022=9ports<�Kport@0=endpointDªdvi-transmitter@60 sil,sii9022-cpisil,sii9022=`rtc@170000 arm,pl031arm,primecell=SÞ åapb_pclkcompact-flash@1a0000 arm,vexpress-cfata-generic=Tclcd@1f0000 arm,pl111arm,primecell= ^combinedSÞåclcdclkapb_pclkn7ù€ƒ
portendpointD‘ªmcc arm,vexpress,config-bus«oscclk0 arm,vexpress-oscÆß}x@“‡²Ïv2m:oscclk0oscclk1 arm,vexpress-oscÆßjepßÒ@²Ïv2m:oscclk1ªoscclk2 arm,vexpress-oscÆßn6n6²Ïv2m:oscclk2ª
volt-vio arm,vexpress-voltÆWVIO–âVIOtemp-mcc arm,vexpress-tempÆâMCCreset arm,vexpress-resetÆmuxfpga arm,vexpress-muxfpgaÆshutdown arm,vexpress-shutdownÆreboot arm,vexpress-rebootÆ dvimode arm,vexpress-dvimodeÆchosenaliasesGê/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@90000Gò/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@a0000Gú/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@b0000G/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@c0000E
/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/i2c@160000D/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/i2c@30000cpus<�Kcpu@0cpu arm,cortex-a15= 1ATÞªcpu@1cpu arm,cortex-a15= 1ATÞªcpu@2cpu arm,cortex-a7= 1AT…ªcpu@3cpu arm,cortex-a7= 1AT…ªcpu@4cpu arm,cortex-a7= 1AT…ªidle-statescluster-sleep-big arm,idle-statenè¼ Ðªcluster-sleep-little arm,idle-statenèô Īmemory@80000000memory=€@reserved-memory<�K6vram@18000000 shared-dma-pool=€±ª
wdt@2a490000 arm,sp805arm,primecell=*ISbÞåwdog_clkapb_pclkhdlcd@2b000000
arm,hdlcd=+SUÞåpxlclkmemory-controller@2b0a0000 arm,pl341arm,primecell=+
Þ åapb_pclkinterrupt-controller@2c001000% arm,cortex-a15-gicarm,cortex-a9-gic<�¸@=,, ,@ ,` S ªcci@2c090000 arm,cci-400<�K=, 6, slave-if@4000 arm,cci-400-ctrl-ifÍace=@ªslave-if@5000 arm,cci-400-ctrl-ifÍace=Pªpmu@9000 arm,cci-400-pmu,r0=P<�Siefghmemory-controller@7ffd0000 arm,pl354arm,primecell=ýSVWÞ åapb_pclkdma@7ff00000 arm,pl330arm,primecell=ð<�S\XYZ[Þ åapb_pclkscc@7fff0000. arm,vexpress-scc,v2p-ca15_a7arm,vexpress-scc=ÿS_timer arm,armv7-timer0S
pmu-a15 arm,cortex-a15-pmuSDEÜpmu-a7 arm,cortex-a7-pmu$S€‚Üoscclk6a fixed-clock²¿n6 Ïoscclk6aªdcc arm,vexpress,config-bus«clock-controller-0 arm,vexpress-oscÆßf@úð€²Ïoscclk0clock-controller-1 arm,vexpress-oscÆßf@úð€²Ïoscclk1clock-controller-2 arm,vexpress-oscÆßf@úð€²Ïoscclk2clock-controller-3 arm,vexpress-oscÆßf@úð€²Ïoscclk3clock-controller-4 arm,vexpress-oscÆß1-bZ²Ïoscclk4clock-controller-5 arm,vexpress-oscÆßjep Õ³@²Ïoscclk5ªclock-controller-6 arm,vexpress-oscÆß1-bZ²Ïoscclk6ªclock-controller-7 arm,vexpress-oscÆßf@úð€²Ïoscclk7clock-controller-8 arm,vexpress-oscÆß1-úð€²Ïoscclk8regulator-a15 arm,vexpress-voltÆ
WA15 Vcoref5~–
âA15 Vcoreregulator-a7 arm,vexpress-voltÆ WA7 Vcoref5~– âA7 Vcoreamp-a15 arm,vexpress-ampÆ
âA15 Icoreamp-a7 arm,vexpress-ampÆ âA7 Icoretemp-dcc arm,vexpress-tempÆâDCCpower-a15 arm,vexpress-powerÆ
âA15 Pcorepower-a7 arm,vexpress-powerÆ âA7 Pcoreenergy-a15 arm,vexpress-energyÆ
âA15 Jcoreenergy-a7 arm,vexpress-energyÆ
âA7 Jcoreetb@20010000" arm,coresight-etb10arm,primecell= Þ åapb_pclkin-portsportendpointDªtpiu@20030000! arm,coresight-tpiuarm,primecell= Þ åapb_pclkin-portsportendpointDªreplicator arm,coresight-static-replicatorout-ports<�Kport@0=endpointDªport@1=endpointDªin-portsportendpointDª funnel@20040000+ arm,coresight-dynamic-funnelarm,primecell= Þ åapb_pclkout-portsportendpointD ªin-ports<�Kport@0=endpointD!ª&port@1=endpointD"ª'port@2=endpointD#ª(port@4=endpointD$ª)port@5=endpointD%ª*ptm@2201c000" arm,coresight-etm3xarm,primecell="ÀïÞ åapb_pclkout-portsportendpointD&ª!ptm@2201d000" arm,coresight-etm3xarm,primecell="ÐïÞ åapb_pclkout-portsportendpointD'ª"etm@2203c000" arm,coresight-etm3xarm,primecell="ÀïÞ åapb_pclkout-portsportendpointD(ª#etm@2203d000" arm,coresight-etm3xarm,primecell="ÐïÞ åapb_pclkout-portsportendpointD)ª$etm@2203e000" arm,coresight-etm3xarm,primecell="àïÞ åapb_pclkout-portsportendpointD*ª%hsb@40000000 simple-bus<�K6@?ï`($%&' modelarm,hbiarm,vexpress,sitecompatibleinterrupt-parent#address-cells#size-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onphandle#clock-cellsclock-frequencyclock-output-nameslabelgpioslinux,default-trigger#interrupt-cellsinterrupt-map-maskinterrupt-maprangesregbank-widthstatusinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullvdd33a-supplyvddvario-supplydr_modegpio-controller#gpio-cellsclocksclock-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyremote-endpointreg-shiftinterrupt-namesmax-memory-bandwidthmemory-regionarm,pl11x,tft-r0g0b0-padsarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangeserial0serial1serial2serial3i2c0i2c1device_typecci-control-portcpu-idle-statescapacity-dmips-mhzdynamic-power-coefficientlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usno-mapinterrupt-controllerinterface-typeinterrupt-affinitycpu