Ð þíI?8Ep(ÏE8)STMicroelectronics STM32F769-DISCO board !st,stm32f769-discost,stm32f769interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl}timers@40000000!st,stm32-timersR@ e€„int ^disabledpwm !st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ e„int ^disabledpwm !st,stm32-pwm ^disabledtimer@2!st,stm32-timer-triggerR ^disabledtimers@40000800!st,stm32-timersR@ e‚„int ^disabledpwm !st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  eƒ^okay›2timers@40001000!st,stm32-timersR@ e„„int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ e…„int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†„int ^disabledpwm !st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡„int ^disabledpwm !st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@  eˆ„int ^disabledpwm !st,stm32-pwm ^disabledrtc@40002800 !st,stm32-rtcR@( e ¦ ¶l› Í^okayspi@40003800!st,stm32f7-spiR@8›$ eŽ ^disabledspi@40003c00!st,stm32f7-spiR@<�›3 e ^disabledserial@40004400!st,stm32f7-uartR@D›& e ^disabledserial@40004800!st,stm32f7-uartR@H›' e ^disabledserial@40004c00!st,stm32f7-uartR@L›4 e ^disabledserial@40005000!st,stm32f7-uartR@P›5 e ^disabledi2c@40005400!st,stm32f7-i2cR@T› × e^okayÞèdefaultö¹ i2c@40005800!st,stm32f7-i2cR@X›!"× e ^disabledi2c@40005c00!st,stm32f7-i2cR@\›HI× e ^disabledi2c@40006000!st,stm32f7-i2cR@`›_`× e ^disabledcan@40006400!st,stm32f4-bxcanR@d›%txrx0rx1sce× e™5D ^disabledgcan@40006600!st,stm32f4-gcansysconR@f e™Vcan@40006800!st,stm32f4-bxcanR@h›?@AB%txrx0rx1sce× ešLD ^disabledcec@40006c00 !st,stm32-cecR@l›^e› „cechdmi-cec^okayÞèdefaultserial@40007800!st,stm32f7-uartR@x›R e ^disabledserial@40007c00!st,stm32f7-uartR@|›S e ^disabledtimers@40010000!st,stm32-timersR@ e „int ^disabledpwm !st,stm32-pwm ^disabledtimer@0!st,stm32-timer-triggerR ^disabledtimers@40010400!st,stm32-timersR@ e¡„int ^disabledpwm !st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32f7-uartR@›% e^okayÞèdefaultserial@40011400!st,stm32f7-uartR@›G e ^disabledmmc@40011c00!arm,pl180arm,primecell]ˆ€R@ e§ „apb_pclk›gtÜl^okay‚  Ž —èdefaultopendrainsleepÞ ¡ « µmmc@40012c00!arm,pl180arm,primecell]ˆ€R@, e« „apb_pclk›1tÜl ^disabledspi@40013000!st,stm32f7-spiR@0›# e¬ ^disabledspi@40013400!st,stm32f7-spiR@4›T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8 e®Vinterrupt-controller@40013c00!st,stm32-exti,AR@<�8› ()*>LVtimers@40014000!st,stm32-timersR@@ e°„int ^disabledpwm !st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±„int ^disabledpwm !st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@H e²„int ^disabledpwm !st,stm32-pwm ^disabledspi@40015000!st,stm32f7-spiR@P›U e´ ^disabledspi@40015400!st,stm32f7-spiR@T›V eµ ^disableddisplay-controller@40016800!st,stm32-ltdcR@h›XY×: e„lcd^okayportendpoint¿Vpower-config@40007000!st,stm32-power-configsysconR@pVcrc@40023000!st,stm32f7-crcR@0 e  ^disabledrcc@40023800ÏÜ/!st,stm32f769-rccst,stm32f746-rccst,stm32-rccR@8eÍ ¦éB@Vdma-controller@40026000 !st,stm32-dmaR@` › / eþ ^disableddma-controller@40026400 !st,stm32-dmaR@d ›89:;<�DEF eþ  ^disabledusb@40040000!st,stm32f7-hsotgR@›M e„otg#  5€€@@@@ ^okayDotgL Qusb2-phyÞèdefaultusb@50000000!st,stm32f4x9-fsotgRP›C e'„otg ^disabledcan@40003400!st,stm32f4-bxcanR@4›hijk%txrx0rx1sce×  eD ^disabledgcan@40003600!st,stm32f4-gcansysconR@6 eVdsi@40016c00 !st,stm32-dsiR@le" „pclkref×;[apb^okayportsport@0Rendpoint¿Vport@1Rendpoint¿Vpanel@0!orisetech,otm8009aR gs ^okayportendpoint¿Vpinctrl@40020000 }@0lÍ!st,stm32f769-pinctrlVgpio@40020000€,AR eœGPIOA©Vgpio@40020400€,AR eœGPIOB©gpio@40020800€,AR eœGPIOC© gpio@40020c00€,AR  eœGPIOD©0gpio@40021000€,AR eœGPIOE©@gpio@40021400€,AR eœGPIOF©Pgpio@40021800€,AR eœGPIOG©`gpio@40021c00€,AR eœGPIOH©pgpio@40022000€,AR  eœGPIOI©€V gpio@40022400€,AR$ e œGPIOJ©Vgpio@40022800€,AR( e œGPIOK© cec-0Vpinsµ¼Æ×usart1-0Vpins1µ ×ä¼pins2µ ×usart1-1pins1µ ×ä¼pins2µ×i2c1-0Vpinsµ×Ƽi2c3-0pinsµxw×Ƽusbotg-hs-0Vpins0µt ‹          ×ä¼usbotg-hs-1pins0µt "          ×ä¼usbotg-fs-0pins µ ×ä¼sdio-pins-a-0pinsµ( ) * + , 2 ä¼sdio-pins-od-a-0pins1µ( ) * + , ä¼pins2µ2 Ƽsdio-pins-sleep-a-0pinsµ()*+,2sdio-pins-b-0V pinsµi j   6 7 ä¼sdio-pins-od-b-0V pins1µi j   6 ä¼pins2µ7 Ƽsdio-pins-sleep-b-0V pinsµij67can1-0pins1µ pins2µ ôcan1-1pins1µ pins2µ ôcan1-2pins1µ1 pins2µ0 ôcan1-3pins1µ} pins2µ~ ôcan2-0pins1µ pins2µ ôcan2-1pins1µ pins2µ ôcan3-0pins1µ pins2µ ôcan3-1pins1µ pins2µ ôltdc-0pinspµDl ‰ŠŽ‘’“”•–—˜™š›žŸ ¡¢¤¥¦§¼clocksclk-hseÜ !fixed-clock}x@Vclk-lseÜ !fixed-clock€clk-lsiÜ !fixed-clock}clk-i2s-ckinÜ !fixed-clockÜlVchosenroot=/dev/ramserial0:115200n8memory@c0000000&memoryRÀreserved-memory}linux,dma!shared-dma-pool2DaliasesK/soc/serial@40011000leds !gpio-ledsled-green ‘ Sheartbeatled-red ‘ gpio-keys !gpio-keysibutton-0tUserzf ‘usb-phy…!usb-nop-xceiv e „main_clkVvcc-3v3!regulator-fixedvcc_3v3Ÿ2Z ·2Z V  #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesclock-names#pwm-cellsinterruptsassigned-clocksassigned-clock-parentsst,syscfgresetspinctrl-0pinctrl-namesi2c-scl-rising-time-nsi2c-scl-falling-time-nsinterrupt-namesst,can-primaryst,gcanst,can-secondaryarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiosbroken-cdpinctrl-1pinctrl-2bus-widthremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modephysphy-namesreset-namesreset-gpiospower-supplygpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxslew-ratedrive-open-drainbias-disabledrive-push-pullbias-pull-upclock-frequencybootargsstdout-pathdevice_typelinux,dma-defaultno-mapserial0linux,default-triggerautorepeatlabellinux,code#phy-cellsregulator-nameregulator-min-microvoltregulator-max-microvolt