Ð þíG8CL(ÑC)STMicroelectronics STM32F746-DISCO board !st,stm32f746-discost,stm32f746interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl}timers@40000000!st,stm32-timersR@ e€„int ^disabledpwm !st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ e„int ^disabledpwm !st,stm32-pwm ^disabledtimer@2!st,stm32-timer-triggerR ^disabledtimers@40000800!st,stm32-timersR@ e‚„int ^disabledpwm !st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  eƒ^okay›2timers@40001000!st,stm32-timersR@ e„„int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ e…„int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†„int ^disabledpwm !st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡„int ^disabledpwm !st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@  eˆ„int ^disabledpwm !st,stm32-pwm ^disabledrtc@40002800 !st,stm32-rtcR@( e ¦ ¶l› Í ^disabledspi@40003800!st,stm32f7-spiR@8›$ eŽ ^disabledspi@40003c00!st,stm32f7-spiR@<�›3 e ^disabledserial@40004400!st,stm32f7-uartR@D›& e ^disabledserial@40004800!st,stm32f7-uartR@H›' e ^disabledserial@40004c00!st,stm32f7-uartR@L›4 e ^disabledserial@40005000!st,stm32f7-uartR@P›5 e ^disabledi2c@40005400!st,stm32f7-i2cR@T› × e^okayÞèdefaultö¹ i2c@40005800!st,stm32f7-i2cR@X›!"× e ^disabledi2c@40005c00!st,stm32f7-i2cR@\›HI× e^okayÞèdefault%€touchscreen@38!edt,edt-ft5306R8l› 5àHi2c@40006000!st,stm32f7-i2cR@`›_`× e ^disabledcan@40006400!st,stm32f4-bxcanR@d›[txrx0rx1sce× e™kz ^disabledgcan@40006600!st,stm32f4-gcansysconR@f e™Vcan@40006800!st,stm32f4-bxcanR@h›?@AB[txrx0rx1sce× eš‚z ^disabledcec@40006c00 !st,stm32-cecR@l›^e› „cechdmi-cec ^disabledserial@40007800!st,stm32f7-uartR@x›R e ^disabledserial@40007c00!st,stm32f7-uartR@|›S e ^disabledtimers@40010000!st,stm32-timersR@ e „int ^disabledpwm !st,stm32-pwm ^disabledtimer@0!st,stm32-timer-triggerR ^disabledtimers@40010400!st,stm32-timersR@ e¡„int ^disabledpwm !st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32f7-uartR@›% e^okayÞ èdefaultserial@40011400!st,stm32f7-uartR@›G e ^disabledmmc@40011c00!arm,pl180arm,primecell“ˆ€R@ e§ „apb_pclk›gªÜl ^disabledmmc@40012c00!arm,pl180arm,primecell“ˆ€R@, e« „apb_pclk›1ªÜl^okay¸  Ä èdefaultopendrainsleepÞ Í ×áspi@40013000!st,stm32f7-spiR@0›# e¬ ^disabledspi@40013400!st,stm32f7-spiR@4›T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8 e®Vinterrupt-controller@40013c00!st,stm32-exti,AR@<�8› ()*>LVtimers@40014000!st,stm32-timersR@@ e°„int ^disabledpwm !st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±„int ^disabledpwm !st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@H e²„int ^disabledpwm !st,stm32-pwm ^disabledspi@40015000!st,stm32f7-spiR@P›U e´ ^disabledspi@40015400!st,stm32f7-spiR@T›V eµ ^disableddisplay-controller@40016800!st,stm32-ltdcR@h›XY×: e„lcd^okayÞèdefaultportendpointëVpower-config@40007000!st,stm32-power-configsysconR@pVcrc@40023000!st,stm32f7-crcR@0 e  ^disabledrcc@40023800û!st,stm32f746-rccst,stm32-rccR@8eÍ ¦B@Vdma-controller@40026000 !st,stm32-dmaR@` › / e* ^disableddma-controller@40026400 !st,stm32-dmaR@d ›89:;<�DEF e*5 ^disabledusb@40040000!st,stm32f7-hsotgR@›M e„otg@O  a€€@@@@ ^okayphostx }usb2-phyÞèdefaultusb@50000000!st,stm32f4x9-fsotgRP›C e'„otg^okayphostÞèdefaultpinctrl@40020000 }@0lÍ!st,stm32f746-pinctrlVgpio@40020000‡—,AR e£GPIOA°gpio@40020400‡—,AR e£GPIOB°gpio@40020800‡—,AR e£GPIOC° V gpio@40020c00‡—,AR  e£GPIOD°0Vgpio@40021000‡—,AR e£GPIOE°@gpio@40021400‡—,AR e£GPIOF°Pgpio@40021800‡—,AR e£GPIOG°`gpio@40021c00‡—,AR e£GPIOH°pgpio@40022000‡—,AR  e£GPIOI°€Vgpio@40022400‡—,AR$ e £GPIOJ°gpio@40022800‡—,AR( e £GPIOK° Vcec-0pins¼ÃÍÞusart1-0pins1¼ ÞëÃpins2¼ Þusart1-1V pins1¼ ÞëÃpins2¼Þi2c1-0Vpins¼ÞÍÃi2c3-0Vpins¼xwÞÍÃusbotg-hs-0pins0¼t ‹          ÞëÃusbotg-hs-1Vpins0¼t "          ÞëÃusbotg-fs-0Vpins ¼ ÞëÃsdio-pins-a-0V pins¼( ) * + , 2 ëÃsdio-pins-od-a-0V pins1¼( ) * + , ëÃpins2¼2 ÍÃsdio-pins-sleep-a-0Vpins¼()*+,2sdio-pins-b-0pins¼i j   6 7 ëÃsdio-pins-od-b-0pins1¼i j   6 ëÃpins2¼7 ÍÃsdio-pins-sleep-b-0pins¼ij67can1-0pins1¼ pins2¼ ûcan1-1pins1¼ pins2¼ ûcan1-2pins1¼1 pins2¼0 ûcan1-3pins1¼} pins2¼~ ûcan2-0pins1¼ pins2¼ ûcan2-1pins1¼ pins2¼ ûcan3-0pins1¼ pins2¼ ûcan3-1pins1¼ pins2¼ ûltdc-0Vpinsp¼Dl ‰ŠŽ‘’“”•–—˜™š›žŸ ¡¢¤¥¦§Ãclocksclk-hse !fixed-clock%}x@Vclk-lse !fixed-clock%€clk-lsi !fixed-clock%}clk-i2s-ckin !fixed-clock%ÜlVchosenroot=/dev/ramserial0:115200n8memory@c0000000memoryRÀ€reserved-memory}linux,cma!shared-dma-pool)J0aliasesB/soc/serial@40011000usb-phyJ!usb-nop-xceiv e „main_clkVvcc5v-otg-fs-regulator!regulator-fixed U Zvcc5_host1ivcc-3v3!regulator-fixedZvcc_3v3}2Z •2Z V backlight!gpio-backlight Ç^okayVpanel-rgb!rocktech,rk043fn48h­ º Ä ^okayportendpointëV #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesclock-names#pwm-cellsinterruptsassigned-clocksassigned-clock-parentsst,syscfgresetspinctrl-0pinctrl-namesi2c-scl-rising-time-nsi2c-scl-falling-time-nsclock-frequencytouchscreen-size-xtouchscreen-size-yinterrupt-namesst,can-primaryst,gcanst,can-secondaryarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiospinctrl-1pinctrl-2bus-widthremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modephysphy-namesgpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxslew-ratedrive-open-drainbias-disabledrive-push-pullbias-pull-upbootargsstdout-pathdevice_typeno-maplinux,dma-defaultserial0#phy-cellsgpioregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltpower-supplybacklightenable-gpios