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!st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@e„int ^disabledpwm
!st,stm32-pwm ^disabledtimer@2!st,stm32-timer-triggerR ^disabledtimers@40000800!st,stm32-timersR@e‚„int ^disabledpwm
!st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@eƒ^okay›2timers@40001000!st,stm32-timersR@e„„int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@e…„int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@e†„int ^disabledpwm
!st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR ^disabledtimers@40001c00!st,stm32-timersR@e‡„int ^disabledpwm
!st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@ eˆ„int ^disabledpwm
!st,stm32-pwm ^disabledrtc@40002800
!st,stm32-rtcR@(e¦¶l›Í^okayspi@40003800!st,stm32f7-spiR@8›$eŽ ^disabledspi@40003c00!st,stm32f7-spiR@<�›3e ^disabledserial@40004400!st,stm32f7-uartR@D›&e ^disabledserial@40004800!st,stm32f7-uartR@H›'e ^disabledserial@40004c00!st,stm32f7-uartR@L›4e ^disabledserial@40005000!st,stm32f7-uartR@P›5e ^disabledi2c@40005400!st,stm32f7-i2cR@T› ×e^okayÞèdefaultö¹
stmfx@42!st,stmfx-0300RB›lpinctrl!st,stmfx-0300-pinctrl%5,AAVjoystickMgpio0gpio1gpio2gpio3gpio4RbVi2c@40005800!st,stm32f7-i2cR@X›!"×e ^disabledi2c@40005c00!st,stm32f7-i2cR@\›HI×e ^disabledi2c@40006000!st,stm32f7-i2cR@`›_`×e ^disabledcan@40006400!st,stm32f4-bxcanR@d›otxrx0rx1sce×e™Ž ^disabledgcan@40006600!st,stm32f4-gcansysconR@fe™Vcan@40006800!st,stm32f4-bxcanR@h›?@ABotxrx0rx1sce×eš–Ž ^disabledcec@40006c00
!st,stm32-cecR@l›^e›
„cechdmi-cec ^disabledserial@40007800!st,stm32f7-uartR@x›Re ^disabledserial@40007c00!st,stm32f7-uartR@|›Se ^disabledtimers@40010000!st,stm32-timersR@e „int ^disabledpwm
!st,stm32-pwm ^disabledtimer@0!st,stm32-timer-triggerR ^disabledtimers@40010400!st,stm32-timersR@e¡„int ^disabledpwm
!st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32f7-uartR@›%e^okayÞ èdefaultserial@40011400!st,stm32f7-uartR@›Ge ^disabledmmc@40011c00!arm,pl180arm,primecell§ˆ€R@e§ „apb_pclk›g¾Ül ^disabledmmc@40012c00!arm,pl180arm,primecell§ˆ€R@,e« „apb_pclk›1¾Ül^okayÌ
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öspi@40013000!st,stm32f7-spiR@0›#e¬ ^disabledspi@40013400!st,stm32f7-spiR@4›Te ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8e®Vinterrupt-controller@40013c00!st,stm32-exti,AR@<�8›
()*>LVtimers@40014000!st,stm32-timersR@@e°„int ^disabledpwm
!st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@De±„int ^disabledpwm
!st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@He²„int ^disabledpwm
!st,stm32-pwm ^disabledspi@40015000!st,stm32f7-spiR@P›Ue´ ^disabledspi@40015400!st,stm32f7-spiR@T›Veµ ^disableddisplay-controller@40016800!st,stm32-ltdcR@h›XY×:e„lcd ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVcrc@40023000!st,stm32f7-crcR@0e^okayrcc@40023800
!st,stm32f746-rccst,stm32-rccR@8eͦB@Vdma-controller@40026000
!st,stm32-dmaR@` ›
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!st,stm32-dmaR@d ›89:;<�DEFe/: ^disabledusb@40040000!st,stm32f7-hsotgR@›Me„otgET f€€@@@@ ^okayuotg} ‚usb2-phyÞèdefaultusb@50000000!st,stm32f4x9-fsotgRP›Ce'„otg ^disabledpinctrl@40020000}@0lÍ!st,stm32f746-pinctrlVgpio@40020000%5,AReŒGPIOAAgpio@40020400%5,AReŒGPIOBAVgpio@40020800%5,AReŒGPIOCA Vgpio@40020c00%5,AReŒGPIODA0gpio@40021000%5,AReŒGPIOEA@gpio@40021400%5,AReŒGPIOFAPVgpio@40021800%5,AReŒGPIOGA`gpio@40021c00%5,AReŒGPIOHApgpio@40022000%5,AR eŒGPIOIA€Vgpio@40022400%5,AR$e ŒGPIOJAgpio@40022800%5,AR(e
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#address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesclock-names#pwm-cellsinterruptsassigned-clocksassigned-clock-parentsst,syscfgresetspinctrl-0pinctrl-namesi2c-scl-rising-time-nsi2c-scl-falling-time-nsgpio-controller#gpio-cellsgpio-rangespinsdrive-push-pullbias-pull-upinterrupt-namesst,can-primaryst,gcanst,can-secondaryarm,primecell-periphidmax-frequencyvmmc-supplybroken-cdpinctrl-1pinctrl-2bus-width#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modephysphy-namesst,bank-namepinmuxslew-ratedrive-open-drainbias-disableclock-frequencybootargsstdout-pathdevice_typeserial0gpioslinux,default-triggerautorepeatlabellinux,code#phy-cellsregulator-nameregulator-min-microvoltregulator-max-microvolt