Ð þíQª8Mˆ("MP(STMicroelectronics STM32429i-EVAL board!st,stm32429i-evalst,stm32f429interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl} „Àefuse@1fff7800!st,stm32f4-otpRÿxcalib@22cR,calib@22eR.timers@40000000!st,stm32-timersR@ e€int ^disabledpwm !st,stm32-pwm› ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ eint^okaypwm !st,stm32-pwm›^okay¦°defaulttimer@2!st,stm32-timer-triggerR^okaytimers@40000800!st,stm32-timersR@ e‚int ^disabledpwm !st,stm32-pwm› ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  eƒ^okay¾2timers@40001000!st,stm32-timersR@ e„int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ e…int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†int ^disabledpwm !st,stm32-pwm› ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡int ^disabledpwm !st,stm32-pwm› ^disabledtimers@40002000!st,stm32-timersR@  eˆint ^disabledpwm !st,stm32-pwm› ^disabledrtc@40002800 !st,stm32-rtcR@( e É Ùl¾ ð^okaywatchdog@40003000!st,stm32-iwdgR@0elsi^okayú spi@40003800!st,stm32f4-spiR@8¾$ eŽ ^disabledspi@40003c00!st,stm32f4-spiR@<�¾3 e ^disabledserial@40004400!st,stm32-uartR@D¾& e‘ ^disabledserial@40004800!st,stm32-uartR@H¾' e’ ^disabled( rxtxserial@40004c00!st,stm32-uartR@L¾4 e“ ^disabledserial@40005000!st,stm32-uartR@P¾5 e” ^disabledi2c@40005400!st,stm32f4-i2cR@T¾  e•^okay¦°defaultcamera@30 !ovti,ov2640R0   ) e xvclk^okayportendpoint4 V"stmpe1600@42 !st,stmpe1600RB¾l Dstmpe_gpio!st,stmpe-gpioRbV i2c@40005c00!st,stm32f4-i2cR@\¾HI e— ^disabledcan@40006400!st,stm32f4-bxcanR@d¾ntxrx0rx1sce e™~  ^disabledgcan@40006600!st,stm32f4-gcansysconR@f e™V can@40006800!st,stm32f4-bxcanR@h¾?@ABntxrx0rx1sce eš•  ^disableddac@40007400!st,stm32f4-dac-coreR@t epclk ^disableddac@1 !st,stm32-dac¦R ^disableddac@2 !st,stm32-dac¦R ^disabledserial@40007800!st,stm32-uartR@x¾R ež ^disabledserial@40007c00!st,stm32-uartR@|¾S eŸ ^disabledtimers@40010000!st,stm32-timersR@ e int^okaypwm !st,stm32-pwm›^okay¦°defaulttimer@0!st,stm32-timer-triggerR^okaytimers@40010400!st,stm32-timersR@ e¡int ^disabledpwm !st,stm32-pwm› ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@¾% e¤^okay( rxtx¦°defaultserial@40011400!st,stm32-uartR@¾G e¥ ^disabledadc@40012000!st,stm32f4-adc-coreR@ ¾ e¨adc,A^okay°default¦¸ÄVadc@0!st,stm32f4-adc¦R e¨l¾ rx ^disabledadc@100!st,stm32f4-adc¦R e©l¾ rx ^disabledadc@200!st,stm32f4-adc¦R eªl¾ rx^okayÐmmc@40012c00!arm,pl180arm,primecellàˆ€R@, e« apb_pclk¾1÷¾¼ ^okay  °defaultopendrain¦$spi@40013000!st,stm32f4-spiR@0¾# e¬ ^disabledspi@40013400!st,stm32f4-spiR@4¾T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8 e®Vinterrupt-controller@40013c00!st,stm32-exti,AR@<�8¾ ()*>LVtimers@40014000!st,stm32-timersR@@ e°int ^disabledpwm !st,stm32-pwm› ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±int ^disabledpwm !st,stm32-pwm› ^disabledtimers@40014800!st,stm32-timersR@H e²int ^disabledpwm !st,stm32-pwm› ^disabledspi@40015000!st,stm32f4-spiR@P¾U e´( rxtx ^disabledspi@40015400!st,stm32f4-spiR@T¾V eµ ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@h¾XY: elcd^okay¦°defaultportendpoint4V(crc@40023000!st,stm32f4-crcR@0 e ^okayrcc@40023800.;!st,stm32f42xx-rccst,stm32-rccR@8eð ÉHB@Vdma-controller@40026000 !st,stm32-dmaR@` ¾ / e]Vdma-controller@40026400 !st,stm32-dmaR@d ¾89:;<�DEF e]hVethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@€€ sstmmaceth¾=nmacirq stmmacethmac-clk-txmac-clk-rx$e}‡^okay¦°default¡miiªmdio0!snps,dwmac-mdioethernet-phy@1RVdma2d@4002b000!st,stm32-dma2dR@° ¾Z— edma2d ^disabledusb@40040000 !snps,dwc2R@¾M eotg^okayµhost½ Âusb2-phy¦ °defaultusb@50000000!st,stm32f4x9-fsotgRP¾C e'otg ^disableddcmi@50050000!st,stm32-dcmiRP¾N  e mclk°default¦! tx^okayportendpoint4"Ì$ÕâïV rng@50060800 !st,stm32-rngRP e&pinctrl@40020000 }@0lð!st,stm32f429-pinctrlV#gpio@40020000Rb,AR eûGPIOA#V%gpio@40020400Rb,AR eûGPIOB#gpio@40020800Rb,AR eûGPIOC# V&gpio@40020c00Rb,AR  eûGPIOD#0gpio@40021000Rb,AR eûGPIOE#@gpio@40021400Rb,AR eûGPIOF#Pgpio@40021800Rb,AR eûGPIOG#`V$gpio@40021c00Rb,AR eûGPIOH#pgpio@40022000Rb,AR  eûGPIOI#€V gpio@40022400Rb,AR$ e ûGPIOJ#gpio@40022800Rb,AR( e ûGPIOK# usart1-0Vpins1 (8pins2 usart3-0pins1(8pins2usbotg-fs-0pins  (8usbotg-fs-1pins    (8usbotg-hs-0V pins0t ‹          (8mii-0Vpins8m n "  # k  !   $ % v w 8adc-200VpinsZpwm1-0Vpins pwm3-0Vpinsi2c1-0VpinsB8ltdc-0VpinspŒŽ‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§8ltdc-1pinsX&g*   fj 6k'3l Z8spi5-0pins1WY(8pins2Xi2c3-0pins)B8dcmi-0V!pins<�&'()+3F*,62(8sdio-pins-0Vpins( ) * + , 2 (8sdio-pins-od-0Vpins1( ) * + , (8pins22 B8can1-0pins1 pins2 Scan2-0pins1 pins2 Scan2-1pins1 pins2 Sclocksclk-hse; !fixed-clock`}x@Vclk-lse; !fixed-clock`€clk-lsi; !fixed-clock`}Vi2s-ckin; !fixed-clock`Vclk-ext-camera; !fixed-clock`n6V chosenproot=/dev/ramyserial0:115200n8memory@0…memoryRaliases‘/soc/serial@40011000regulator-vdda!regulator-fixed™vdda¨2Z À2Z Vregulator-vref!regulator-fixed™vref¨2Z À2Z Vvdd-panel!regulator-fixed ™vdd_panel¨2Z À2Z V'leds !gpio-ledsled-green #$ Øheartbeatled-orange #$led-red #$ led-blue #$ gpio-keys !gpio-keysîbutton-0ùWake upÿ #%button-1ùTamperÿ˜ #& usbphy !usb-nop-xceiv e main_clkVpanel-rgb!ampire,am-480272h3tmqw-t01h'^okayportendpoint4(Vmmc_vcard!regulator-fixed ™mmc_vcard¨2Z À2Z V #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesdma-rangesclock-names#pwm-cellspinctrl-0pinctrl-namesinterruptsassigned-clocksassigned-clock-parentsst,syscfgtimeout-secdmasdma-namesresetsresetb-gpiospwdn-gpiosremote-endpointwakeup-sourcegpio-controller#gpio-cellsinterrupt-namesst,can-primaryst,gcanst,can-secondary#io-channel-cellsvdda-supplyvref-supplyst,adc-channelsarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiospinctrl-1bus-width#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesst,sysconsnps,pblsnps,mixed-burstphy-modephy-handledr_modephysphy-namesbus-typehsync-activevsync-activepclk-samplest,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainbias-pull-upclock-frequencybootargsstdout-pathdevice_typeserial0regulator-nameregulator-min-microvoltregulator-max-microvoltlinux,default-triggerautorepeatlabellinux,code#phy-cellspower-supply