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Ìtxrx?defaultM= ydisableddma-controller@ff250000arm,pl330arm,primecell?ÿ%@ú*E{ Bapb_pclk¨!thermal-zonesreserve-thermal\èrˆ€>cpu-thermal\drˆ€>tripscpu_alert0pœÐ:passive¨?cpu_alert1$øœÐ:passive¨@cpu_crit† œÐ :criticalcooling-mapsmap0§?0¬ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1§@0¬ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal\drˆ€>tripsgpu_alert04œÐ:passive¨Agpu_crit† œÐ :criticalcooling-mapsmap0§A ¬Bÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadc?ÿ( ú%{HZBtsadcapb_pclkCŸ mtsadc-apb?initdefaultsleepMC»DÅCÏåEòèHyokay  ¨>ethernet@ff290000rockchip,rk3288-gmac?ÿ)ú;macirqeth_wake_irqåE8{—fgc˜Ä]MBstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macCB mstmmaceth ydisabledusb@ff500000 generic-ehci?ÿP ú{ÂKFPusbyokayZusb@ff520000 generic-ohci?ÿR ú){ÂKFPusb ydisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?ÿT ú{ÃBotgphostKG Pusb2-phyxyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?ÿX ú{ÁBotgphost¦¸Ç€€@@ KH Pusb2-phyyokayÖzæHusb@ff5c0000 generic-ehci?ÿ\ ú{Ä ydisableddma-controller@ff600000arm,pl330arm,primecell?ÿ`@ú*E{Á Bapb_pclk ydisabledi2c@ff650000rockchip,rk3288-i2c?ÿe ú<�Bi2c{L?defaultMIyokay×€2µdpmic@1brockchip,rk808?çxin32kwifibt_32kin&2ú?default MJKLýúú*6BNMZfr5Œ™M¥M² ¨–regulatorsDCDC_REG1¼vdd_armËßñ q°  !q¨ regulator-state-mem6DCDC_REG2¼vdd_gpuËßñ 5 Ð!q¨ƒregulator-state-mem6DCDC_REG3 ¼vcc135_ddrËßregulator-state-memODCDC_REG4¼vcc_18Ëßñw@ w@¨regulator-state-memOgw@LDO_REG1 ¼vcc33_ioËßñ2Z  2Z ¨5regulator-state-memOg2Z LDO_REG3¼vdd_10ËßñB@ B@regulator-state-memOgB@LDO_REG7¼vdd10_lcd_pwren_hËßñ&%  &% regulator-state-mem6SWITCH_REG1 ¼vcc33_lcdËߨcregulator-state-mem6LDO_REG6 ¼vcc18_codecËßñw@ w@¨dregulator-state-mem6LDO_REG4 ¼vccio_sdñw@ 2Z ¨regulator-state-mem6LDO_REG5 ¼vcc33_sdñ2Z  2Z ¨regulator-state-mem6LDO_REG8 ¼vcc33_ccdËßñ2Z  2Z regulator-state-mem6LDO_REG2¼mic_vccËßñw@ w@regulator-state-mem6i2c@ff660000rockchip,rk3288-i2c?ÿf ú=Bi2c{N?defaultMNyokay׆ 2µ max98090@10maxim,max98090?&OúBmclk{q?defaultMP¨ pwm@ff680000rockchip,rk3288-pwm?ÿhƒ?defaultMQ{_yokay¨§pwm@ff680010rockchip,rk3288-pwm?ÿhƒ?defaultMR{_yokay¨œpwm@ff680020rockchip,rk3288-pwm?ÿh ƒ?defaultMS{_ ydisabledpwm@ff680030rockchip,rk3288-pwm?ÿh0ƒ?defaultMT{_ ydisabledsram@ff700000 mmio-sram?ÿp€Ðÿp€smp-sram@0rockchip,rk3066-smp-sram?sram@ff720000#rockchip,rk3288-pmu-srammmio-sram?ÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd?ÿs¨power-controller!rockchip,rk3288-power-controllerŽÖhæ ¨hpower-domain@9? È{ÊÍÈÌÅƾ¿ÔÕÖÙÑÒchgfdehilkj$¢UVWXYZ[\]Žpower-domain@11? {Ïop¢^_Žpower-domain@12? {ÐÜ¢`Žpower-domain@13? {À¢abŽreboot-modesyscon-reboot-mode©”°RBüRBÃÊRBà ÚRBÃsyscon@ff740000rockchip,rk3288-sgrfsyscon?ÿtclock-controller@ff760000rockchip,rk3288-cru?ÿv{ Bxin24måEúæHÖÑÝjÒÞk$ó#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀ¨syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd?ÿw¨Eedp-phyrockchip,rk3288-dp-phy{hB24m yokay¨xio-domains"rockchip,rk3288-io-voltage-domainyokay 5  ( 65 F5 Tc ` ld yusbphyrockchip,rk3288-usb-phyyokayusb-phy@320 ? {]BphyclkúC… mphy-reset¨Husb-phy@334 ?4{^BphyclkúCˆ mphy-reset¨Fusb-phy@348 ?H{_BphyclkúC‹ mphy-reset¨Gwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt?ÿ€{p úOyokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif?ÿ‹ ‡{TÐ BmclkhclkÇeÌtx ú6?defaultMfåE ydisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s?ÿ‰ ‡ ú5{RÎBi2s_clki2s_hclkÇeeÌtxrx?defaultMg ˜ ³yokay¨Ÿcrypto@ff8a0000rockchip,rk3288-crypto?ÿŠ@ ú0 {ÇÍ}ÁBaclkhclksclkapb_pclkC® mcrypto-rstiommu@ff900800rockchip,iommu?ÿ@ ú{ÊÔ Baclkiface Í ydisablediommu@ff914000rockchip,iommu ?ÿ‘@ÿ‘P ú{ÍÕ Baclkiface Í Ú ydisabledrga@ff920000rockchip,rk3288-rga?ÿ’€ ú{ÈÖjBaclkhclksclk õh Cilm mcoreaxiahbvop@ff930000rockchip,rk3288-vop ?ÿ“œÿ“ ú{žÑBaclk_vopdclk_vophclk_vop õh Cdef maxiahbdclk iyokayport¨ endpoint@0? j¨endpoint@1? k¨zendpoint@2? l¨sendpoint@3? m¨viommu@ff930300rockchip,iommu?ÿ“ ú{ÅÑ Baclkiface õh  Íyokay¨ivop@ff940000rockchip,rk3288-vop ?ÿ”œÿ” ú{Æ¿ÒBaclk_vopdclk_vophclk_vop õh C°±² maxiahbdclk nyokayport¨ endpoint@0? o¨€endpoint@1? p¨{endpoint@2? q¨tendpoint@3? r¨wiommu@ff940300rockchip,iommu?ÿ” ú{ÆÒ Baclkiface õh  Íyokay¨ndsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi?ÿ–@ ú{~d Brefpclk õh åE ydisabledportsport@0?endpoint@0? s¨lendpoint@1? t¨qport@1?lvds@ff96c000rockchip,rk3288-lvds?ÿ–À@{g Bpclk_lvds?lcdcMu õh åE ydisabledportsport@0?endpoint@0? v¨mendpoint@1? w¨rport@1?dp@ff970000rockchip,rk3288-dp?ÿ—@ úb{icBdppclkKxPdp õh ComdpåEyokay?defaultMyportsport@0?endpoint@0? z¨kendpoint@1? {¨pport@1?endpoint@0? |¨«hdmi@ff980000rockchip,rk3288-dw-hdmi?ÿ˜ úg{hmnBiahbisfrcec õh åE ‡yokay?defaultunwedgeM}»~¨¢portsport@0?endpoint@0? ¨jendpoint@1? €¨oport@1?video-codec@ff9a0000rockchip,rk3288-vpu?ÿšú   ;vepuvdpu{ÐÜ Baclkhclk  õh iommu@ff9a0800rockchip,iommu?ÿš ú {ÐÜ Baclkiface Í õh ¨iommu@ff9c0440rockchip,iommu ?ÿœ@@ÿœ€@ úo{ÏÛ Baclkiface Í ydisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760?ÿ£$ú ;jobmmugpu{ÀJ‚^ õh yokay ƒ¨Bopp-table-1operating-points-v2¨‚opp-100000000»õáÂ~ðopp-200000000» ëÂÂ~ðopp-300000000»á£ÂB@opp-400000000»ׄÂÈàopp-600000000»#ÃFÂÐqos@ffaa0000rockchip,rk3288-qossyscon?ÿª ¨aqos@ffaa0080rockchip,rk3288-qossyscon?ÿª€ ¨bqos@ffad0000rockchip,rk3288-qossyscon?ÿ­ ¨Vqos@ffad0100rockchip,rk3288-qossyscon?ÿ­ ¨Wqos@ffad0180rockchip,rk3288-qossyscon?ÿ­€ ¨Xqos@ffad0400rockchip,rk3288-qossyscon?ÿ­ ¨Yqos@ffad0480rockchip,rk3288-qossyscon?ÿ­€ ¨Zqos@ffad0500rockchip,rk3288-qossyscon?ÿ­ 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;‚ hFLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank?ÿ{ úU{D L \ & ;³ hUART0_RXDUART0_TXDUART0_CTSUART0_RTSSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKE¨gpio@ff7c0000rockchip,gpio-bank?ÿ| úV{E L \ & ;A hSPI0_CLKSPI0_CS0SPI0_TXDSPI0_RXDVCC50_HDMI_EN¨šgpio@ff7d0000rockchip,gpio-bank?ÿ} úW{F L \ & ;° hI2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HALS_INTINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETSDMMC_D0SDMMC_D1SDMMC_D2SDMMC_D3SDMMC_CLKSDMMC_CMD¨Ogpio@ff7e0000rockchip,gpio-bank?ÿ~ úX{G L \ & ;â hLCDC_BLPWM_LOGBL_ENTRACKPAD_INTTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LEC_INTCPU_NMIDVSOKSDMMC_WPEDP_HPDDVS1nFALUT1LCD_ENDVS2VCC5V_GOOD_HI2C4_SDA_TPI2C4_SCL_TPI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXD¨ gpio@ff7f0000rockchip,gpio-bank?ÿ úY{H L \ & ;^ hRAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 x‹hdmi-cec-c7 x‹hdmi-ddc x‹‹¨}hdmi-ddc-unwedge xŒ‹¨~vcc50-hdmi-en x‹¨›pcfg-output-low †¨Œpcfg-pull-up ‘¨pcfg-pull-down ž¨pcfg-pull-none ­¨‹pcfg-pull-none-12ma ­ º ¨‘suspendglobal-pwroff x‹¨†ddrio-pwroff x‹¨…ddr0-retention x¨„ddr1-retention xsuspend-l-wake xŒ¨‡suspend-l-sleep xŽ¨‰edpedp-hpd x ¨yi2c0i2c0-xfer x‹‹¨Ii2c1i2c1-xfer x‹‹¨/i2c2i2c2-xfer x ‹ ‹¨Ni2c3i2c3-xfer x‹‹¨0i2c4i2c4-xfer x‹‹¨1i2c5i2c5-xfer x‹‹¨6i2s0i2s0-bus` x‹‹‹‹‹‹¨glcdclcdc-ctl@ x‹‹‹‹¨usdmmcsdmmc-clk x¨sdmmc-cmd x¨sdmmc-cd xsdmmc-bus1 xsdmmc-bus4@ x¨sdmmc-cd-disabled x‹¨sdmmc-cd-pin x‹¨sdio0sdio0-bus1 xsdio0-bus4@ x¨sdio0-cmd x¨sdio0-clk x¨sdio0-cd xsdio0-wp xsdio0-pwr xsdio0-bkpwr xsdio0-int xwifienable-h x‹¨—bt-enable-l x‹bt-host-wake xbt-host-wake-l x‹¨bt-dev-wake-sleep xŒ¨Šbt-dev-wake-awake xŽ¨ˆbt-dev-wake x‹sdio1sdio1-bus1 xsdio1-bus4@ xsdio1-cd xsdio1-wp xsdio1-bkpwr xsdio1-int xsdio1-cmd xsdio1-clk x‹sdio1-pwr x emmcemmc-clk x¨emmc-cmd x¨emmc-pwr x emmc-bus1 xemmc-bus4@ xemmc-bus8€ x¨ emmc-reset x ‹¨”spi0spi0-clk x ¨"spi0-cs0 x ¨%spi0-tx x¨#spi0-rx x¨$spi0-cs1 xspi1spi1-clk x ¨'spi1-cs0 x ¨*spi1-rx x¨)spi1-tx x¨(spi2spi2-cs1 xspi2-clk x¨+spi2-cs0 x¨.spi2-rx x¨-spi2-tx x ¨,uart0uart0-xfer x‹¨7uart0-cts x¨8uart0-rts x‹¨9uart1uart1-xfer x ‹¨:uart1-cts x uart1-rts x ‹uart2uart2-xfer x‹¨;uart3uart3-xfer x‹¨<�uart3-cts x uart3-rts x ‹uart4uart4-xfer x‹¨=uart4-cts x uart4-rts x ‹tsadcotp-pin x ‹¨Cotp-out x ‹¨Dpwm0pwm0-pin x‹¨Qpwm1pwm1-pin x‹¨Rpwm2pwm2-pin x‹¨Spwm3pwm3-pin x‹¨Tgmacrgmii-pinsð x‹‹‹‹‘‘‘‘‹‹‹ ‘‘‹‹rmii-pins  x‹‹‹‹‹‹‹‹‹‹spdifspdif-tx x ‹¨fpcfg-pull-none-drv-8ma ­ º¨pcfg-pull-up-drv-8ma ‘ ºpcfg-output-high ɨŽbuttonspwr-key-l x¨’ap-lid-int-l x¨­pmicpmic-int-l x¨Jdvs-1 x ¨Kdvs-2 x¨Lrebootap-warm-reset-h x ‹¨“recovery-switchrec-mode-l x tpmtpm-int-h x‹write-protectfw-wp-ap x‹codechp-det x¨žint-codec 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemarvell,wakeup-pinmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-type