Ð þía±8[((‰Zð!,rikomagic,mk808rockchip,rk3066a7Rikomagic MK808aliases=/ethernet@10204000G/pinctrl/gpio@20034000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000€/serial@10126000ˆ/serial@20064000/serial@20068000˜/spi@20070000/spi@20074000¢/pinctrl/gpio@20084000¨/pinctrl/gpio@2000a000®/mmc@10214000³/mmc@10218000oscillator ,fixed-clock¸n6ÈÕxin24mè?gpu@10090000",rockchip,rk3066-maliarm,mali-400ð ôÅÅ ûbuscoreÅõá,x 3disabledx:5Egpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Uvideo-codec@10104000,rockchip,rk3066-vpuð@:   Evepuvdpu ôÎØÍ×(ûaclk_vdpuhclk_vdpuaclk_vepuhclk_vepuUcache-controller@10138000,arm,pl310-cacheð€cqè0scu@1013c000,arm,cortex-a9-scuðÀglobal-timer@1013c200,arm,cortex-a9-global-timerð  : ô 3disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerðÆ  : ôinterrupt-controller@1013d000,arm,cortex-a9-gic}’ðÐÁèserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartð@ :"£­ûbaudclkapb_pclkô@L 3disabledº¿txrxÉdefault×serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartð` :#£­ûbaudclkapb_pclkôAM 3disabledº¿txrxÉdefault×qos@1012d000,rockchip,rk3066-qossysconðÐ èqos@1012e000,rockchip,rk3066-qossysconðà èqos@1012f000,rockchip,rk3066-qossysconðð èqos@1012f080,rockchip,rk3066-qossysconðð€ èqos@1012f100,rockchip,rk3066-qossysconðñ èqos@1012f180,rockchip,rk3066-qossysconðñ€ èqos@1012f200,rockchip,rk3066-qossysconðò èqos@1012f280,rockchip,rk3066-qossysconðò€ èusb@10180000,rockchip,rk3066-usbsnps,dwc2ð :ôÃûotgáotgéû €€@@  usb2-phy3okayusb@101c0000 ,snps,dwc2ð :ôÉûotgáhost usb2-phy3okayethernet@10204000,rockchip,rk3066-emacð @<� :ôÄD ûhclkmacref(d2rmii;  3disabledmmc@10214000,rockchip,rk2928-dw-mshcð!@ :ôÀHûbiuciuº ¿rx-txH,QSreset3okay¸úð€_úð€Édefault× mw‰šmmc@10218000,rockchip,rk2928-dw-mshcð!€ :ôÁIûbiuciuº ¿rx-txH,RSreset3okayÉdefault ×m¦šwifi@1,brcm,bcm4329-fmacðmmc@1021c000,rockchip,rk2928-dw-mshcð!À :ôÂJûbiuciuº ¿rx-txH,SSreset 3disablednand-controller@10500000,rockchip,rk2928-nfcðP@ :ôÓûahb3okaynand@0ð´rk-nandºÉhw×ê(ü#pmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdð @reboot-mode,syscon-reboot-mode>@ERBÃQRBÃ_RBà oRBÃpower-controller!,rockchip,rk3066-power-controller{èpower-domain@7ðˆôÃľ¿ÍÎPÇÖOÊÐÙÈÑÉҏ{power-domain@6ð ôÎÍØ׏{power-domain@8ðôŏ{grf@20008000&,rockchip,rk3066-grfsysconsimple-mfdð €è usbphy,rockchip,rk3066a-usb-phy3okayusb-phy@17cð|ôQûphyclkÈ–èusb-phy@188ðˆôRûphyclkÈ–èdma-controller@20018000,arm,pl330arm,primecellð €@:¡¬ÇôÀ ûapb_pclkèdma-controller@2001c000,arm,pl330arm,primecellð À@:¡¬ÇôÀ ûapb_pclk 3disabledi2c@2002d000,rockchip,rk3066-i2cð Ð :(; ûi2côP 3disabledÉdefault×i2c@2002f000,rockchip,rk3066-i2cð ð :); ôQûi2c 3disabledÉdefault×pwm@20030000,rockchip,rk2928-pwmð ÞôF 3disabledÉdefault×pwm@20030010,rockchip,rk2928-pwmð ÞôF 3disabledÉdefault×watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdtð ÀôK :33okaypwm@20050020,rockchip,rk2928-pwmð  ÞôG 3disabledÉdefault× pwm@20050030,rockchip,rk2928-pwmð 0ÞôG 3disabledÉdefault×!i2c@20056000,rockchip,rk3066-i2cð ` :*; ôRûi2c 3disabledÉdefault×"i2c@2005a000,rockchip,rk3066-i2cð   :+; ôSûi2c 3disabledÉdefault×#i2c@2005e000,rockchip,rk3066-i2cð à :4; ôTûi2c 3disabledÉdefault×$serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartð @ :$£­ûbaudclkapb_pclkôBN3okayº  ¿txrxÉdefault×%serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartð € :%£­ûbaudclkapb_pclkôCO 3disabledº  ¿txrxÉdefault×&saradc@2006c000,rockchip,saradcð À :éôGJûsaradcapb_pclk,W Ssaradc-apb3okayû'èBspi@20070000,rockchip,rk3066-spiôEHûspiclkapb_pclk :&ð º ¿txrx 3disabledÉdefault×()*+spi@20074000,rockchip,rk3066-spiôFIûspiclkapb_pclk :'ð @º ¿txrx 3disabledÉdefault×,-./dma-controller@20078000,arm,pl330arm,primecellð €@:¡¬ÇôÁ ûapb_pclkè cpusrockchip,rk3066-smpcpu@0cpu,arm,cortex-a9!0ð82›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8Cœ@ôcpu@1cpu,arm,cortex-a9!0ðdisplay-subsystem,rockchip,display-subsystemQ12hdmi-sound,simple-audio-cardWHDMIni2s‡3okaysimple-audio-card,codec¡3simple-audio-card,cpu¡4sram@10080000 ,mmio-sramð «smp-sram@0,rockchip,rk3066-smp-sramðPvop@1010c000,rockchip,rk3066-vopðÀœ : ôþÍûaclk_vopdclk_vophclk_vopU,def Saxiahbdclk3okayportè1endpoint@0ð²5è9vop@1010e000,rockchip,rk3066-vopðàœ :ôÄ¿Îûaclk_vopdclk_vophclk_vopU,ghi Saxiahbdclk 3disabledportè2endpoint@0ð²6è:hdmi@10116000,rockchip,rk3066-hdmið`  :@ôÙûhclkÉdefault×78U; Â3okayè3portsport@0ðendpoint@0ð²9è5endpoint@1ð²: 3disabledè6port@1ðendpoint²;èDi2s@10118000,rockchip,rk3066-i2sð€  :Édefault×<�ôKÆûi2s_clki2s_hclkº¿txrxÓîÂ3okayè4i2s@1011a000,rockchip,rk3066-i2sð   : Édefault×=ôLÇûi2s_clki2s_hclkº¿txrxÓî 3disabledi2s@1011c000,rockchip,rk3066-i2sðÀ  :Édefault×>ôMÈûi2s_clki2s_hclkº  ¿txrxÓî 3disabledclock-controller@20000000,rockchip,rk3066a-cruð ô?ûxin24m; È@ËÔ^ÌÕ_ ׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀètimer@2000e000,snps,dw-apb-timerð à :.ôVD ûtimerpclkefuse@20010000,rockchip,rk3066a-efuseð @ô[ ûpclk_efusecpu_leakage@17ðtimer@20038000,snps,dw-apb-timerð € :,ôTB ûtimerpclktimer@2003a000,snps,dw-apb-timerð   :-ôUC ûtimerpclktsadc@20060000,rockchip,rk3066-tsadcð ô]]ûsaradcapb_pclk :é,\ Ssaradc-apb 3disabledpinctrl,rockchip,rk3066a-pinctrl; «gpio@20034000,rockchip,gpio-bankð @ :6ôU%}’èCgpio@2003c000,rockchip,gpio-bankð À :7ôV%}’gpio@2003e000,rockchip,gpio-bankð à :8ôW%}’gpio@20080000,rockchip,gpio-bankð  :9ôX%}’èHgpio@20084000,rockchip,gpio-bankð @ ::ôY%}’gpio@2000a000,rockchip,gpio-bankð   :<�ôZ%}’pcfg-pull-default1èApcfg-pull-noneGè@emacemac-xfer€T@@@@@@@@emac-mdio T@@emmcemmc-clkTAemmc-cmdT Aemmc-rstT Ahdmihdmi-hpdTAè8hdmii2c-xfer T@@è7i2c0i2c0-xfer T@@èi2c1i2c1-xfer T@@èi2c2i2c2-xfer T@@è"i2c3i2c3-xfer T@@è#i2c4i2c4-xfer T@@è$pwm0pwm0-outT@èpwm1pwm1-outT@èpwm2pwm2-outT@è pwm3pwm3-outT@è!spi0spi0-clkTAè(spi0-cs0TAè+spi0-txTAè)spi0-rxTAè*spi0-cs1TAspi1spi1-clkTAè,spi1-cs0TAè/spi1-rxTAè.spi1-txTAè-spi1-cs1TAuart0uart0-xfer TAAèuart0-ctsTAuart0-rtsTAuart1uart1-xfer TAAèuart1-ctsTAuart1-rtsTAuart2uart2-xfer TA Aè%uart3uart3-xfer TAAè&uart3-ctsTAuart3-rtsTAsd0sd0-clkTAè sd0-cmdT Aè sd0-cdTAè sd0-wpTAsd0-bus-width1T Asd0-bus-width4@T A A A Aèsd1sd1-clkTAèsd1-cmdTAèsd1-cdTAsd1-wpTAsd1-bus-width1TAsd1-bus-width4@TAAAAèi2s0i2s0-busTAA A A A A AAAè<�i2s1i2s1-bus`TAAAAAAè=i2s2i2s2-bus`TAAAAAAè>usb-hosthost-drvTAèEusb-otgotg-drvTAèGsdmmcsdmmc-pwrTAèIsdiowifi-pwrT@èJchosenbserial2:115200n8memory@60000000ð`@memoryadc-keys ,adc-keysnBzbuttons‹&% ¥dbutton-recovery ´recovery³h¾gpio-leds ,gpio-ledsled-0´mk808:blue:power ØCÞoff ìdefault-onhdmi_con,hdmi-connectorcportendpoint²Dè;vcc-2v5,regulator-fixedvcc_2v5&% )&% è'vcc-io,regulator-fixedvcc_io2Z )2Z èFusb-host-regulator,regulator-fixedA TC×EÉdefaultY host-pwrLK@)LK@m† ~Fusb-otg-regulator,regulator-fixedA TC×GÉdefaultYvcc_otgLK@)LK@m† ~Fsdmmc-regulator,regulator-fixed TH×IÉdefaultvcc_sd2Z )2Z m† ~Fèsdio-regulator,regulator-fixedA TH×JÉdefault vcc_wifi2Z )2Z m† ~Fè #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1gpio4gpio6mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesmax-speedphy-moderockchip,grffifo-depthreset-namesmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedvmmc-supplynon-removablelabelnand-bus-widthnand-ecc-modenand-ecc-step-sizenand-ecc-strengthnand-is-boot-mediumrockchip,boot-blksrockchip,boot-ecc-strengthoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burst#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencyportssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-dairangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltgpiosdefault-statelinux,default-triggerregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onstartup-delay-usvin-supply