Ð þío;8eÌ( oe”Cvariscite,var-dvk-om44variscite,var-som-om44ti,omap4460ti,omap4 +7Variscite VAR-DVK-OM44chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?V/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bj/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B‚/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 Š/ocp/dsp‘/ocp/ipu@55020000 ˜/display ¡/connectorcpus+cpu@0arm,cortex-a9ªcpu¶ÇËÒcpuÞ“àìW0£è ®`O€ Àèý ®cpu@1arm,cortex-a9ªcpu¶Çsram@40304000 mmio-sramÇ@0@  interrupt-controller@48241000arm,cortex-a9-gic)ÇH$H$  cache-controller@48242000arm,pl310-cacheÇH$ :H local-timer@48240600arm,cortex-a9-twd-timerËÇH$  T  interrupt-controller@48281000ti,omap4-wugen-mpu)ÇH(  ocpsimple-pm-bus_$Ë +ml3-noc@44000000ti,omap4-l3-nocÇDD€ ET  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-bus_  Ë ÒfckÇJ0J0J0 taplaia0+$mJ0J1J2segment@0simple-pm-bus+„m`` €€  °°@@PPÀÀÐÐtarget-module@4000ti,sysc-omap2ti,syscÇ@@ trevsysc~ Ë 0Òfck+ m@counter@0ti,omap-counter32kÇ target-module@6000ti,sysc-omap4ti,syscÇ`trev+ m` prm@0ti,omap4-prmsimple-busÇ  T + m clocks+sys_clkin_ck@110Œ ti,mux-clock ™sys_clkin_ckË Ç¬ abe_dpll_bypass_clk_mux_ck@108Œ ti,mux-clock™abe_dpll_bypass_clk_mux_ckËÃÇ =abe_dpll_refclk_mux_ck@10cŒ ti,mux-clock™abe_dpll_refclk_mux_ckËÇ  <�dbgclk_mux_ckŒfixed-factor-clock™dbgclk_mux_ckËÐÛl4_wkup_clk_mux_ck@108Œ ti,mux-clock™l4_wkup_clk_mux_ckËÇ syc_clk_div_ck@100Œti,divider-clock™syc_clk_div_ckËÇå ”usim_ck@1858Œti,divider-clock™usim_ckËÃÇXð usim_fclk@1858Œti,gate-clock ™usim_fclkËÃÇXtrace_clk_div_ckŒti,clkdm-gate-clock™trace_clk_div_ck Ë div_ts_ck@1888Œti,divider-clock ™div_ts_ckËÃLj ð  bandgap_ts_fclk@1888Œti,gate-clock™bandgap_ts_fclkËÃLjclockdomainsemu_sys_clkdmti,clockdomain™emu_sys_clkdmËl4_wkup_cm@1800 ti,omap4-cm ™l4_wkup_cmÇ+ mclk@20 ti,clkctrl™l4_wkup_clkctrlÇ \Œ emu_sys_cm@1a00 ti,omap4-cm ™emu_sys_cmÇ+ mclk@20 ti,clkctrl™emu_sys_clkctrlÇ Œ prm@300#ti,omap4-prm-instti,omap-prm-instÇü Žprm@400#ti,omap4-prm-instti,omap-prm-instÇü hprm@500#ti,omap4-prm-instti,omap-prm-instÇü ‘prm@600#ti,omap4-prm-instti,omap-prm-instÇüprm@700#ti,omap4-prm-instti,omap-prm-instÇü 8prm@f00#ti,omap4-prm-instti,omap-prm-instÇü ©prm@1000#ti,omap4-prm-instti,omap-prm-instÇü •prm@1100#ti,omap4-prm-instti,omap-prm-instÇ@ü ¡prm@1200#ti,omap4-prm-instti,omap-prm-instÇü Ÿprm@1300#ti,omap4-prm-instti,omap-prm-instÇüprm@1400#ti,omap4-prm-instti,omap-prm-instÇü prm@1600#ti,omap4-prm-instti,omap-prm-instÇüprm@1700#ti,omap4-prm-instti,omap-prm-instÇü prm@1900#ti,omap4-prm-instti,omap-prm-instÇü –prm@1b00#ti,omap4-prm-instti,omap-prm-instÇ@target-module@a000ti,sysc-omap4ti,syscÇ trev+ m scrm@0ti,omap4-scrmÇ clocks+auxclk0_src_gate_ck@310Œ ti,composite-no-wait-gate-clock™auxclk0_src_gate_ckËÃÇ auxclk0_src_mux_ck@310Œti,composite-mux-clock™auxclk0_src_mux_ck ËÃÇ auxclk0_src_ckŒti,composite-clock™auxclk0_src_ckË auxclk0_ck@310Œti,divider-clock ™auxclk0_ckË ÃåÇ 0auxclk1_src_gate_ck@314Œ ti,composite-no-wait-gate-clock™auxclk1_src_gate_ckËÃÇ !auxclk1_src_mux_ck@314Œti,composite-mux-clock™auxclk1_src_mux_ck ËÃÇ "auxclk1_src_ckŒti,composite-clock™auxclk1_src_ckË!" #auxclk1_ck@314Œti,divider-clock ™auxclk1_ckË#ÃåÇ 1auxclk2_src_gate_ck@318Œ ti,composite-no-wait-gate-clock™auxclk2_src_gate_ckËÃÇ $auxclk2_src_mux_ck@318Œti,composite-mux-clock™auxclk2_src_mux_ck ËÃÇ %auxclk2_src_ckŒti,composite-clock™auxclk2_src_ckË$% &auxclk2_ck@318Œti,divider-clock ™auxclk2_ckË&ÃåÇ 2auxclk3_src_gate_ck@31cŒ ti,composite-no-wait-gate-clock™auxclk3_src_gate_ckËÃÇ 'auxclk3_src_mux_ck@31cŒti,composite-mux-clock™auxclk3_src_mux_ck ËÃÇ (auxclk3_src_ckŒti,composite-clock™auxclk3_src_ckË'( )auxclk3_ck@31cŒti,divider-clock ™auxclk3_ckË)ÃåÇ 3auxclk4_src_gate_ck@320Œ ti,composite-no-wait-gate-clock™auxclk4_src_gate_ckËÃÇ  *auxclk4_src_mux_ck@320Œti,composite-mux-clock™auxclk4_src_mux_ck ËÃÇ  +auxclk4_src_ckŒti,composite-clock™auxclk4_src_ckË*+ ,auxclk4_ck@320Œti,divider-clock ™auxclk4_ckË,ÃåÇ  4auxclk5_src_gate_ck@324Œ ti,composite-no-wait-gate-clock™auxclk5_src_gate_ckËÃÇ$ -auxclk5_src_mux_ck@324Œti,composite-mux-clock™auxclk5_src_mux_ck ËÃÇ$ .auxclk5_src_ckŒti,composite-clock™auxclk5_src_ckË-. /auxclk5_ck@324Œti,divider-clock ™auxclk5_ckË/ÃåÇ$ 5auxclkreq0_ck@210Œ ti,mux-clock™auxclkreq0_ckË012345ÃÇauxclkreq1_ck@214Œ ti,mux-clock™auxclkreq1_ckË012345ÃÇauxclkreq2_ck@218Œ ti,mux-clock™auxclkreq2_ckË012345ÃÇauxclkreq3_ck@21cŒ ti,mux-clock™auxclkreq3_ckË012345ÃÇauxclkreq4_ck@220Œ ti,mux-clock™auxclkreq4_ckË012345ÃÇ auxclkreq5_ck@224Œ ti,mux-clock™auxclkreq5_ckË012345ÃÇ$clockdomainstarget-module@c000ti,sysc-omap4ti,syscÇÀÀ trevsysc~+ mÀscm@c000ti,omap4-scm-wkupÇÀsegment@10000simple-pm-bus+xm@@PP€€ÀÀÐÐààððtarget-module@0ti,sysc-omap2ti,syscÇtrevsyscsyss~*Ë   Òfckdbclk+ mgpio@0ti,omap4-gpioÇ T7IY)target-module@4000ti,sysc-omap2ti,syscÇ@@@trevsyscsyss"~* Ë Òfck+ m@wdt@0ti,omap4-wdtti,omap3-wdtÇ€ TPtarget-module@8000ti,sysc-omap2-timerti,syscÇ€€€trevsyscsyss' ~* Ë Òfck+ m€eytimer@0ti,omap3430-timerÇ€Ë Òfcktimer_sys_ck T%„ “ £target-module@c000ti,sysc-omap2ti,syscÇÀÀÀtrevsyscsyss' ~* Ë XÒfck+ mÀkeypad@0ti,omap4-keypadÇ€ Txtmpu ºdisabledtarget-module@e000ti,sysc-omap4ti,syscÇàà trevsysc~+ màpinmux@40 ti,omap4-padconfpinctrl-singleÇ@8+Á)Ðîÿ default67hsusbb1-phy-clk-pins# °hsusbb1-hub-rst-pins# 6lan7500-rst-pins# 7twl6030-wkup-pins# {segment@20000simple-pm-bus+„m``    00@@PPpp€€target-module@0ti,sysc ºdisabled+ mtarget-module@2000ti,sysc ºdisabled+ m target-module@4000ti,sysc ºdisabled+ m@target-module@6000ti,sysc ºdisabled+0m`p €0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-bus_8 Ë9ÒfckÇJJJ taplaia0+TmJJJJ J (J(0J0segment@0simple-pm-bus+üm 00@@PP``ppÀÀ€€@  00€€   ``ppàà @@PPtarget-module@2000ti,sysc-omap4ti,syscÇ   trevsysc~+ m scm@0ti,omap4-scm-coresimple-busÇ+ mscm_conf@0sysconÇ+ ™control-phy@300ti,control-phy-usb2Çtpower kcontrol-phy@33cti,control-phy-otghsÇ<�totghs_control jtarget-module@4000ti,sysc-omap4ti,syscÇ@trev+ m@cm1@0ti,omap4-cm1simple-busÇ + m clocks+extalt_clkin_ckŒ fixed-clock™extalt_clkin_ck7„DÀpad_clks_src_ckŒ fixed-clock™pad_clks_src_ck7· :pad_clks_ck@108Œti,gate-clock ™pad_clks_ckË:ÃÇpad_slimbus_core_clks_ckŒ fixed-clock™pad_slimbus_core_clks_ck7·secure_32k_clk_src_ckŒ fixed-clock™secure_32k_clk_src_ck7€slimbus_src_clkŒ fixed-clock™slimbus_src_clk7· ;slimbus_clk@108Œti,gate-clock ™slimbus_clkË;à Çsys_32k_ckŒ fixed-clock ™sys_32k_ck7€ virt_12000000_ckŒ fixed-clock™virt_12000000_ck7· virt_13000000_ckŒ fixed-clock™virt_13000000_ck7Æ]@ virt_16800000_ckŒ fixed-clock™virt_16800000_ck7Y virt_19200000_ckŒ fixed-clock™virt_19200000_ck7$ø virt_26000000_ckŒ fixed-clock™virt_26000000_ck7Œº€ virt_27000000_ckŒ fixed-clock™virt_27000000_ck7›üÀ virt_38400000_ckŒ fixed-clock™virt_38400000_ck7Ið tie_low_clock_ckŒ fixed-clock™tie_low_clock_ck7utmi_phy_clkout_ckŒ fixed-clock™utmi_phy_clkout_ck7“‡xclk60mhsp1_ckŒ fixed-clock™xclk60mhsp1_ck7“‡ dxclk60mhsp2_ckŒ fixed-clock™xclk60mhsp2_ck7“‡ exclk60motg_ckŒ fixed-clock™xclk60motg_ck7“‡dpll_abe_ck@1e0Œti,omap4-dpll-m4xen-clock ™dpll_abe_ckË<�=Çàäìè >dpll_abe_x2_ck@1f0Œti,omap4-dpll-x2-clock™dpll_abe_x2_ckË>Çð ?dpll_abe_m2x2_ck@1f0Œti,divider-clock™dpll_abe_m2x2_ckË?åGÇð¬Y @abe_24m_fclkŒfixed-factor-clock ™abe_24m_fclkË@ÐÛabe_clk@108Œti,divider-clock™abe_clkË@åÇpdpll_abe_m3x2_ck@1f4Œti,divider-clock™dpll_abe_m3x2_ckË?åGÇô¬Y Acore_hsd_byp_clk_mux_ck@12cŒ ti,mux-clock™core_hsd_byp_clk_mux_ckËAÃÇ, Bdpll_core_ck@120Œti,omap4-dpll-core-clock ™dpll_core_ckËBÇ $,( Cdpll_core_x2_ckŒti,omap4-dpll-x2-clock™dpll_core_x2_ckËC Ddpll_core_m6x2_ck@140Œti,divider-clock™dpll_core_m6x2_ckËDåGÇ@¬Ydpll_core_m2_ck@130Œti,divider-clock™dpll_core_m2_ckËCåGÇ0¬Y Eddrphy_ckŒfixed-factor-clock ™ddrphy_ckËEÐÛdpll_core_m5x2_ck@13cŒti,divider-clock™dpll_core_m5x2_ckËDåGÇ<�¬Y Fdiv_core_ck@100Œti,divider-clock ™div_core_ckËFÇå Qdiv_iva_hs_clk@1dcŒti,divider-clock™div_iva_hs_clkËFåÇÜp Jdiv_mpu_hs_clk@19cŒti,divider-clock™div_mpu_hs_clkËFåÇœp Pdpll_core_m4x2_ck@138Œti,divider-clock™dpll_core_m4x2_ckËDåGÇ8¬Y Gdll_clk_div_ckŒfixed-factor-clock™dll_clk_div_ckËGÐÛdpll_abe_m2_ck@1f0Œti,divider-clock™dpll_abe_m2_ckË>åÇð¬ Tdpll_core_m3x2_gate_ck@134Œ ti,composite-no-wait-gate-clock™dpll_core_m3x2_gate_ckËDÃÇ4 Hdpll_core_m3x2_div_ck@134Œti,composite-divider-clock™dpll_core_m3x2_div_ckËDåÇ4¬ Idpll_core_m3x2_ckŒti,composite-clock™dpll_core_m3x2_ckËHI dpll_core_m7x2_ck@144Œti,divider-clock™dpll_core_m7x2_ckËDåGÇD¬Yiva_hsd_byp_clk_mux_ck@1acŒ ti,mux-clock™iva_hsd_byp_clk_mux_ckËJÃǬ Kdpll_iva_ck@1a0Œti,omap4-dpll-clock ™dpll_iva_ckËKÇ ¤¬¨“L†7€ü Ldpll_iva_x2_ckŒti,omap4-dpll-x2-clock™dpll_iva_x2_ckËL Mdpll_iva_m4x2_ck@1b8Œti,divider-clock™dpll_iva_m4x2_ckËMåGǸ¬Y“N†À~ Ndpll_iva_m5x2_ck@1bcŒti,divider-clock™dpll_iva_m5x2_ckËMåGǼ¬Y“O†Ü]  Odpll_mpu_ck@160Œti,omap4-dpll-clock ™dpll_mpu_ckËPÇ`dlh dpll_mpu_m2_ck@170Œti,divider-clock™dpll_mpu_m2_ckËåGÇp¬Yper_hs_clk_div_ckŒfixed-factor-clock™per_hs_clk_div_ckËAÐÛ Uusb_hs_clk_div_ckŒfixed-factor-clock™usb_hs_clk_div_ckËAÐÛ [l3_div_ck@100Œti,divider-clock ™l3_div_ckËQÃåÇ Rl4_div_ck@100Œti,divider-clock ™l4_div_ckËRÃåÇlp_clk_div_ckŒfixed-factor-clock™lp_clk_div_ckË@ÐÛ mpu_periphclkŒfixed-factor-clock™mpu_periphclkËÐÛ ocp_abe_iclk@528Œti,divider-clock ™ocp_abe_iclk ËSÃÇ(ðper_abe_24m_fclkŒfixed-factor-clock™per_abe_24m_fclkËTÐÛdummy_ckŒ fixed-clock ™dummy_ck7clockdomainsmpuss_cm@300 ti,omap4-cm ™mpuss_cmÇ+ mclk@20 ti,clkctrl™mpuss_clkctrlÇ Œ tesla_cm@400 ti,omap4-cm ™tesla_cmÇ+ mclk@20 ti,clkctrl™tesla_clkctrlÇ Œ gabe_cm@500 ti,omap4-cm™abe_cmÇ+ mclk@20 ti,clkctrl ™abe_clkctrlÇ lŒ Starget-module@8000ti,sysc-omap4ti,syscÇ€trev+ m€ cm2@0ti,omap4-cm2simple-busÇ + m clocks+per_hsd_byp_clk_mux_ck@14cŒ ti,mux-clock™per_hsd_byp_clk_mux_ckËUÃÇL Vdpll_per_ck@140Œti,omap4-dpll-clock ™dpll_per_ckËVÇ@DLH Wdpll_per_m2_ck@150Œti,divider-clock™dpll_per_m2_ckËWåÇP¬ _dpll_per_x2_ck@150Œti,omap4-dpll-x2-clock™dpll_per_x2_ckËWÇP Xdpll_per_m2x2_ck@150Œti,divider-clock™dpll_per_m2x2_ckËXåGÇP¬Y ^dpll_per_m3x2_gate_ck@154Œ ti,composite-no-wait-gate-clock™dpll_per_m3x2_gate_ckËXÃÇT Ydpll_per_m3x2_div_ck@154Œti,composite-divider-clock™dpll_per_m3x2_div_ckËXåÇT¬ Zdpll_per_m3x2_ckŒti,composite-clock™dpll_per_m3x2_ckËYZ dpll_per_m4x2_ck@158Œti,divider-clock™dpll_per_m4x2_ckËXåGÇX¬Y dpll_per_m5x2_ck@15cŒti,divider-clock™dpll_per_m5x2_ckËXåGÇ\¬Ydpll_per_m6x2_ck@160Œti,divider-clock™dpll_per_m6x2_ckËXåGÇ`¬Y ]dpll_per_m7x2_ck@164Œti,divider-clock™dpll_per_m7x2_ckËXåGÇd¬Ydpll_usb_ck@180Œti,omap4-dpll-j-type-clock ™dpll_usb_ckË[Ç€„Œˆ \dpll_usb_clkdcoldo_ck@1b4Œti,fixed-factor-clock™dpll_usb_clkdcoldo_ckË\›GÇ´¨Ydpll_usb_m2_ck@190Œti,divider-clock™dpll_usb_m2_ckË\åGǐ¬Y `ducati_clk_mux_ck@100Œ ti,mux-clock™ducati_clk_mux_ckËQ]Çfunc_12m_fclkŒfixed-factor-clock™func_12m_fclkË^ÐÛfunc_24m_clkŒfixed-factor-clock ™func_24m_clkË_ÐÛfunc_24mc_fclkŒfixed-factor-clock™func_24mc_fclkË^ÐÛfunc_48m_fclk@108Œti,divider-clock™func_48m_fclkË^Çðfunc_48mc_fclkŒfixed-factor-clock™func_48mc_fclkË^ÐÛfunc_64m_fclk@108Œti,divider-clock™func_64m_fclkËÇðfunc_96m_fclk@108Œti,divider-clock™func_96m_fclkË^Çðinit_60m_fclk@104Œti,divider-clock™init_60m_fclkË`Çð cper_abe_nc_fclk@108Œti,divider-clock™per_abe_nc_fclkËTÇåusb_phy_cm_clk32k@640Œti,gate-clock™usb_phy_cm_clk32kËÃÇ@ lclockdomainsl3_init_clkdmti,clockdomain™l3_init_clkdmË\l4_ao_cm@600 ti,omap4-cm ™l4_ao_cmÇ+ mclk@20 ti,clkctrl™l4_ao_clkctrlÇ Œ nl3_1_cm@700 ti,omap4-cm™l3_1_cmÇ+ mclk@20 ti,clkctrl ™l3_1_clkctrlÇ Œ l3_2_cm@800 ti,omap4-cm™l3_2_cmÇ+ mclk@20 ti,clkctrl ™l3_2_clkctrlÇ Œ ducati_cm@900 ti,omap4-cm ™ducati_cmÇ + m clk@20 ti,clkctrl™ducati_clkctrlÇ Œ —l3_dma_cm@a00 ti,omap4-cm ™l3_dma_cmÇ + m clk@20 ti,clkctrl™l3_dma_clkctrlÇ Œ al3_emif_cm@b00 ti,omap4-cm ™l3_emif_cmÇ + m clk@20 ti,clkctrl™l3_emif_clkctrlÇ Œ ˜d2d_cm@c00 ti,omap4-cm™d2d_cmÇ + m clk@20 ti,clkctrl ™d2d_clkctrlÇ Œ ml4_cfg_cm@d00 ti,omap4-cm ™l4_cfg_cmÇ + m clk@20 ti,clkctrl™l4_cfg_clkctrlÇ Œ 9l3_instr_cm@e00 ti,omap4-cm ™l3_instr_cmÇ+ mclk@20 ti,clkctrl™l3_instr_clkctrlÇ $Œ ivahd_cm@f00 ti,omap4-cm ™ivahd_cmÇ+ mclk@20 ti,clkctrl™ivahd_clkctrlÇ Œ ªiss_cm@1000 ti,omap4-cm™iss_cmÇ+ mclk@20 ti,clkctrl ™iss_clkctrlÇ Œ ql3_dss_cm@1100 ti,omap4-cm ™l3_dss_cmÇ+ mclk@20 ti,clkctrl™l3_dss_clkctrlÇ Œ ¢l3_gfx_cm@1200 ti,omap4-cm ™l3_gfx_cmÇ+ mclk@20 ti,clkctrl™l3_gfx_clkctrlÇ Œ  l3_init_cm@1300 ti,omap4-cm ™l3_init_cmÇ+ mclk@20 ti,clkctrl™l3_init_clkctrlÇ ÄŒ bclock@1400 ti,omap4-cm ™l4_per_cmÇ+ mclock@20 ti,clkctrl™l4_per_clkctrlÇ DŒ rclock@1a0 ti,clkctrl™l4_secure_clkctrlÇ <�Œ target-module@56000ti,sysc-omap2ti,syscÇ``,`(trevsyscsyss# ¶ ~* ËaÒfck+ m`dma-controller@0ti,omap4430-sdmati,omap-sdmaÇ0T  ÄÏ Ü ‚target-module@58000ti,sysc-omap2ti,syscÇ€€€trevsyscsyss#¶~* ËbÒfck+ m€Phsi@0 ti,omap4-hsiÇ@Ptsysgdd ËbÒhsi_fck TGégdd_mpu+ m@hsi-port@2000ti,omap4-hsi-portÇ (ttxrx TChsi-port@3000ti,omap4-hsi-portÇ08ttxrx TDtarget-module@5e000ti,sysc ºdisabled+ mà target-module@62000ti,sysc-omap2ti,syscÇ   trevsyscsyss ~ ËbHÒfck+ m usbhstll@0 ti,usbhs-tllÇ TNtarget-module@64000ti,sysc-omap4ti,syscÇ@@@trevsyscsyss¶~ Ëb8Òfck+ m@usbhshost@0ti,usbhs-hostÇ+ m Ëcde3Òrefclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ùehci-phyohci@800ti,ohci-omap3Ç TLehci@c00 ti,ehci-omapÇ  TMftarget-module@66000ti,sysc-omap2ti,syscÇ```trevsyscsyss ~ ËgÒfck_h!h(rstctrl+ m`mmu@0ti,omap4-iommuÇ T4 šsegment@80000simple-pm-bus+m    ° °À ÀÐ Ðà à@@PP``pp` `p pÐ Ðà à    ° °À ÀÐ Ðà àtarget-module@29000ti,sysc ºdisabled+ mtarget-module@2b000ti,sysc-omap2ti,syscÇ´´´trevsyscsyss ¶~* Ëb@Òfck+ m°usb_otg_hs@0ti,omap4-musbÇÿT\]émcdmaAii Iusb2-phyS^f oj{ÿŠ2target-module@2d000ti,sysc-omap2ti,syscÇÐÐÐtrevsyscsyss ~* ËbÀÒfck+ mÐocp2scp@0ti,omap-ocp2scpÇ+ musb2phy@80 ti,omap-usb2Ç€XokËlÒwkupclk itarget-module@36000ti,sysc-omap2ti,syscÇ```trevsyscsyss~* ËmÒfck+ m`target-module@4d000ti,sysc-omap2ti,syscÇÐÐÐtrevsyscsyss~* ËmÒfck+ mÐtarget-module@59000ti,sysc-omap4-srti,syscǐ8tsysc~ ËnÒfck+ msmartreflex@0ti,omap4-smartreflex-mpuÇ€ Ttarget-module@5b000ti,sysc-omap4-srti,syscÇ°8tsysc~ ËnÒfck+ m°smartreflex@0ti,omap4-smartreflex-ivaÇ€ Tftarget-module@5d000ti,sysc-omap4-srti,syscÇÐ8tsysc~ ËnÒfck+ mÐsmartreflex@0ti,omap4-smartreflex-coreÇ€ Ttarget-module@60000ti,sysc ºdisabled+ mtarget-module@74000ti,sysc-omap4ti,syscÇ@@ trevsysc ~ Ë9Òfck+ m@mailbox@0ti,omap4-mailboxÇ T›§¹ ›mbox-ipu Ë Ö žmbox-dsp Ë Ö œtarget-module@76000ti,sysc-omap2ti,syscÇ```trevsyscsyss ~* Ë9Òfck+ m`spinlock@0ti,omap4-hwspinlockÇásegment@100000simple-pm-bus+`m  00€€  °°target-module@0ti,sysc-omap4ti,syscÇ trevsysc~+ mpinmux@40 ti,omap4-padconfpinctrl-singleÇ@–+Á)Ðîÿ defaultomcpdm-pins(#ÆÈÊÌÎ ’twl6040-pins#\` }tsc2004-pins#PR uuart3-pins # shsusbb1-pins`#‚ „† ˆ Š Œ Ž  ’ ” – ˜  ohsusbb1-phy-rst-pins#L ±i2c1-pins#âä yi2c3-pins#êì tmmc1-pins0#¢¤¦¨ª¬ †twl6030-pins#^A zuart2-pins #ØÚÜÞ xwl12xx-ctrl-pins#"$& ²mmc4-pins0# ˆuart1-pins #üþæè wmcspi1-pins #òôöø ƒmcsasp-pins#¸dss-dpi-pinsà#"$&(*,.0246tvxz|~€‚„†ˆŠŒŽ’” £dss-hdmi-pins#Z\^ ¥i2c4-pins#îð mmc5-pins8#¶   ‹gpio-led-pins#>@ ³gpio-key-pins#b ´ks8851-irq-pins#<� „hdmi-hpd-pins#X  µbacklight-pins#Ö ¸omap4_padconf_global@5a0sysconsimple-busÇ p+ m p ppbias_regulator@60ti,pbias-omap4ti,pbias-omapÇ`ïppbias_mmc_omap4öpbias_mmc_omap4w@-ÆÀ …target-module@2000ti,sysc ºdisabled+ m target-module@8000ti,sysc ºdisabled+ m€target-module@a000ti,sysc-omap4ti,syscÇ   trevsysc ¶ ~5 ËqÒfck+ m segment@180000simple-pm-bus+segment@200000simple-pm-bus+hmà!àð!ð   ° °@ @P P` `p p ! 0!0À ÀÐ Ð!!`!`p!p@!@P!P€!€!""`"`p"p€"€" " °"°À!ÀÐ!Ðtarget-module@4000ti,sysc ºdisabled+ m@target-module@6000ti,sysc ºdisabled+ m`target-module@a000ti,sysc ºdisabled+ m target-module@c000ti,sysc ºdisabled+ mÀtarget-module@10000ti,sysc ºdisabled+ mtarget-module@12000ti,sysc ºdisabled+ m target-module@14000ti,sysc ºdisabled+ m@target-module@16000ti,sysc ºdisabled+ m`target-module@18000ti,sysc ºdisabled+ m€target-module@1c000ti,sysc ºdisabled+ mÀtarget-module@1e000ti,sysc ºdisabled+ màtarget-module@20000ti,sysc ºdisabled+ mtarget-module@26000ti,sysc ºdisabled+ m`target-module@28000ti,sysc ºdisabled+ m€target-module@2a000ti,sysc ºdisabled+ m segment@280000simple-pm-bus+segment@300000simple-pm-bus+´m042@@2@ `2`p2p€2€23 2  À2À@1€€1€@À1À à1à target-module@0ti,sysc ºdisabled+¨m€€€@ÀÀ àà @@@ ``pp€€   ÀÀ@interconnect@48000000ti,omap4-l4-persimple-pm-bus_ Ër Òfck0ÇHHHHHHtaplaia0ia1ia2ia3+mH H segment@0simple-pm-bus+äm  00@@PP``ppààððPP``pp€€  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  00 ` ` p p``pp€€``pp€€    € €       ° ° À À Ð Ð à à ð ð  @ @ ` ` € €@ À À Ð Ð à à  0 0 @ @ P P € €       ° °    P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscÇPTXtrevsyscsyss~* Ër0Òfck+ mserial@0ti,omap4-uartÇ TJ7Ül defaultsºokaytarget-module@32000ti,sysc-omap2-timerti,syscÇ   trevsyscsyss' ~* ËrÒfck+ m timer@0ti,omap3430-timerÇ€ËrÒfcktimer_sys_ck T&target-module@34000ti,sysc-omap4-timerti,syscÇ@@ trevsysc~ Ër Òfck+ m@timer@0ti,omap4430-timerÇ€Ër Òfcktimer_sys_ck T'target-module@36000ti,sysc-omap4-timerti,syscÇ`` trevsysc~ Ër(Òfck+ m`timer@0ti,omap4430-timerÇ€Ër(Òfcktimer_sys_ck T(target-module@3e000ti,sysc-omap4-timerti,syscÇàà trevsysc~ Ër0Òfck+ màtimer@0ti,omap4430-timerÇ€Ër0Òfcktimer_sys_ck T-Ftarget-module@40000ti,sysc ºdisabled+ mtarget-module@55000ti,sysc-omap2ti,syscÇPPQtrevsyscsyss~*Ër@r@ Òfckdbclk+ mPgpio@0ti,omap4-gpioÇ TIY) Štarget-module@57000ti,sysc-omap2ti,syscÇppqtrevsyscsyss~*ËrHrH Òfckdbclk+ mpgpio@0ti,omap4-gpioÇ TIY) «target-module@59000ti,sysc-omap2ti,syscǐ‘trevsyscsyss~*ËrPrP Òfckdbclk+ mgpio@0ti,omap4-gpioÇ T IY) vtarget-module@5b000ti,sysc-omap2ti,syscÇ°°±trevsyscsyss~*ËrXrX Òfckdbclk+ m°gpio@0ti,omap4-gpioÇ T!IY)target-module@5d000ti,sysc-omap2ti,syscÇÐÐÑtrevsyscsyss~*Ër`r` Òfckdbclk+ mÐgpio@0ti,omap4-gpioÇ T"IY) ~target-module@60000ti,sysc-omap2ti,syscǐtrevsyscsyss~* ËrÒfck+ mi2c@0 ti,omap4-i2cÇ T=+ defaulttºokay7€tsc2004@48 ti,tsc2004ÇH defaultu vT ºdisabledtmp105@49 ti,tmp105ÇIeeprom@50microchip,24c32atmel,24c32ÇPtarget-module@6a000ti,sysc-omap2ti,syscÇ P T Xtrevsyscsyss~* Ër Òfck+ m serial@0ti,omap4-uartÇ TH7Ülºokay defaultwtarget-module@6c000ti,sysc-omap2ti,syscÇÀPÀTÀXtrevsyscsyss~* Ër(Òfck+ mÀserial@0ti,omap4-uartÇ TI7Ülºokay defaultxtarget-module@6e000ti,sysc-omap2ti,syscÇàPàTàXtrevsyscsyss~* Ër8Òfck+ màserial@0ti,omap4-uartÇ TF7Ül ºdisabledtarget-module@70000ti,sysc-omap2ti,syscǐtrevsyscsyss~* Ër€Òfck+ mi2c@0 ti,omap4-i2cÇ T8+ defaultyºokay7€twl@48ÇH T ti,twl6030) defaultz{rtcti,twl4030-rtcT regulator-vaux1ti,twl6030-vaux1B@-ÆÀregulator-vaux2ti,twl6030-vaux2O€*¹€regulator-vaux3ti,twl6030-vaux3B@-ÆÀregulator-vmmcti,twl6030-vmmcO€-ÆÀ ‡regulator-vppti,twl6030-vppw@&% regulator-vusimti,twl6030-vusim-ÆÀ-ÆÀSregulator-vdacti,twl6030-vdac ¦regulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioS ¤regulator-vusbti,twl6030-vusb |regulator-v1v8ti,twl6030-v1v8S regulator-v2v1ti,twl6030-v2v1S €usb-comparatorti,twl6030-usbT g|pwmti,twl6030-pwmrpwmledti,twl6030-pwmledrgpadcti,twl6030-gpadcT}twl@4b ti,twl6040ŒÇK default} Tw ~ «€· “target-module@72000ti,sysc-omap2ti,syscÇ   trevsyscsyss~* ËrˆÒfck+ m i2c@0 ti,omap4-i2cÇ T9+ ºdisabledtarget-module@76000ti,sysc-omap4ti,syscÇ`` trevsysc~ ËrÒfck+ m`target-module@78000ti,sysc-omap2ti,syscÇ€€€trevsyscsyss ~* Ër8Òfck+ m€elm@0ti,am3352-elmÇ  T ºdisabledtarget-module@86000ti,sysc-omap2-timerti,syscÇ```trevsyscsyss' ~* ËrÒfck+ m`timer@0ti,omap3430-timerÇ€ËrÒfcktimer_sys_ck T.Ftarget-module@88000ti,sysc-omap4-timerti,syscÇ€€ trevsysc~ ËrÒfck+ m€timer@0ti,omap4430-timerÇ€ËrÒfcktimer_sys_ck T/Ftarget-module@90000ti,sysc-omap2ti,syscÇ à ä trevsysc~ ˁ Òfck+ m rng@0 ti,omap4-rngÇ  T4target-module@96000ti,sysc-omap2ti,syscÇ `Œtsysc ~ ËrÀÒfck+ m `mcbsp@0ti,omap4-mcbspÇÿtmpu ËrÀÒfck TécommonÊ€Ù‚‚ Þtxrx ºdisabledtarget-module@98000ti,sysc-omap4ti,syscÇ € € trevsysc~ ËrÐÒfck+ m €spi@0ti,omap4-mcspiÇ TA+è@Ù‚#‚$‚%‚&‚'‚(‚)‚* Þtx0rx0tx1rx1tx2rx2tx3rx3ºokay defaultƒeth@0ks8851 default„ön6Ç ~T target-module@9a000ti,sysc-omap4ti,syscÇ     trevsysc~ ËrØÒfck+ m  spi@0ti,omap4-mcspiÇ TB+è Ù‚+‚,‚-‚.Þtx0rx0tx1rx1 ºdisabledtarget-module@9c000ti,sysc-omap4ti,syscÇ À À trevsysc¶~ ËbÒfck+ m Àmmc@0ti,omap4-hsmmcÇ TSÙ‚=‚>Þtxrx,… default†9‡EOºokaytarget-module@9e000ti,sysc ºdisabled+ m àtarget-module@a2000ti,sysc ºdisabled+ m target-module@a4000ti,sysc ºdisabled+m @ Ptarget-module@a5000ti,sysc-omap2ti,syscÇ P0 P4 P8trevsyscsyss~* ˁÒfck+ m Pdes@0 ti,omap4-desÇ  TRÙ‚u‚tÞtxrxtarget-module@a8000ti,sysc ºdisabled+ m €@target-module@ad000ti,sysc-omap4ti,syscÇ Ð Ð trevsysc¶~ ËrÒfck+ m Ðmmc@0ti,omap4-hsmmcÇ T^Ù‚M‚NÞtxrx ºdisabledtarget-module@b0000ti,sysc ºdisabled+ m target-module@b2000ti,sysc-omap2ti,syscÇ   trevsyscsyss*e ËrhÒfck+ m 1w@0 ti,omap3-1wÇ T:target-module@b4000ti,sysc-omap4ti,syscÇ @ @ trevsysc¶~ ËbÒfck+ m @mmc@0ti,omap4-hsmmcÇ TVÙ‚/‚0Þtxrx ºdisabledtarget-module@b8000ti,sysc-omap4ti,syscÇ € € trevsysc~ ËràÒfck+ m €spi@0ti,omap4-mcspiÇ T[+èÙ‚‚Þtx0rx0 ºdisabledtarget-module@ba000ti,sysc-omap4ti,syscÇ     trevsysc~ ËrèÒfck+ m  spi@0ti,omap4-mcspiÇ T0+èÙ‚F‚GÞtx0rx0 ºdisabledtarget-module@d1000ti,sysc-omap4ti,syscÇ   trevsysc¶~ ËrÒfck+ m mmc@0ti,omap4-hsmmcÇ T`Ù‚9‚:Þtxrxºokay defaultˆ9‰RE`+wlcore@2 ti,wl1271Ç ŠT sIðtarget-module@d5000ti,sysc-omap4ti,syscÇ P P trevsysc¶~ Ër@Òfck+ m Pmmc@0ti,omap4-hsmmcÇ T;Ù‚;‚<�Þtxrxºokay default‹9ŒE ‡vsegment@200000simple-pm-bus+m55target-module@150000ti,sysc-omap2ti,syscǐtrevsyscsyss~* Ër˜Òfck+ mi2c@0 ti,omap4-i2cÇ T>+ºokay default7€target-module@48210000ti,sysc-omap4-simpleti,sysc_Ž ˏÒfck+ mH!mpu ti,omap4-mpuinterconnect@40100000ti,omap4-l4-abesimple-pm-busÇ@@tlaap_‘+m@IIsegment@0simple-pm-bus+0m  00@@PP``pp€€  °°ààðð  00€€  °°ÀÀÐÐààðð      IIIII I I0I0I@I@IPIPI`I`IpIpI€I€III I I°I°IàIàIðIðIIIII I I0I0I€I€III I I°I°IÀIÀIÐIÐIàIàIðIðIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,syscÇ Œtsysc ~ ËS(Òfck+m I I mcbsp@0ti,omap4-mcbspÇÿI ÿtmpudma ËS(Òfck TécommonÊ€Ù‚!‚"Þtxrx ºdisabledtarget-module@24000ti,sysc-omap2ti,syscÇ@Œtsysc ~ ËS0Òfck+m@I@I@mcbsp@0ti,omap4-mcbspÇÿI@ÿtmpudma ËS0Òfck TécommonÊ€Ù‚‚Þtxrx ºdisabledtarget-module@26000ti,sysc-omap2ti,syscÇ`Œtsysc ~ ËS8Òfck+m`I`I`mcbsp@0ti,omap4-mcbspÇÿI`ÿtmpudma ËS8Òfck TécommonÊ€Ù‚‚Þtxrx ºdisabledtarget-module@28000ti,sysc-mcaspti,syscÇ€€ trevsysc ~ ËS Òfck+0m€I€I€  I I mcasp@0ti,omap4-mcasp-audioÇ I tmpudat TmétxÙ‚Þtx ËS Òfck• ºdisabledtarget-module@2e000ti,sysc-omap4ti,syscÇàà trevsysc~ ËSÒfck+màIàIàdmic@0ti,omap4-dmicÇIàtmpudma TrÙ‚CÞup_link ºdisabledtarget-module@30000ti,sysc-omap2ti,syscÇtrevsyscsyss"~* ËShÒfck+mIIwdt@0ti,omap4-wdtti,omap3-wdtÇ€ TPtarget-module@32000ti,sysc-omap4ti,syscÇ   trevsysc~ ËSÒfck+m I I ºokay default’mcpdm@0ti,omap4-mcpdmÇI tmpudma TpÙ‚A‚BÞup_linkdn_linkË“Òpdmclk ¯target-module@38000ti,sysc-omap4-timerti,syscÇ€€ trevsysc~ ËSHÒfck+m€I€I€timer@0ti,omap4430-timerÇ€I€€ËSH”Òfcktimer_sys_ck T)¨target-module@3a000ti,sysc-omap4-timerti,syscÇ   trevsysc~ ËSPÒfck+m I I timer@0ti,omap4430-timerÇ€I €ËSP”Òfcktimer_sys_ck T*¨target-module@3c000ti,sysc-omap4-timerti,syscÇÀÀ trevsysc~ ËSXÒfck+mÀIÀIÀtimer@0ti,omap4430-timerÇ€IÀ€ËSX”Òfcktimer_sys_ck T+¨target-module@3e000ti,sysc-omap4-timerti,syscÇàà trevsysc~ ËS`Òfck+màIàIàtimer@0ti,omap4430-timerÇ€Ià€ËS`”Òfcktimer_sys_ck T,F¨target-module@80000ti,sysc ºdisabled+mIItarget-module@a0000ti,sysc ºdisabled+m I I target-module@c0000ti,sysc ºdisabled+m I I target-module@f1000ti,sysc-omap4ti,syscÇ trevsysc¶ ~ ËSÒfck+mIItarget-module@50000000ti,sysc-omap2ti,syscÇPPPtrevsyscsyss ~*µ ËÒfck+mPP@gpmc@50000000ti,omap4430-gpmcÇP+ TÙ‚ÞrxtxÈÔËRÒfck)IY ºdisabledtarget-module@52000000ti,sysc-omap4ti,syscÇRR trevsysc¶~5_• ËqÒfck+ mRtarget-module@54000000ti,sysc-omap4-simpleti,sysc_– ËÒfck+ mTpmuarm,cortex-a9-pmuT67target-module@55082000ti,sysc-omap2ti,syscÇU U U trevsyscsyss ~ Ë—Òfck!8(rstctrl mU +mmu@0ti,omap4-iommuÇ Td4æ target-module@4012c000ti,sysc-omap4ti,syscÇ@À@À trevsysc~ ËS@Òfck+m@ÀIÀIÀtarget-module@4e000000ti,sysc-omap2ti,syscÇNN trevsysc ~ mN+dmm@0 ti,omap4-dmmÇ Tqtarget-module@4c000000ti,sysc-omap4-simpleti,syscÇLtrev ˘Òfcky+ mLemif@0 ti,emif-4dÇ Tnü1target-module@4d000000ti,sysc-omap4-simpleti,syscÇMtrev ˘Òfcky+ mMemif@0 ti,emif-4dÇ Toü1dsp ti,omap4-dsp D™Oš!h ËgVomap4-dsp-fw.xe64Td›œ ºdisabledipu@55020000 ti,omap4-ipuÇUtl2ramO!88 Ë—Vomap4-ipu-fw.xem3d›ž ºdisabledtarget-module@4b501000ti,sysc-omap2ti,syscÇKP€KP„KPˆtrevsyscsyss~* ˁÒfck+ mKPaes@0 ti,omap4-aesÇ  TUÙ‚o‚nÞtxrxtarget-module@4b701000ti,sysc-omap2ti,syscÇKp€Kp„Kpˆtrevsyscsyss~* ˁÒfck+ mKpaes@0 ti,omap4-aesÇ  T@Ù‚r‚qÞtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscÇKKKtrevsyscsyss ~* ˁ(Òfck+ mKsham@0ti,omap4-shamÇ T3Ù‚wÞrxregulator-abb-mpu ti,abb-v2öabb_mpu+k€Ë„2•ºokayÇJ0{ÐJ0`J"h'tbase-addressint-addressefuse-addressx¥£èO€èû1Èregulator-abb-iva ti,abb-v2öabb_iva+k€Ë„2•ºokayÇJ0{ØJ0`J"h'tbase-addressint-addressefuse-addressx¥~ðe ²ø ûÿtarget-module@56000000ti,sysc-omap4ti,syscÇVþVþ trevsysc¶~_Ÿ Ë Òfck+ mVgpu@0#ti,omap4430-gpuimg,powervr-sgx540Ç Ttarget-module@58000000ti,sysc-omap2ti,syscÇXX trevsyss*_¡0Ë¢¢ ¢ ¢ Òfckhdmi_clksys_clktv_clk+ mXdss@0 ti,omap4-dssÇ€ºokay Ë¢Òfck+ m default£target-module@1000ti,sysc-omap2ti,syscÇtrevsyscsyss ~ ¶*Ë¢¢  Òfcksys_clk+ mdispc@0ti,omap4-dispcÇ T Ë¢Òfcktarget-module@2000ti,sysc-omap2ti,syscÇ   trevsyscsyss ~*Ë¢¢  Òfcksys_clk+ m encoder@0Ç ºdisabledË¢RÒfckicktarget-module@3000ti,sysc-omap2ti,syscÇ0trev Ë¢ Òsys_clk+ m0encoder@0ti,omap4-vencÇ ºdisabled Ë¢ Òfcktarget-module@4000ti,sysc-omap2ti,syscÇ@@@trevsyscsyss ~*+ m@encoder@0 ti,omap4-dsiÇ@ tprotophypll T5 ºdisabledË¢¢  Òfcksys_clk+target-module@5000ti,sysc-omap2ti,syscÇPPPtrevsyscsyss ~*+ mPencoder@0 ti,omap4-dsiÇ@ tprotophypll TTºokayË¢¢  Òfcksys_clk+±¤target-module@6000ti,sysc-omap4ti,syscÇ`` trevsysc~Ë¢ ¢ Òfckdss_clk+ m` encoder@0ti,omap4-hdmi Çtwppllphycore TeºokayË¢ ¢  Òfcksys_clkÙ‚L Þaudio_tx default¥¼¦portendpointȧ ¶portendpointȨØ ·target-module@5a000000ti,sysc-omap4ti,syscÇZ¤Z¤ trevsysc ¶ ~_©!©(rstctrl ˪Òfck+mZZ[[iva ti,ivahdbandgap@4a002260ÇJ"`J#,J#xti,omap4460-bandgap T~ Š«ã ¬thermal-zonescpu_thermalùúè¬-\ÿÿÛ«tripscpu_alert:† Fбpassive ­cpu_crit:èHFÐ ±criticalcooling-mapsmap0Q­ V®ÿÿÿÿÿÿÿÿmemory@80000000ªmemoryÇ€@soundti,abe-twl6040 eVAR-SOM-OM44nIð{¯„“LHeadset StereophoneHSOLHeadset StereophoneHSORAFMLLine InAFMRLine Inhsusb1_phyusb-nop-xceiv default°±  ~¬ŒË3 Òmain_clk7$ø ffixedregulator-vbatregulator-fixedöVBAT2Z 2Z S· Œwl12xx_vmmc default²regulator-fixedövwl1271w@w@ ›Š Ép· ‰leds gpio-leds default³led0Úvar:green:led0 Š~  àheartbeatled1Úvar:green:led1 Š~ gpio-keys gpio-keys default´+user-key@184Úuser Š~ö connectorhdmi-connector defaultµÚhdmi±a Športendpointȶ §displayinnolux,at070tn83panel-dpiÚlcdpanel-timing7ü U ( %  -( :0 D Pà X  eportendpointÈ· ¨backlightgpio-backlight default¸ Šv compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0display1device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsstatus#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysresetsreset-names#iommu-cellsusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencycd-gpiossramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-lines#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosvcc-supplyregulator-boot-onstartup-delay-uslabellinux,default-triggerlinux,codewakeup-sourcehpd-gpioshback-porchhactivehfront-porchhsync-lenvback-porchvactivevfront-porchvsync-len