Ð þíe28[ø( :[À#epson,embt2wsti,omap4460ti,omap4 +7Epson Moverio BT-200chosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?b/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?g/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?l/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?q/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bv/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B†/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0BŽ/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 –/ocp/dsp/ocp/ipu@55020000cpus+cpu@0arm,cortex-a9¤cpu°ÁÅÌcpuØ“àæW0£è ®`O€ Àè÷£cpu@1arm,cortex-a9¤cpu°Ásram@40304000 mmio-sramÁ@0@ Œinterrupt-controller@48241000arm,cortex-a9-gic#ÁH$H$ cache-controller@48242000arm,pl310-cacheÁH$ 4Blocal-timer@48240600arm,cortex-a9-twd-timerÅÁH$  N  interrupt-controller@48281000ti,omap4-wugen-mpu#ÁH( ocpsimple-pm-busY$Å +gl3-noc@44000000ti,omap4-l3-nocÁDD€ EN  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-busY  Å ÌfckÁJ0J0J0 naplaia0+$gJ0J1J2segment@0simple-pm-bus+„g`` €€  °°@@PPÀÀÐÐtarget-module@4000ti,sysc-omap2ti,syscÁ@@ nrevsyscx Å 0Ìfck+ g@counter@0ti,omap-counter32kÁ target-module@6000ti,sysc-omap4ti,syscÁ`nrev+ g` prm@0ti,omap4-prmsimple-busÁ  N + g clocks+sys_clkin_ck@110† ti,mux-clock “sys_clkin_ckÅ Á¦abe_dpll_bypass_clk_mux_ck@108† ti,mux-clock“abe_dpll_bypass_clk_mux_ckŽÁ<�abe_dpll_refclk_mux_ck@10c† ti,mux-clock“abe_dpll_refclk_mux_ckÅÁ ;dbgclk_mux_ck†fixed-factor-clock“dbgclk_mux_ckÅÊÕl4_wkup_clk_mux_ck@108† ti,mux-clock“l4_wkup_clk_mux_ckÅÁsyc_clk_div_ck@100†ti,divider-clock“syc_clk_div_ckÅÁߏusim_ck@1858†ti,divider-clock“usim_ckŽÁXêusim_fclk@1858†ti,gate-clock “usim_fclkŽÁXtrace_clk_div_ck†ti,clkdm-gate-clock“trace_clk_div_ck Ådiv_ts_ck@1888†ti,divider-clock “div_ts_ckŽÁˆ ê bandgap_ts_fclk@1888†ti,gate-clock“bandgap_ts_fclkŽÁˆclockdomainsemu_sys_clkdmti,clockdomain“emu_sys_clkdmÅl4_wkup_cm@1800 ti,omap4-cm “l4_wkup_cmÁ+ gclk@20 ti,clkctrl“l4_wkup_clkctrlÁ \† emu_sys_cm@1a00 ti,omap4-cm “emu_sys_cmÁ+ gclk@20 ti,clkctrl“emu_sys_clkctrlÁ †prm@300#ti,omap4-prm-instti,omap-prm-instÁöŠprm@400#ti,omap4-prm-instti,omap-prm-instÁ öfprm@500#ti,omap4-prm-instti,omap-prm-instÁöprm@600#ti,omap4-prm-instti,omap-prm-instÁöprm@700#ti,omap4-prm-instti,omap-prm-instÁ ö7prm@f00#ti,omap4-prm-instti,omap-prm-instÁ öžprm@1000#ti,omap4-prm-instti,omap-prm-instÁöprm@1100#ti,omap4-prm-instti,omap-prm-instÁ@öœprm@1200#ti,omap4-prm-instti,omap-prm-instÁöšprm@1300#ti,omap4-prm-instti,omap-prm-instÁöprm@1400#ti,omap4-prm-instti,omap-prm-instÁöprm@1600#ti,omap4-prm-instti,omap-prm-instÁöprm@1700#ti,omap4-prm-instti,omap-prm-instÁö prm@1900#ti,omap4-prm-instti,omap-prm-instÁö‘prm@1b00#ti,omap4-prm-instti,omap-prm-instÁ@ target-module@a000ti,sysc-omap4ti,syscÁ nrev+ g scrm@0ti,omap4-scrmÁ clocks+auxclk0_src_gate_ck@310† ti,composite-no-wait-gate-clock“auxclk0_src_gate_ckŽÁauxclk0_src_mux_ck@310†ti,composite-mux-clock“auxclk0_src_mux_ck ŽÁauxclk0_src_ck†ti,composite-clock“auxclk0_src_ckÅ auxclk0_ck@310†ti,divider-clock “auxclk0_ckÅ ½ßÁ0auxclk1_src_gate_ck@314† ti,composite-no-wait-gate-clock“auxclk1_src_gate_ckŽÁ!auxclk1_src_mux_ck@314†ti,composite-mux-clock“auxclk1_src_mux_ck ŽÁ"auxclk1_src_ck†ti,composite-clock“auxclk1_src_ckÅ!"#auxclk1_ck@314†ti,divider-clock “auxclk1_ckÅ#½ßÁ1auxclk2_src_gate_ck@318† ti,composite-no-wait-gate-clock“auxclk2_src_gate_ckŽÁ$auxclk2_src_mux_ck@318†ti,composite-mux-clock“auxclk2_src_mux_ck ŽÁ%auxclk2_src_ck†ti,composite-clock“auxclk2_src_ckÅ$%&auxclk2_ck@318†ti,divider-clock “auxclk2_ckÅ&½ßÁ2auxclk3_src_gate_ck@31c† ti,composite-no-wait-gate-clock“auxclk3_src_gate_ckŽÁ'auxclk3_src_mux_ck@31c†ti,composite-mux-clock“auxclk3_src_mux_ck ŽÁ(auxclk3_src_ck†ti,composite-clock“auxclk3_src_ckÅ'()auxclk3_ck@31c†ti,divider-clock “auxclk3_ckÅ)½ßÁ3auxclk4_src_gate_ck@320† ti,composite-no-wait-gate-clock“auxclk4_src_gate_ckŽÁ *auxclk4_src_mux_ck@320†ti,composite-mux-clock“auxclk4_src_mux_ck ŽÁ +auxclk4_src_ck†ti,composite-clock“auxclk4_src_ckÅ*+,auxclk4_ck@320†ti,divider-clock “auxclk4_ckÅ,½ßÁ 4auxclk5_src_gate_ck@324† ti,composite-no-wait-gate-clock“auxclk5_src_gate_ckŽÁ$-auxclk5_src_mux_ck@324†ti,composite-mux-clock“auxclk5_src_mux_ck ŽÁ$.auxclk5_src_ck†ti,composite-clock“auxclk5_src_ckÅ-./auxclk5_ck@324†ti,divider-clock “auxclk5_ckÅ/½ßÁ$5auxclkreq0_ck@210† ti,mux-clock“auxclkreq0_ckÅ012345½Áauxclkreq1_ck@214† ti,mux-clock“auxclkreq1_ckÅ012345½Áauxclkreq2_ck@218† ti,mux-clock“auxclkreq2_ckÅ012345½Áauxclkreq3_ck@21c† ti,mux-clock“auxclkreq3_ckÅ012345½Áauxclkreq4_ck@220† ti,mux-clock“auxclkreq4_ckÅ012345½Á auxclkreq5_ck@224† ti,mux-clock“auxclkreq5_ckÅ012345½Á$clockdomainstarget-module@c000ti,sysc-omap4ti,syscÁÀÀ nrevsyscx+ gÀscm@c000ti,omap4-scm-wkupÁÀsegment@10000simple-pm-bus+xg@@PP€€ÀÀÐÐààððtarget-module@0ti,sysc-omap2ti,syscÁnrevsyscsyssx$Å   Ìfckdbclk+ ggpio@0ti,omap4-gpioÁ N1CS#vtarget-module@4000ti,sysc-omap2ti,syscÁ@@@nrevsyscsyss"x$ Å Ìfck+ g@wdt@0ti,omap4-wdtti,omap3-wdtÁ€ NPtarget-module@8000ti,sysc-omap2-timerti,syscÁ€€€nrevsyscsyss' x$ Å Ìfck+ g€_stimer@0ti,omap3430-timerÁ€Å Ìfcktimer_sys_ck N%~  target-module@c000ti,sysc-omap2ti,syscÁÀÀÀnrevsyscsyss' x$ Å XÌfck+ gÀkeypad@0ti,omap4-keypadÁ€ Nxnmpu´defaultÂ6ÌÜï‹fžrsütarget-module@e000ti,sysc-omap4ti,syscÁàà nrevsyscx+ gàpinmux@40 ti,omap4-padconfpinctrl-singleÁ@8+#%Cÿtwl6030-wkup-pins`zsegment@20000simple-pm-bus+„g``    00@@PPpp€€target-module@0ti,sysc tdisabled+ gtarget-module@2000ti,sysc tdisabled+ g target-module@4000ti,sysc tdisabled+ g@target-module@6000ti,sysc tdisabled+0g`p €0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-busY7 Å8ÌfckÁJJJ naplaia0+TgJJJJ J (J(0J0segment@0simple-pm-bus+üg 00@@PP``ppÀÀ€€@  00€€   ``ppàà @@PPtarget-module@2000ti,sysc-omap4ti,syscÁ   nrevsyscx+ g scm@0ti,omap4-scm-coresimple-busÁ+ gscm_conf@0sysconÁ+”control-phy@300ti,control-phy-usb2Ánpowerjcontrol-phy@33cti,control-phy-otghsÁ<�notghs_controlhtarget-module@4000ti,sysc-omap4ti,syscÁ@nrev+ g@cm1@0ti,omap4-cm1simple-busÁ + g clocks+extalt_clkin_ck† fixed-clock“extalt_clkin_ck{„DÀpad_clks_src_ck† fixed-clock“pad_clks_src_ck{·9pad_clks_ck@108†ti,gate-clock “pad_clks_ckÅ9½Ápad_slimbus_core_clks_ck† fixed-clock“pad_slimbus_core_clks_ck{·secure_32k_clk_src_ck† fixed-clock“secure_32k_clk_src_ck{€slimbus_src_clk† fixed-clock“slimbus_src_clk{·:slimbus_clk@108†ti,gate-clock “slimbus_clkÅ:½ Ásys_32k_ck† fixed-clock “sys_32k_ck{€virt_12000000_ck† fixed-clock“virt_12000000_ck{· virt_13000000_ck† fixed-clock“virt_13000000_ck{Æ]@ virt_16800000_ck† fixed-clock“virt_16800000_ck{Yvirt_19200000_ck† fixed-clock“virt_19200000_ck{$øvirt_26000000_ck† fixed-clock“virt_26000000_ck{Œº€virt_27000000_ck† fixed-clock“virt_27000000_ck{›üÀvirt_38400000_ck† fixed-clock“virt_38400000_ck{Iðtie_low_clock_ck† fixed-clock“tie_low_clock_ck{utmi_phy_clkout_ck† fixed-clock“utmi_phy_clkout_ck{“‡xclk60mhsp1_ck† fixed-clock“xclk60mhsp1_ck{“‡cxclk60mhsp2_ck† fixed-clock“xclk60mhsp2_ck{“‡dxclk60motg_ck† fixed-clock“xclk60motg_ck{“‡dpll_abe_ck@1e0†ti,omap4-dpll-m4xen-clock “dpll_abe_ckÅ;<�Áàäìè=dpll_abe_x2_ck@1f0†ti,omap4-dpll-x2-clock“dpll_abe_x2_ckÅ=Áð>dpll_abe_m2x2_ck@1f0†ti,divider-clock“dpll_abe_m2x2_ckÅ>ß‹Áð¦?abe_24m_fclk†fixed-factor-clock “abe_24m_fclkÅ?ÊÕabe_clk@108†ti,divider-clock“abe_clkÅ?ßÁ´dpll_abe_m3x2_ck@1f4†ti,divider-clock“dpll_abe_m3x2_ckÅ>ß‹Áô¦@core_hsd_byp_clk_mux_ck@12c† ti,mux-clock“core_hsd_byp_clk_mux_ckÅ@½Á,Adpll_core_ck@120†ti,omap4-dpll-core-clock “dpll_core_ckÅAÁ $,(Bdpll_core_x2_ck†ti,omap4-dpll-x2-clock“dpll_core_x2_ckÅBCdpll_core_m6x2_ck@140†ti,divider-clock“dpll_core_m6x2_ckÅCß‹Á@¦dpll_core_m2_ck@130†ti,divider-clock“dpll_core_m2_ckÅBß‹Á0¦Dddrphy_ck†fixed-factor-clock “ddrphy_ckÅDÊÕdpll_core_m5x2_ck@13c†ti,divider-clock“dpll_core_m5x2_ckÅCß‹Á<�¦Ediv_core_ck@100†ti,divider-clock “div_core_ckÅEÁßPdiv_iva_hs_clk@1dc†ti,divider-clock“div_iva_hs_clkÅEßÁÜ´Idiv_mpu_hs_clk@19c†ti,divider-clock“div_mpu_hs_clkÅEßÁœ´Odpll_core_m4x2_ck@138†ti,divider-clock“dpll_core_m4x2_ckÅCß‹Á8¦Fdll_clk_div_ck†fixed-factor-clock“dll_clk_div_ckÅFÊÕdpll_abe_m2_ck@1f0†ti,divider-clock“dpll_abe_m2_ckÅ=ßÁð¦Sdpll_core_m3x2_gate_ck@134† ti,composite-no-wait-gate-clock“dpll_core_m3x2_gate_ckÅC½Á4Gdpll_core_m3x2_div_ck@134†ti,composite-divider-clock“dpll_core_m3x2_div_ckÅCßÁ4¦Hdpll_core_m3x2_ck†ti,composite-clock“dpll_core_m3x2_ckÅGHdpll_core_m7x2_ck@144†ti,divider-clock“dpll_core_m7x2_ckÅCß‹ÁD¦iva_hsd_byp_clk_mux_ck@1ac† ti,mux-clock“iva_hsd_byp_clk_mux_ckÅI½Á¬Jdpll_iva_ck@1a0†ti,omap4-dpll-clock “dpll_iva_ckÅJÁ ¤¬¨KÊ7€üKdpll_iva_x2_ck†ti,omap4-dpll-x2-clock“dpll_iva_x2_ckÅKLdpll_iva_m4x2_ck@1b8†ti,divider-clock“dpll_iva_m4x2_ckÅLß‹Á¸¦MÊÀ~Mdpll_iva_m5x2_ck@1bc†ti,divider-clock“dpll_iva_m5x2_ckÅLß‹Á¼¦NÊÜ] Ndpll_mpu_ck@160†ti,omap4-dpll-clock “dpll_mpu_ckÅOÁ`dlhdpll_mpu_m2_ck@170†ti,divider-clock“dpll_mpu_m2_ckÅß‹Áp¦per_hs_clk_div_ck†fixed-factor-clock“per_hs_clk_div_ckÅ@ÊÕTusb_hs_clk_div_ck†fixed-factor-clock“usb_hs_clk_div_ckÅ@ÊÕZl3_div_ck@100†ti,divider-clock “l3_div_ckÅP½ßÁQl4_div_ck@100†ti,divider-clock “l4_div_ckÅQ½ßÁlp_clk_div_ck†fixed-factor-clock“lp_clk_div_ckÅ?ÊÕmpu_periphclk†fixed-factor-clock“mpu_periphclkÅÊÕocp_abe_iclk@528†ti,divider-clock “ocp_abe_iclk ÅR½Á(êper_abe_24m_fclk†fixed-factor-clock“per_abe_24m_fclkÅSÊÕdummy_ck† fixed-clock “dummy_ck{clockdomainsmpuss_cm@300 ti,omap4-cm “mpuss_cmÁ+ gclk@20 ti,clkctrl“mpuss_clkctrlÁ †‹tesla_cm@400 ti,omap4-cm “tesla_cmÁ+ gclk@20 ti,clkctrl“tesla_clkctrlÁ †eabe_cm@500 ti,omap4-cm“abe_cmÁ+ gclk@20 ti,clkctrl “abe_clkctrlÁ l†Rtarget-module@8000ti,sysc-omap4ti,syscÁ€nrev+ g€ cm2@0ti,omap4-cm2simple-busÁ + g clocks+per_hsd_byp_clk_mux_ck@14c† ti,mux-clock“per_hsd_byp_clk_mux_ckÅT½ÁLUdpll_per_ck@140†ti,omap4-dpll-clock “dpll_per_ckÅUÁ@DLHVdpll_per_m2_ck@150†ti,divider-clock“dpll_per_m2_ckÅVßÁP¦^dpll_per_x2_ck@150†ti,omap4-dpll-x2-clock“dpll_per_x2_ckÅVÁPWdpll_per_m2x2_ck@150†ti,divider-clock“dpll_per_m2x2_ckÅWß‹ÁP¦]dpll_per_m3x2_gate_ck@154† ti,composite-no-wait-gate-clock“dpll_per_m3x2_gate_ckÅW½ÁTXdpll_per_m3x2_div_ck@154†ti,composite-divider-clock“dpll_per_m3x2_div_ckÅWßÁT¦Ydpll_per_m3x2_ck†ti,composite-clock“dpll_per_m3x2_ckÅXYdpll_per_m4x2_ck@158†ti,divider-clock“dpll_per_m4x2_ckÅWß‹ÁX¦dpll_per_m5x2_ck@15c†ti,divider-clock“dpll_per_m5x2_ckÅWß‹Á\¦dpll_per_m6x2_ck@160†ti,divider-clock“dpll_per_m6x2_ckÅWß‹Á`¦\dpll_per_m7x2_ck@164†ti,divider-clock“dpll_per_m7x2_ckÅWß‹Ád¦dpll_usb_ck@180†ti,omap4-dpll-j-type-clock “dpll_usb_ckÅZÁ€„Œˆ[dpll_usb_clkdcoldo_ck@1b4†ti,fixed-factor-clock“dpll_usb_clkdcoldo_ckÅ[ß‹Á´ìdpll_usb_m2_ck@190†ti,divider-clock“dpll_usb_m2_ckÅ[ß‹Á¦_ducati_clk_mux_ck@100† ti,mux-clock“ducati_clk_mux_ckÅP\Áfunc_12m_fclk†fixed-factor-clock“func_12m_fclkÅ]ÊÕfunc_24m_clk†fixed-factor-clock “func_24m_clkÅ^ÊÕfunc_24mc_fclk†fixed-factor-clock“func_24mc_fclkÅ]ÊÕfunc_48m_fclk@108†ti,divider-clock“func_48m_fclkÅ]Áêfunc_48mc_fclk†fixed-factor-clock“func_48mc_fclkÅ]ÊÕfunc_64m_fclk@108†ti,divider-clock“func_64m_fclkÅÁêfunc_96m_fclk@108†ti,divider-clock“func_96m_fclkÅ]Áêinit_60m_fclk@104†ti,divider-clock“init_60m_fclkÅ_Áêbper_abe_nc_fclk@108†ti,divider-clock“per_abe_nc_fclkÅSÁßusb_phy_cm_clk32k@640†ti,gate-clock“usb_phy_cm_clk32kŽÁ@kclockdomainsl3_init_clkdmti,clockdomain“l3_init_clkdmÅ[l4_ao_cm@600 ti,omap4-cm “l4_ao_cmÁ+ gclk@20 ti,clkctrl“l4_ao_clkctrlÁ †ml3_1_cm@700 ti,omap4-cm“l3_1_cmÁ+ gclk@20 ti,clkctrl “l3_1_clkctrlÁ †l3_2_cm@800 ti,omap4-cm“l3_2_cmÁ+ gclk@20 ti,clkctrl “l3_2_clkctrlÁ †ducati_cm@900 ti,omap4-cm “ducati_cmÁ + g clk@20 ti,clkctrl“ducati_clkctrlÁ †’l3_dma_cm@a00 ti,omap4-cm “l3_dma_cmÁ + g clk@20 ti,clkctrl“l3_dma_clkctrlÁ †`l3_emif_cm@b00 ti,omap4-cm “l3_emif_cmÁ + g clk@20 ti,clkctrl“l3_emif_clkctrlÁ †“d2d_cm@c00 ti,omap4-cm“d2d_cmÁ + g clk@20 ti,clkctrl “d2d_clkctrlÁ †ll4_cfg_cm@d00 ti,omap4-cm “l4_cfg_cmÁ + g clk@20 ti,clkctrl“l4_cfg_clkctrlÁ †8l3_instr_cm@e00 ti,omap4-cm “l3_instr_cmÁ+ gclk@20 ti,clkctrl“l3_instr_clkctrlÁ $† ivahd_cm@f00 ti,omap4-cm “ivahd_cmÁ+ gclk@20 ti,clkctrl“ivahd_clkctrlÁ †Ÿiss_cm@1000 ti,omap4-cm“iss_cmÁ+ gclk@20 ti,clkctrl “iss_clkctrlÁ †ol3_dss_cm@1100 ti,omap4-cm “l3_dss_cmÁ+ gclk@20 ti,clkctrl“l3_dss_clkctrlÁ †l3_gfx_cm@1200 ti,omap4-cm “l3_gfx_cmÁ+ gclk@20 ti,clkctrl“l3_gfx_clkctrlÁ †›l3_init_cm@1300 ti,omap4-cm “l3_init_cmÁ+ gclk@20 ti,clkctrl“l3_init_clkctrlÁ Ćaclock@1400 ti,omap4-cm “l4_per_cmÁ+ gclock@20 ti,clkctrl“l4_per_clkctrlÁ D†pclock@1a0 ti,clkctrl“l4_secure_clkctrlÁ <�†target-module@56000ti,sysc-omap2ti,syscÁ``,`(nrevsyscsyss# ú x$ Å`Ìfck+ g`dma-controller@0ti,omap4430-sdmati,omap-sdmaÁ0N    €target-module@58000ti,sysc-omap2ti,syscÁ€€€nrevsyscsyss#úx$ ÅaÌfck+ g€Phsi@0 ti,omap4-hsiÁ@Pnsysgdd ÅaÌhsi_fck NG-gdd_mpu+ g@hsi-port@2000ti,omap4-hsi-portÁ (ntxrx NChsi-port@3000ti,omap4-hsi-portÁ08ntxrx NDtarget-module@5e000ti,sysc tdisabled+ gà target-module@62000ti,sysc-omap2ti,syscÁ   nrevsyscsyss x ÅaHÌfck+ g usbhstll@0 ti,usbhs-tllÁ NNtarget-module@64000ti,sysc-omap4ti,syscÁ@@@nrevsyscsyssúx Åa8Ìfck+ g@usbhshost@0ti,usbhs-hostÁ+ g Åbcd3Ìrefclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 tdisabledohci@800ti,ohci-omap3Á NL=ehci@c00 ti,ehci-omapÁ  NMtarget-module@66000ti,sysc-omap2ti,syscÁ```nrevsyscsyss x ÅeÌfckYfUf\rstctrl+ g`mmu@0ti,omap4-iommuÁ Nh•segment@80000simple-pm-bus+g    ° °À ÀÐ Ðà à@@PP``pp` `p pÐ Ðà à    ° °À ÀÐ Ðà àtarget-module@29000ti,sysc tdisabled+ gtarget-module@2b000ti,sysc-omap2ti,syscÁ´´´nrevsyscsyss úx$ Åa@Ìfck+ g°usb_otg_hs@0ti,omap4-musbÁÿN\]-mcdmaug}g ‚usb2-phyŒ—Ÿ ¨h´defaultÂi´ÃÈ2target-module@2d000ti,sysc-omap2ti,syscÁÐÐÐnrevsyscsyss x$ ÅaÀÌfck+ gÐocp2scp@0ti,omap-ocp2scpÁ+ gusb2phy@80 ti,omap-usb2Á€X¨jÅkÌwkupclkÎgtarget-module@36000ti,sysc-omap2ti,syscÁ```nrevsyscsyssx$ ÅlÌfck+ g`target-module@4d000ti,sysc-omap2ti,syscÁÐÐÐnrevsyscsyssx$ ÅlÌfck+ gÐtarget-module@59000ti,sysc-omap4-srti,syscÁ8nsyscx ÅmÌfck+ gsmartreflex@0ti,omap4-smartreflex-mpuÁ€ Ntarget-module@5b000ti,sysc-omap4-srti,syscÁ°8nsyscx ÅmÌfck+ g°smartreflex@0ti,omap4-smartreflex-ivaÁ€ Nftarget-module@5d000ti,sysc-omap4-srti,syscÁÐ8nsyscx ÅmÌfck+ gÐsmartreflex@0ti,omap4-smartreflex-coreÁ€ Ntarget-module@60000ti,sysc tdisabled+ gtarget-module@74000ti,sysc-omap4ti,syscÁ@@ nrevsysc x Å8Ìfck+ g@mailbox@0ti,omap4-mailboxÁ NÙå÷–mbox-ipu   ™mbox-dsp   —target-module@76000ti,sysc-omap2ti,syscÁ```nrevsyscsyss x$ Å8Ìfck+ g`spinlock@0ti,omap4-hwspinlockÁsegment@100000simple-pm-bus+`g  00€€  °°target-module@0ti,sysc-omap4ti,syscÁ nrevsyscx+ gpinmux@40 ti,omap4-padconfpinctrl-singleÁ@–+#%Cÿrtwl6030-pins`^Aypinmux-bt-pins`Šupinmux-gpio-key-pins`¦pinmux-i2c1-pins`âäxpinmux-i2c2-pins`æè|pinmux-i2c3-pins`êìspinmux-i2c4-pins`îð‡pinmux-keypad-pins0`6pinmux-mcbsp2-pins `¶¸º¼Žpinmux-mpu9150-pins`‰pinmux-mpu9150h-pins`6}pinmux-tlv320aic3x-pins`>ˆpinmux-uart2-pins `ØÚÜÞtpinmux-uart3-pins`qpinmux-usb-otg-hs-pins`TVXipinmux-wl12xx-pins8`†,.0246ƒpinmux-wl12xx-gpio-pins`ˆ§omap4_padconf_global@5a0sysconsimple-busÁ p+ g pnpbias_regulator@60ti,pbias-omap4ti,pbias-omapÁ`-npbias_mmc_omap44pbias_mmc_omap4Cw@[-ÆÀtarget-module@2000ti,sysc tdisabled+ g target-module@8000ti,sysc tdisabled+ g€target-module@a000ti,sysc-omap4ti,syscÁ   nrevsysc ú xs ÅoÌfck+ g segment@180000simple-pm-bus+segment@200000simple-pm-bus+hgà!àð!ð   ° °@ @P P` `p p ! 0!0À ÀÐ Ð!!`!`p!p@!@P!P€!€!""`"`p"p€"€" " °"°À!ÀÐ!Ðtarget-module@4000ti,sysc tdisabled+ g@target-module@6000ti,sysc tdisabled+ g`target-module@a000ti,sysc tdisabled+ g target-module@c000ti,sysc tdisabled+ gÀtarget-module@10000ti,sysc tdisabled+ gtarget-module@12000ti,sysc tdisabled+ g target-module@14000ti,sysc tdisabled+ g@target-module@16000ti,sysc tdisabled+ g`target-module@18000ti,sysc tdisabled+ g€target-module@1c000ti,sysc tdisabled+ gÀtarget-module@1e000ti,sysc tdisabled+ gàtarget-module@20000ti,sysc tdisabled+ gtarget-module@26000ti,sysc tdisabled+ g`target-module@28000ti,sysc tdisabled+ g€target-module@2a000ti,sysc tdisabled+ g segment@280000simple-pm-bus+segment@300000simple-pm-bus+´g042@@2@ `2`p2p€2€23 2  À2À@1€€1€@À1À à1à target-module@0ti,sysc tdisabled+¨g€€€@ÀÀ àà @@@ ``pp€€   ÀÀ@interconnect@48000000ti,omap4-l4-persimple-pm-busY Åp Ìfck0ÁHHHHHHnaplaia0ia1ia2ia3+gH H segment@0simple-pm-bus+äg  00@@PP``ppààððPP``pp€€  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  00 ` ` p p``pp€€``pp€€    € €       ° ° À À Ð Ð à à ð ð  @ @ ` ` € €@ À À Ð Ð à à  0 0 @ @ P P € €       ° °    P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscÁPTXnrevsyscsyssx$ Åp0Ìfck+ gserial@0ti,omap4-uartÁ NJ{Ül´defaultÂq„Jrtarget-module@32000ti,sysc-omap2-timerti,syscÁ   nrevsyscsyss' x$ ÅpÌfck+ g timer@0ti,omap3430-timerÁ€ÅpÌfcktimer_sys_ck N&target-module@34000ti,sysc-omap4-timerti,syscÁ@@ nrevsyscx Åp Ìfck+ g@timer@0ti,omap4430-timerÁ€Åp Ìfcktimer_sys_ck N'target-module@36000ti,sysc-omap4-timerti,syscÁ`` nrevsyscx Åp(Ìfck+ g`timer@0ti,omap4430-timerÁ€Åp(Ìfcktimer_sys_ck N(target-module@3e000ti,sysc-omap4-timerti,syscÁàà nrevsyscx Åp0Ìfck+ gàtimer@0ti,omap4430-timerÁ€Åp0Ìfcktimer_sys_ck N-˜target-module@40000ti,sysc tdisabled+ gtarget-module@55000ti,sysc-omap2ti,syscÁPPQnrevsyscsyssx$Åp@p@ Ìfckdbclk+ gPgpio@0ti,omap4-gpioÁ NCS#~target-module@57000ti,sysc-omap2ti,syscÁppqnrevsyscsyssx$ÅpHpH Ìfckdbclk+ gpgpio@0ti,omap4-gpioÁ NCS# target-module@59000ti,sysc-omap2ti,syscÁ‘nrevsyscsyssx$ÅpPpP Ìfckdbclk+ ggpio@0ti,omap4-gpioÁ N CS#target-module@5b000ti,sysc-omap2ti,syscÁ°°±nrevsyscsyssx$ÅpXpX Ìfckdbclk+ g°gpio@0ti,omap4-gpioÁ N!CS#target-module@5d000ti,sysc-omap2ti,syscÁÐÐÑnrevsyscsyssx$Åp`p` Ìfckdbclk+ gÐgpio@0ti,omap4-gpioÁ N"CS#target-module@60000ti,sysc-omap2ti,syscÁnrevsyscsyssx$ ÅpÌfck+ gi2c@0 ti,omap4-i2cÁ N=+´defaultÂs{† led-controller@66rohm,bd2606mvvÁf+led@0Á¥«statusled@2Á¥«statusled@4Á¥«statustarget-module@6a000ti,sysc-omap2ti,syscÁ P T Xnrevsyscsyssx$ Åp Ìfck+ g serial@0ti,omap4-uartÁ NH{Ültarget-module@6c000ti,sysc-omap2ti,syscÁÀPÀTÀXnrevsyscsyssx$ Åp(Ìfck+ gÀserial@0ti,omap4-uartÁ NI{Ül´defaultÂtu„IrÜbluetooth-gnss ti,wl1283-st ´vÅw Ìext_clocktarget-module@6e000ti,sysc-omap2ti,syscÁàPàTàXnrevsyscsyssx$ Åp8Ìfck+ gàserial@0ti,omap4-uartÁ NF{Ültarget-module@70000ti,sysc-omap2ti,syscÁnrevsyscsyssx$ Åp€Ìfck+ gi2c@0 ti,omap4-i2cÁ N8+´defaultÂx{€pmic@48 ti,twl6032ÁH† N#Á´defaultÂyzwrtcti,twl4030-rtcN regulator-ldo2ti,twl6032-ldo2CB@[-ÆÀ†regulator-ldo4ti,twl6032-ldo4CO€[*¹€regulator-ldo3ti,twl6032-ldo3CB@[-ÆÀregulator-ldo5ti,twl6032-ldo5CO€[-ÆÀÙ‚regulator-ldo1ti,twl6032-ldo1Cw@[&% regulator-ldo7ti,twl6032-ldo7CO€[,@ regulator-ldolnti,twl6032-ldolnìregulator-ldo6ti,twl6032-ldo6ìregulator-ldousbti,twl6032-ldousbì{regulator-vioti,twl6032-vioìusb-comparatorti,twl6030-usbN {pwmti,twl6030-pwm ¤pwmledti,twl6030-pwmled gpadcti,twl6032-gpadcNtarget-module@72000ti,sysc-omap2ti,syscÁ   nrevsyscsyssx$ ÅpˆÌfck+ g i2c@0 ti,omap4-i2cÁ N9+´defaultÂ|{ @imu@68invensense,mpu9150Áh´defaultÂ} ~(target-module@76000ti,sysc-omap4ti,syscÁ`` nrevsyscx ÅpÌfck+ g`target-module@78000ti,sysc-omap2ti,syscÁ€€€nrevsyscsyss x$ Åp8Ìfck+ g€elm@0ti,am3352-elmÁ  N tdisabledtarget-module@86000ti,sysc-omap2-timerti,syscÁ```nrevsyscsyss' x$ ÅpÌfck+ g`timer@0ti,omap3430-timerÁ€ÅpÌfcktimer_sys_ck N.˜target-module@88000ti,sysc-omap4-timerti,syscÁ€€ nrevsyscx ÅpÌfck+ g€timer@0ti,omap4430-timerÁ€ÅpÌfcktimer_sys_ck N/˜target-module@90000ti,sysc-omap2ti,syscÁ à ä nrevsyscx Å Ìfck+ g rng@0 ti,omap4-rngÁ  N4target-module@96000ti,sysc-omap2ti,syscÁ `Œnsysc x ÅpÀÌfck+ g `mcbsp@0ti,omap4-mcbspÁÿnmpu ÅpÀÌfck N-common2€A€€ Ftxrx tdisabledtarget-module@98000ti,sysc-omap4ti,syscÁ € € nrevsyscx ÅpÐÌfck+ g €spi@0ti,omap4-mcspiÁ NA+P@A€#€$€%€&€'€(€)€* Ftx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,syscÁ     nrevsyscx ÅpØÌfck+ g  spi@0ti,omap4-mcspiÁ NB+P A€+€,€-€.Ftx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,syscÁ À À nrevsyscúx ÅaÌfck+ g Àmmc@0ti,omap4-hsmmcÁ NS^kA€=€>Ftxrx‚‚›¥target-module@9e000ti,sysc tdisabled+ g àtarget-module@a2000ti,sysc tdisabled+ g target-module@a4000ti,sysc tdisabled+g @ Ptarget-module@a5000ti,sysc-omap2ti,syscÁ P0 P4 P8nrevsyscsyssx$ ÅÌfck+ g Pdes@0 ti,omap4-desÁ  NRA€u€tFtxrxtarget-module@a8000ti,sysc tdisabled+ g €@target-module@ad000ti,sysc-omap4ti,syscÁ Ð Ð nrevsyscúx ÅpÌfck+ g Ðmmc@0ti,omap4-hsmmcÁ N^kA€M€NFtxrx´defaultƒ„¯…„^r.º¥È+wlcore@2 ti,wl1283Á „v-irqÛŒº€ïŒº€target-module@b0000ti,sysc tdisabled+ g target-module@b2000ti,sysc-omap2ti,syscÁ   nrevsyscsyss$_ ÅphÌfck+ g 1w@0 ti,omap3-1wÁ N:target-module@b4000ti,sysc-omap4ti,syscÁ @ @ nrevsyscúx ÅaÌfck+ g @mmc@0ti,omap4-hsmmcÁ NVkA€/€0Ftxrx†¥target-module@b8000ti,sysc-omap4ti,syscÁ € € nrevsyscx ÅpàÌfck+ g €spi@0ti,omap4-mcspiÁ N[+PA€€Ftx0rx0target-module@ba000ti,sysc-omap4ti,syscÁ     nrevsyscx ÅpèÌfck+ g  spi@0ti,omap4-mcspiÁ N0+PA€F€GFtx0rx0target-module@d1000ti,sysc-omap4ti,syscÁ   nrevsyscúx ÅpÌfck+ g mmc@0ti,omap4-hsmmcÁ N`kA€9€:Ftxrx tdisabledtarget-module@d5000ti,sysc-omap4ti,syscÁ P P nrevsyscúx Åp@Ìfck+ g Pmmc@0ti,omap4-hsmmcÁ N;kA€;€<�Ftxrx tdisabledsegment@200000simple-pm-bus+g55target-module@150000ti,sysc-omap2ti,syscÁnrevsyscsyssx$ Åp˜Ìfck+ gi2c@0 ti,omap4-i2cÁ N>+´default‡{~@codec@18ti,tlv320aic3xÁ´defaultˆ ~imu@68invensense,mpu9150Áh´default‰ ~(!target-module@48210000ti,sysc-omap4-simpleti,syscYŠ Å‹Ìfck+ gH!mpu ti,omap4-mpu:Œinterconnect@40100000ti,omap4-l4-abesimple-pm-busÁ@@nlaapY+g@IIsegment@0simple-pm-bus+0g  00@@PP``pp€€  °°ààðð  00€€  °°ÀÀÐÐààðð      IIIII I I0I0I@I@IPIPI`I`IpIpI€I€III I I°I°IàIàIðIðIIIII I I0I0I€I€III I I°I°IÀIÀIÐIÐIàIàIðIðIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,syscÁ Œnsysc x ÅR(Ìfck+g I I mcbsp@0ti,omap4-mcbspÁÿI ÿnmpudma ÅR(Ìfck N-common2€A€!€"Ftxrx tdisabledtarget-module@24000ti,sysc-omap2ti,syscÁ@Œnsysc x ÅR0Ìfck+g@I@I@mcbsp@0ti,omap4-mcbspÁÿI@ÿnmpudma ÅR0Ìfck N-common2€A€€Ftxrxtokay´defaultÂŽtarget-module@26000ti,sysc-omap2ti,syscÁ`Œnsysc x ÅR8Ìfck+g`I`I`mcbsp@0ti,omap4-mcbspÁÿI`ÿnmpudma ÅR8Ìfck N-common2€A€€Ftxrx tdisabledtarget-module@28000ti,sysc-mcaspti,syscÁ€€ nrevsysc x ÅR Ìfck+0g€I€I€  I I mcasp@0ti,omap4-mcasp-audioÁ I nmpudat Nm-txA€Ftx ÅR Ìfck?G tdisabledtarget-module@2e000ti,sysc-omap4ti,syscÁàà nrevsyscx ÅRÌfck+gàIàIàdmic@0ti,omap4-dmicÁIànmpudma NrA€CFup_link tdisabledtarget-module@30000ti,sysc-omap2ti,syscÁnrevsyscsyss"x$ ÅRhÌfck+gIIwdt@0ti,omap4-wdtti,omap3-wdtÁ€ NPtarget-module@32000ti,sysc-omap4ti,syscÁ   nrevsyscx ÅRÌfck+g I I  tdisabledmcpdm@0ti,omap4-mcpdmÁI nmpudma NpA€A€BFup_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,syscÁ€€ nrevsyscx ÅRHÌfck+g€I€I€timer@0ti,omap4430-timerÁ€I€€ÅRHÌfcktimer_sys_ck N)Rtarget-module@3a000ti,sysc-omap4-timerti,syscÁ   nrevsyscx ÅRPÌfck+g I I timer@0ti,omap4430-timerÁ€I €ÅRPÌfcktimer_sys_ck N*Rtarget-module@3c000ti,sysc-omap4-timerti,syscÁÀÀ nrevsyscx ÅRXÌfck+gÀIÀIÀtimer@0ti,omap4430-timerÁ€IÀ€ÅRXÌfcktimer_sys_ck N+Rtarget-module@3e000ti,sysc-omap4-timerti,syscÁàà nrevsyscx ÅR`Ìfck+gàIàIàtimer@0ti,omap4430-timerÁ€Ià€ÅR`Ìfcktimer_sys_ck N,˜Rtarget-module@80000ti,sysc tdisabled+gIItarget-module@a0000ti,sysc tdisabled+g I I target-module@c0000ti,sysc tdisabled+g I I target-module@f1000ti,sysc-omap4ti,syscÁ nrevsyscú x ÅRÌfck+gIItarget-module@50000000ti,sysc-omap2ti,syscÁPPPnrevsyscsyss x$_ ÅÌfck+gPP@gpmc@50000000ti,omap4430-gpmcÁP+ NA€Frxtxr~ÅQÌfck#CStarget-module@52000000ti,sysc-omap4ti,syscÁRR nrevsyscúxsY ÅoÌfck+ gRtarget-module@54000000ti,sysc-omap4-simpleti,syscY‘ ÅÌfck+ gTpmuarm,cortex-a9-pmuN67target-module@55082000ti,sysc-omap2ti,syscÁU U U nrevsyscsyss x Å’ÌfckU7\rstctrl gU +mmu@0ti,omap4-iommuÁ Ndh˜target-module@4012c000ti,sysc-omap4ti,syscÁ@À@À nrevsyscx ÅR@Ìfck+g@ÀIÀIÀtarget-module@4e000000ti,sysc-omap2ti,syscÁNN nrevsysc x gN+dmm@0 ti,omap4-dmmÁ Nqtarget-module@4c000000ti,sysc-omap4-simpleti,syscÁLnrev Å“Ìfcks+ gLemif@0 ti,emif-4dÁ Nn¦¯ÆÛtarget-module@4d000000ti,sysc-omap4-simpleti,syscÁMnrev Å“Ìfcks+ gMemif@0 ti,emif-4dÁ No¦¯ÆÛdsp ti,omap4-dsp î”ù•Uf Åeomap4-dsp-fw.xe64T–— tdisabledipu@55020000 ti,omap4-ipuÁUnl2ramù˜U77 Å’omap4-ipu-fw.xem3–™ tdisabledtarget-module@4b501000ti,sysc-omap2ti,syscÁKP€KP„KPˆnrevsyscsyssx$ ÅÌfck+ gKPaes@0 ti,omap4-aesÁ  NUA€o€nFtxrxtarget-module@4b701000ti,sysc-omap2ti,syscÁKp€Kp„Kpˆnrevsyscsyssx$ ÅÌfck+ gKpaes@0 ti,omap4-aesÁ  N@A€r€qFtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscÁKKKnrevsyscsyss x$ Å(Ìfck+ gKsham@0ti,omap4-shamÁ N3A€wFrxregulator-abb-mpu ti,abb-v24abb_mpu+€Å.2?tokayÁJ0{ÐJ0`J"h'nbase-addressint-addressefuse-addressxO£èO€èû1Èregulator-abb-iva ti,abb-v24abb_iva+€Å.2?tokayÁJ0{ØJ0`J"h'nbase-addressint-addressefuse-addressxO~ðe ²ø ûÿtarget-module@56000000ti,sysc-omap4ti,syscÁVþVþ nrevsyscúxYš Å›Ìfck+ gVgpu@0#ti,omap4430-gpuimg,powervr-sgx540Á Ntarget-module@58000000ti,sysc-omap2ti,syscÁXX nrevsyss$Yœ0ŝ   Ìfckhdmi_clksys_clktv_clk+ gXdss@0 ti,omap4-dssÁ€ tdisabled ŝÌfck+ gtarget-module@1000ti,sysc-omap2ti,syscÁnrevsyscsyss x ú$ŝ  Ìfcksys_clk+ gdispc@0ti,omap4-dispcÁ N ŝÌfcktarget-module@2000ti,sysc-omap2ti,syscÁ   nrevsyscsyss x$ŝ  Ìfcksys_clk+ g encoder@0Á tdisabledŝQÌfckicktarget-module@3000ti,sysc-omap2ti,syscÁ0nrev ŝ Ìsys_clk+ g0encoder@0ti,omap4-vencÁ tdisabled ŝ Ìfcktarget-module@4000ti,sysc-omap2ti,syscÁ@@@nrevsyscsyss x$+ g@encoder@0 ti,omap4-dsiÁ@ nprotophypll N5 tdisabledŝ  Ìfcksys_clk+target-module@5000ti,sysc-omap2ti,syscÁPPPnrevsyscsyss x$+ gPencoder@0 ti,omap4-dsiÁ@ nprotophypll NT tdisabledŝ  Ìfcksys_clk+target-module@6000ti,sysc-omap4ti,syscÁ`` nrevsyscxŝ  Ìfckdss_clk+ g` encoder@0ti,omap4-hdmi Ánwppllphycore Ne tdisabledŝ   Ìfcksys_clkA€L Faudio_txtarget-module@5a000000ti,sysc-omap4ti,syscÁZ¤Z¤ nrevsysc ú xYžUž\rstctrl ÅŸÌfck+gZZ[[iva ti,ivahdbandgap@4a002260ÁJ"`J#,J#xti,omap4460-bandgap N~ » [¡thermal-zonescpu_thermalqú‡è•¡¥\ÿÿÛ«tripscpu_alert²† ¾Ð«passive¢cpu_crit²èH¾Ð «criticalcooling-mapsmap0É¢ Σÿÿÿÿÿÿÿÿmemory@80000000¤memoryÁ€@backlight-leftpwm-backlight ݤw5”â¥backlight-rightpwm-backlight ݤw5”â¥gpio-keys gpio-keys´default¦key-lockïLock »~õ  unknown-supplyregulator-fixed4unknown¥wl12xx-pwrseqmmc-pwrseq-simpleÅw Ìext_clock…wl12xx-vmmc´default§regulator-fixed4vwl1271Cw@[w@ v p '„ compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentspinctrl-namespinctrl-0keypad,num-rowskeypad,num-columnslinux,keymaplinux,input-no-autorepeat#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedresetsreset-names#iommu-cellsusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmcolorfunctionenable-gpiossystem-power-controllerti,retain-on-resetregulator-always-onusb-supply#pwm-cells#io-channel-cellsinterruptti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybroken-cdbus-widthmmc-pwrseqnon-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequency#sound-dai-cellsreset-gpiosinvensense,level-shiftersramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_info#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicepwmspower-supplylabellinux,codelinux,input-typegpiostartup-delay-usenable-active-high