Ð þíñ8<�(µ%lg,omap3-sniperti,omap3630ti,omap3 +7LG Optimus Blackchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpu‡‹’cpuž“à¬ÀËÚæpmu@54000000arm,cortex-a8-pmu‡T€îùdebugsssocti,omap-inframpu ti,omap3-mpuùmpuiva ti,iva2.2ùivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus‡hî +ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus‡ +  pinmux@30 ti,omap3-padconfpinctrl-single‡08+ *?]ÿzdefaultæçuart3-pinsˆnpæèdp3t-sel-pinsˆfhæéi2c1-pinsˆŠŒæêi2c2-pinsˆŽæñi2c3-pinsˆ’”æòlp8720-en-pinsˆPæómmc1-pins0ˆæömmc2-pinsPˆ(*,.02468:æúusb-otg-hs-pins`ˆrtvxz|~€‚„†ˆætwl4030-pinsˆ°Aæëscm_conf@270sysconsimple-bus‡p0+ p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap‡°œpbias_mmc_omap2430£pbias_mmc_omap2430²w@Ê-ÆÀæõclocks+clock@68 ti,clksel‡hâ+clock-mcbsp5-mux-fck@4‡âti,composite-mux-clockïmcbsp5_mux_fck‹æ clock-mcbsp3-mux-fck@0‡âti,composite-mux-clockïmcbsp3_mux_fck‹ æclock-mcbsp4-mux-fck@2‡âti,composite-mux-clockïmcbsp4_mux_fck‹ æmcbsp5_fckâti,composite-clock‹ æclock@4 ti,clksel‡â+clock-mcbsp1-mux-fck@2‡âti,composite-mux-clockïmcbsp1_mux_fck‹æ clock-mcbsp2-mux-fck@6‡âti,composite-mux-clockïmcbsp2_mux_fck‹ æmcbsp1_fckâti,composite-clock‹ æümcbsp2_fckâti,composite-clock‹æþmcbsp3_fckâti,composite-clock‹æÿmcbsp4_fckâti,composite-clock‹æclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single‡ \+ *?]ÿzdefaultmmc1-cd-pinsˆæ÷twl4030-vpins-pins ˆæìtarget-module@480a6000ti,sysc-omap2ti,sysc‡H `DH `HH `Lrevsyscsyss  '‹’ick+ H ` aes1@0 ti,omap3-aes‡Pî4  9txrxtarget-module@480c5000ti,sysc-omap2ti,sysc‡H PDH PHH PLrevsyscsyss  '‹’ick+ H P aes2@0 ti,omap3-aes‡Pî4AB9txrxprm@48306000 ti,omap3-prm‡H0`@î clocks+virt_16_8m_ckâ fixed-clockCYæosc_sys_ck@d40â ti,mux-clock‹‡ @æsys_ck@1270âti,divider-clock‹S`‡pkæ"sys_clkout1@d70âti,gate-clock‹‡ pSdpll3_x2_ckâfixed-factor-clock‹‚dpll3_m2x2_ckâfixed-factor-clock‹‚æ!dpll4_x2_ckâfixed-factor-clock‹ ‚corex2_fckâfixed-factor-clock‹!‚æ#wkup_l4_ickâfixed-factor-clock‹"‚æbcorex2_d3_fckâfixed-factor-clock‹#‚æŠcorex2_d5_fckâfixed-factor-clock‹#‚æ‹clockdomainscm@48004000 ti,omap3-cm‡H@@clocks+dummy_apb_pclkâ fixed-clockComap_32k_fckâ fixed-clockC€æHvirt_12m_ckâ fixed-clockC·ævirt_13m_ckâ fixed-clockCÆ]@ævirt_19200000_ckâ fixed-clockC$øævirt_26000000_ckâ fixed-clockCŒº€ævirt_38_4m_ckâ fixed-clockCIðædpll4_ck@d00âti,omap3-dpll-per-j-type-clock‹""‡ D 0æ dpll4_m2_ck@d48âti,divider-clock‹ `?‡ Hkæ$dpll4_m2x2_mul_ckâfixed-factor-clock‹$‚æ%dpll4_m2x2_ck@d00âti,hsdiv-gate-clock‹%S‡ —æ&omap_96m_alwon_fckâfixed-factor-clock‹&‚æ2dpll3_ck@d00âti,omap3-dpll-core-clock‹""‡ @ 0æclock@1140 ti,clksel‡@â+clock-dpll3-m3@16‡âti,divider-clock ïdpll3_m3_ck‹`kæ,clock-dpll4-m6@24‡âti,divider-clock ïdpll4_m6_ck‹ `?kæ>clock-emu-src-mux@0‡â ti,mux-clockïemu_src_mux_ck‹"'()ævclock-pclk-fck@8‡âti,divider-clock ïpclk_fck‹*`kclock-pclkx2-fck@6‡âti,divider-clock ïpclkx2_fck‹*`kclock-atclk-fck@4‡âti,divider-clock ïatclk_fck‹*`kclock-traceclk-src-fck@2‡â ti,mux-clockïtraceclk_src_fck‹"'()æ+clock-traceclk-fck@11‡ âti,divider-clock ïtraceclk_fck‹+`kdpll3_m3x2_mul_ckâfixed-factor-clock‹,‚æ-dpll3_m3x2_ck@d00âti,hsdiv-gate-clock‹-S ‡ —æ.emu_core_alwon_ckâfixed-factor-clock‹.‚æ'sys_altclkâ fixed-clockCæ5mcbsp_clksâ fixed-clockCæcore_ckâfixed-factor-clock‹‚æ/dpll1_fck@940âti,divider-clock‹/S`‡ @kæ0dpll1_ck@904âti,omap3-dpll-clock‹"0‡  $ @ 4ædpll1_x2_ckâfixed-factor-clock‹‚æ1dpll1_x2m2_ck@944âti,divider-clock‹1`‡ DkæEcm_96m_fckâfixed-factor-clock‹2‚æ3clock@d40 ti,clksel‡ @â+clock-dpll3-m2@27‡âti,divider-clock ïdpll3_m2_ck‹`kæclock-omap-96m-fck@6‡â ti,mux-clock ïomap_96m_fck‹3"æYclock-omap-54m-fck@5‡â ti,mux-clock ïomap_54m_fck‹45æAclock-omap-48m-fck@3‡â ti,mux-clock ïomap_48m_fck‹65æ9clock@e40 ti,clksel‡@â+clock-dpll4-m3@8‡âti,divider-clock ïdpll4_m3_ck‹ ` kæ7clock-dpll4-m4@0‡âti,divider-clock ïdpll4_m4_ck‹ `kæ:dpll4_m3x2_mul_ckâfixed-factor-clock‹7‚æ8dpll4_m3x2_ck@d00âti,hsdiv-gate-clock‹8S‡ —æ4cm_96m_d2_fckâfixed-factor-clock‹3‚æ6omap_12m_fckâfixed-factor-clock‹9‚æZdpll4_m4x2_mul_ckâti,fixed-factor-clock‹:­»Èæ;dpll4_m4x2_ck@d00âti,gate-clock‹;S‡ —Èæ^dpll4_m5_ck@f40âti,divider-clock‹ `?‡@kæ<�dpll4_m5x2_mul_ckâti,fixed-factor-clock‹<�­»Èæ=dpll4_m5x2_ck@d00âti,hsdiv-gate-clock‹=S‡ —Èæzdpll4_m6x2_mul_ckâfixed-factor-clock‹>‚æ?dpll4_m6x2_ck@d00âti,hsdiv-gate-clock‹?S‡ —æ@emu_per_alwon_ckâfixed-factor-clock‹@‚æ(clock@d70 ti,clksel‡ pâ+clock-clkout2-src-gate@7‡â ti,composite-no-wait-gate-clockïclkout2_src_gate_ck‹/æCclock-clkout2-src-mux@0‡âti,composite-mux-clockïclkout2_src_mux_ck‹/"3AæDclock-sys-clkout2@3‡âti,divider-clock ïsys_clkout2‹B`@Ûclkout2_src_ckâti,composite-clock‹CDæBmpu_ckâfixed-factor-clock‹E‚æFarm_fck@924âti,divider-clock‹F‡ $`emu_mpu_alwon_ckâfixed-factor-clock‹F‚æ)clock@a40 ti,clksel‡ @â+clock-l3-ick@0‡âti,divider-clockïl3_ick‹/`kæGclock-l4-ick@2‡âti,divider-clockïl4_ick‹G`kæIclock-gpt10-mux-fck@6‡âti,composite-mux-clockïgpt10_mux_fck‹H"æVclock-gpt11-mux-fck@7‡âti,composite-mux-clockïgpt11_mux_fck‹H"æXclock-ssi-ssr-div-fck-3430es2@8‡âti,composite-divider-clockïssi_ssr_div_fck_3430es2‹#$ñæclock@c40 ti,clksel‡ @â+clock-rm-ick@1‡âti,divider-clockïrm_ick‹I`kclock-gpt1-mux-fck@0‡âti,composite-mux-clock ïgpt1_mux_fck‹H"æaclock-usim-mux-fck@3‡âti,composite-mux-clock ïusim_mux_fck(‹"JKLMNOPQRkæƒclock@a00 ti,clksel‡ â+clock-gpt10-gate-fck@11‡ âti,composite-gate-clockïgpt10_gate_fck‹"æUclock-gpt11-gate-fck@12‡ âti,composite-gate-clockïgpt11_gate_fck‹"æWclock-mmchs2-fck@25‡âti,wait-gate-clock ïmmchs2_fck‹æ¹clock-mmchs1-fck@24‡âti,wait-gate-clock ïmmchs1_fck‹æºclock-i2c3-fck@17‡âti,wait-gate-clock ïi2c3_fck‹æ»clock-i2c2-fck@16‡âti,wait-gate-clock ïi2c2_fck‹æ¼clock-i2c1-fck@15‡âti,wait-gate-clock ïi2c1_fck‹æ½clock-mcbsp5-gate-fck@10‡ âti,composite-gate-clockïmcbsp5_gate_fck‹æ clock-mcbsp1-gate-fck@9‡ âti,composite-gate-clockïmcbsp1_gate_fck‹æ clock-mcspi4-fck@21‡âti,wait-gate-clock ïmcspi4_fck‹Sæ¾clock-mcspi3-fck@20‡âti,wait-gate-clock ïmcspi3_fck‹Sæ¿clock-mcspi2-fck@19‡âti,wait-gate-clock ïmcspi2_fck‹SæÀclock-mcspi1-fck@18‡âti,wait-gate-clock ïmcspi1_fck‹SæÁclock-uart2-fck@14‡âti,wait-gate-clock ïuart2_fck‹SæÂclock-uart1-fck@13‡ âti,wait-gate-clock ïuart1_fck‹SæÃclock-hdq-fck@22‡âti,wait-gate-clockïhdq_fck‹TæÄclock-modem-fck@31‡âti,omap3-interface-clock ïmodem_fck‹"æàclock-mspro-fck@23‡âti,wait-gate-clock ïmspro_fck‹clock-ssi-ssr-gate-fck-3430es2@0‡â ti,composite-no-wait-gate-clockïssi_ssr_gate_fck_3430es2‹#æ~clock-mmchs3-fck@30‡âti,wait-gate-clock ïmmchs3_fck‹æÜgpt10_fckâti,composite-clock‹UVgpt11_fckâti,composite-clock‹WXcore_96m_fckâfixed-factor-clock‹Y‚æcore_48m_fckâfixed-factor-clock‹9‚æScore_12m_fckâfixed-factor-clock‹Z‚æTcore_l3_ickâfixed-factor-clock‹G‚æ[clock@a10 ti,clksel‡ â+clock-sdrc-ick@1‡âti,wait-gate-clock ïsdrc_ick‹[æŽclock-mmchs2-ick@25‡âti,omap3-interface-clock ïmmchs2_ick‹\æÅclock-mmchs1-ick@24‡âti,omap3-interface-clock ïmmchs1_ick‹\æÆclock-hdq-ick@22‡âti,omap3-interface-clockïhdq_ick‹\æÇclock-mcspi4-ick@21‡âti,omap3-interface-clock ïmcspi4_ick‹\æÈclock-mcspi3-ick@20‡âti,omap3-interface-clock ïmcspi3_ick‹\æÉclock-mcspi2-ick@19‡âti,omap3-interface-clock ïmcspi2_ick‹\æÊclock-mcspi1-ick@18‡âti,omap3-interface-clock ïmcspi1_ick‹\æËclock-i2c3-ick@17‡âti,omap3-interface-clock ïi2c3_ick‹\æÌclock-i2c2-ick@16‡âti,omap3-interface-clock ïi2c2_ick‹\æÍclock-i2c1-ick@15‡âti,omap3-interface-clock ïi2c1_ick‹\æÎclock-uart2-ick@14‡âti,omap3-interface-clock ïuart2_ick‹\æÏclock-uart1-ick@13‡ âti,omap3-interface-clock ïuart1_ick‹\æÐclock-gpt11-ick@12‡ âti,omap3-interface-clock ïgpt11_ick‹\æÑclock-gpt10-ick@11‡ âti,omap3-interface-clock ïgpt10_ick‹\æÒclock-mcbsp5-ick@10‡ âti,omap3-interface-clock ïmcbsp5_ick‹\æÓclock-mcbsp1-ick@9‡ âti,omap3-interface-clock ïmcbsp1_ick‹\æÔclock-omapctrl-ick@6‡âti,omap3-interface-clock ïomapctrl_ick‹\æÕclock-aes2-ick@28‡âti,omap3-interface-clock ïaes2_ick‹\æclock-sha12-ick@27‡âti,omap3-interface-clock ïsha12_ick‹\æÖclock-icr-ick@29‡âti,omap3-interface-clockïicr_ick‹\clock-des2-ick@26‡âti,omap3-interface-clock ïdes2_ick‹\clock-mspro-ick@23‡âti,omap3-interface-clock ïmspro_ick‹\clock-mailboxes-ick@7‡âti,omap3-interface-clockïmailboxes_ick‹\clock-sad2d-ick@3‡âti,omap3-interface-clock ïsad2d_ick‹Gæáclock-hsotgusb-ick-3430es2@4‡â"ti,omap3-hsotgusb-interface-clockïhsotgusb_ick_3430es2‹[æclock-ssi-ick-3430es2@0‡âti,omap3-ssi-interface-clockïssi_ick_3430es2‹]æclock-mmchs3-ick@30‡âti,omap3-interface-clock ïmmchs3_ick‹\æÛgpmc_fckâfixed-factor-clock‹[‚core_l4_ickâfixed-factor-clock‹I‚æ\clock@e00 ti,clksel‡â+clock-dss-tv-fckâti,gate-clock ïdss_tv_fck‹ASæ´clock-dss-96m-fckâti,gate-clock ïdss_96m_fck‹YSæµclock-dss2-alwon-fckâti,gate-clockïdss2_alwon_fck‹"Sæ¶clock-dss1-alwon-fck-3430es2@0‡âti,dss-gate-clockïdss1_alwon_fck_3430es2‹^Èæ·dummy_ckâ fixed-clockCclock@c00 ti,clksel‡ â+clock-gpt1-gate-fck@0‡âti,composite-gate-clockïgpt1_gate_fck‹"æ`clock-gpio1-dbck@3‡âti,gate-clock ïgpio1_dbck‹_æ«clock-wdt2-fck@5‡âti,wait-gate-clock ïwdt2_fck‹_æ¬clock-sr1-fck@6‡âti,wait-gate-clockïsr1_fck‹"æ clock-sr2-fck@7‡âti,wait-gate-clockïsr2_fck‹"æ clock-usim-gate-fck@9‡ âti,composite-gate-clockïusim_gate_fck‹Yæ‚gpt1_fckâti,composite-clock‹`aæwkup_32k_fckâfixed-factor-clock‹H‚æ_clock@c10 ti,clksel‡ â+clock-wdt2-ick@5‡âti,omap3-interface-clock ïwdt2_ick‹bæ­clock-wdt1-ick@4‡âti,omap3-interface-clock ïwdt1_ick‹bæ®clock-gpio1-ick@3‡âti,omap3-interface-clock ïgpio1_ick‹bæ¯clock-omap-32ksync-ick@2‡âti,omap3-interface-clockïomap_32ksync_ick‹bæ°clock-gpt12-ick@1‡âti,omap3-interface-clock ïgpt12_ick‹bæ±clock-gpt1-ick@0‡âti,omap3-interface-clock ïgpt1_ick‹bæ²clock-usim-ick@9‡ âti,omap3-interface-clock ïusim_ick‹bæ³per_96m_fckâfixed-factor-clock‹2‚æ per_48m_fckâfixed-factor-clock‹9‚æcclock@1000 ti,clksel‡â+clock-uart3-fck@11‡ âti,wait-gate-clock ïuart3_fck‹cæclock-gpt2-gate-fck@3‡âti,composite-gate-clockïgpt2_gate_fck‹"æeclock-gpt3-gate-fck@4‡âti,composite-gate-clockïgpt3_gate_fck‹"ægclock-gpt4-gate-fck@5‡âti,composite-gate-clockïgpt4_gate_fck‹"æiclock-gpt5-gate-fck@6‡âti,composite-gate-clockïgpt5_gate_fck‹"ækclock-gpt6-gate-fck@7‡âti,composite-gate-clockïgpt6_gate_fck‹"æmclock-gpt7-gate-fck@8‡âti,composite-gate-clockïgpt7_gate_fck‹"æoclock-gpt8-gate-fck@9‡ âti,composite-gate-clockïgpt8_gate_fck‹"æqclock-gpt9-gate-fck@10‡ âti,composite-gate-clockïgpt9_gate_fck‹"æsclock-gpio6-dbck@17‡âti,gate-clock ïgpio6_dbck‹dæ‘clock-gpio5-dbck@16‡âti,gate-clock ïgpio5_dbck‹dæ’clock-gpio4-dbck@15‡âti,gate-clock ïgpio4_dbck‹dæ“clock-gpio3-dbck@14‡âti,gate-clock ïgpio3_dbck‹dæ”clock-gpio2-dbck@13‡ âti,gate-clock ïgpio2_dbck‹dæ•clock-wdt3-fck@12‡ âti,wait-gate-clock ïwdt3_fck‹dæ–clock-mcbsp2-gate-fck@0‡âti,composite-gate-clockïmcbsp2_gate_fck‹æclock-mcbsp3-gate-fck@1‡âti,composite-gate-clockïmcbsp3_gate_fck‹æclock-mcbsp4-gate-fck@2‡âti,composite-gate-clockïmcbsp4_gate_fck‹æclock-uart4-fck@18‡âti,wait-gate-clock ïuart4_fck‹cæªclock@1040 ti,clksel‡@â+clock-gpt2-mux-fck@0‡âti,composite-mux-clock ïgpt2_mux_fck‹H"æfclock-gpt3-mux-fck@1‡âti,composite-mux-clock ïgpt3_mux_fck‹H"æhclock-gpt4-mux-fck@2‡âti,composite-mux-clock ïgpt4_mux_fck‹H"æjclock-gpt5-mux-fck@3‡âti,composite-mux-clock ïgpt5_mux_fck‹H"ælclock-gpt6-mux-fck@4‡âti,composite-mux-clock ïgpt6_mux_fck‹H"ænclock-gpt7-mux-fck@5‡âti,composite-mux-clock ïgpt7_mux_fck‹H"æpclock-gpt8-mux-fck@6‡âti,composite-mux-clock ïgpt8_mux_fck‹H"ærclock-gpt9-mux-fck@7‡âti,composite-mux-clock ïgpt9_mux_fck‹H"ætgpt2_fckâti,composite-clock‹efægpt3_fckâti,composite-clock‹ghgpt4_fckâti,composite-clock‹ijgpt5_fckâti,composite-clock‹klgpt6_fckâti,composite-clock‹mngpt7_fckâti,composite-clock‹opgpt8_fckâti,composite-clock‹qrgpt9_fckâti,composite-clock‹stper_32k_alwon_fckâfixed-factor-clock‹H‚ædper_l4_ickâfixed-factor-clock‹I‚æuclock@1010 ti,clksel‡â+clock-gpio6-ick@17‡âti,omap3-interface-clock ïgpio6_ick‹uæ—clock-gpio5-ick@16‡âti,omap3-interface-clock ïgpio5_ick‹uæ˜clock-gpio4-ick@15‡âti,omap3-interface-clock ïgpio4_ick‹uæ™clock-gpio3-ick@14‡âti,omap3-interface-clock ïgpio3_ick‹uæšclock-gpio2-ick@13‡ âti,omap3-interface-clock ïgpio2_ick‹uæ›clock-wdt3-ick@12‡ âti,omap3-interface-clock ïwdt3_ick‹uæœclock-uart3-ick@11‡ âti,omap3-interface-clock ïuart3_ick‹uæclock-uart4-ick@18‡âti,omap3-interface-clock ïuart4_ick‹uæžclock-gpt9-ick@10‡ âti,omap3-interface-clock ïgpt9_ick‹uæŸclock-gpt8-ick@9‡ âti,omap3-interface-clock ïgpt8_ick‹uæ clock-gpt7-ick@8‡âti,omap3-interface-clock ïgpt7_ick‹uæ¡clock-gpt6-ick@7‡âti,omap3-interface-clock ïgpt6_ick‹uæ¢clock-gpt5-ick@6‡âti,omap3-interface-clock ïgpt5_ick‹uæ£clock-gpt4-ick@5‡âti,omap3-interface-clock ïgpt4_ick‹uæ¤clock-gpt3-ick@4‡âti,omap3-interface-clock ïgpt3_ick‹uæ¥clock-gpt2-ick@3‡âti,omap3-interface-clock ïgpt2_ick‹uæ¦clock-mcbsp2-ick@0‡âti,omap3-interface-clock ïmcbsp2_ick‹uæ§clock-mcbsp3-ick@1‡âti,omap3-interface-clock ïmcbsp3_ick‹uæ¨clock-mcbsp4-ick@2‡âti,omap3-interface-clock ïmcbsp4_ick‹uæ©emu_src_ckâti,clkdm-gate-clock‹væ*secure_32k_fckâ fixed-clockC€æwgpt12_fckâfixed-factor-clock‹w‚æwdt1_fckâfixed-factor-clock‹w‚security_l4_ick2âfixed-factor-clock‹I‚æxclock@a14 ti,clksel‡ â+clock-aes1-ick@3‡âti,omap3-interface-clock ïaes1_ick‹xæclock-rng-ick@2‡âti,omap3-interface-clockïrng_ick‹xæýclock-sha11-ick@1‡âti,omap3-interface-clock ïsha11_ick‹xclock-des1-ick@0‡âti,omap3-interface-clock ïdes1_ick‹xclock-pka-ick@4‡âti,omap3-interface-clockïpka_ick‹yclock@f00 ti,clksel‡â+clock-cam-mclk@0‡âti,gate-clock ïcam_mclk‹zÈclock-csi2-96m-fck@1‡âti,gate-clock ïcsi2_96m_fck‹æÞcam_ick@f10â!ti,omap3-no-wait-interface-clock‹I‡SæÝsecurity_l3_ickâfixed-factor-clock‹G‚æyssi_l4_ickâfixed-factor-clock‹I‚æ]sr_l4_ickâfixed-factor-clock‹I‚dpll2_fck@40âti,divider-clock‹/S`‡@kæ{dpll2_ck@4âti,omap3-dpll-clock‹"{‡$@4ýæ|dpll2_m2_ck@44âti,divider-clock‹|`‡Dkæ}iva2_ck@0âti,wait-gate-clock‹}‡Sæßclock@a18 ti,clksel‡ â++clock-mad2d-ick@3‡âti,omap3-interface-clock ïmad2d_ick‹Gæâclock-usbtll-ick@2‡âti,omap3-interface-clock ïusbtll_ick‹\æÚssi_ssr_fck_3430es2âti,composite-clock‹~æ€ssi_sst_fck_3430es2âfixed-factor-clock‹€‚æsys_d2_ckâfixed-factor-clock‹"‚æJomap_96m_d2_fckâfixed-factor-clock‹Y‚æKomap_96m_d4_fckâfixed-factor-clock‹Y‚æLomap_96m_d8_fckâfixed-factor-clock‹Y‚æMomap_96m_d10_fckâfixed-factor-clock‹Y‚ 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œðÚâports+bandgap@48002524‡H%$ti,omap36xx-bandgapææ target-module@480cb000ti,sysc-omap3630-srti,syscùsmartreflex_core‡H °8sysc  ‹ ’fck+ H °smartreflex@0ti,omap3-smartreflex-core‡îtarget-module@480c9000ti,sysc-omap3630-srti,syscùsmartreflex_mpu_iva‡H 8sysc  ‹ ’fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-iva‡îtarget-module@50000000ti,sysc-omap4ti,sysc‡PþPþ revsysc 8 ‹ ã’fckick+ Pgpu@0#ti,omap3630-gpuimg,powervr-sgx530‡îopp-tableoperating-points-v2-ti-cpuœæopp-50-300000000üá£ssssssÿÿÿÿ"opp-100-600000000ü#ÃFO€O€O€O€O€O€ÿÿÿÿopp-130-800000000ü/¯7È7È7È7È7È7Èÿÿÿÿopp-1000000000ü;šÊûûûûûûÿÿÿÿopp-supplyti,omap-opp-supply.ûthermal-zonescpu-thermalIú_èmN z tripscpu_alertŠ8€–Ђpassiveæcpu_critŠ_–Ð ‚criticalcooling-mapsmap0¡ ¦ÿÿÿÿÿÿÿÿmemory@80000000{memory‡€  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initinterrupts-extendedpinctrl-0ti,use_poweroffbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsenable-gpios#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplycd-gpiosbus-widthti,non-removablestatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-device