Ð þír8(( Jð3logicpd,dm3730-torpedo-devkitti,omap3430ti,omap3 +.7LogicPD Zoom OMAP35xx Torpedo Development Kitchosen=/ocp@68000000/serial@4806a000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000 /displaycpus+cpu@0arm,cortex-a8ˆcpu”˜Ÿcpu«“à¹ÍÜèpmu@54000000arm,cortex-a8-pmu”T€ðûdebugsssocti,omap-inframpu ti,omap3-mpuûmpuiva ti,iva2.2ûivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus”hð +ûl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus” +  pinmux@30 ti,omap3-padconfpinctrl-single”08+ ,A_ÿèåmcbsp2-pins | èuart2-pins(|DFHJhèæmcspi1-pins |˜šœžè÷hsusb-otg-pins`|rtvxz|~€‚„†ˆè i2c1-pins|ŠŒèçi2c2-pins|Žèïi2c3-pins|’”èótwl4030-pins|°Aèégpio-key-pins|¦¬è hdq-pins|–èøpwm-pins|ˆè$led-pins|¨ªèmmc1-pins0|èútsc2004-pins|Vèõbacklight-pins|Xè)isp-pins`|ÜÞàâæèêìîðòôèpanel-pwr-pins|Zè&dss-dpi1-pins°|¤¦¨ª¸º¼¾ÀÂÄÆÈÊÌÎÐ Ò Ô Ö Ø Ú èisp1763-pins|$è scm_conf@270sysconsimple-bus”p0+ p0èpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap”°pbias_mmc_omap2430—pbias_mmc_omap2430¦w@¾-ÆÀèùclocks+clock@68 ti,clksel”hÖ+clock-mcbsp5-mux-fck@4”Öti,composite-mux-clockãmcbsp5_mux_fck˜è clock-mcbsp3-mux-fck@0”Öti,composite-mux-clockãmcbsp3_mux_fck˜èclock-mcbsp4-mux-fck@2”Öti,composite-mux-clockãmcbsp4_mux_fck˜èmcbsp5_fckÖti,composite-clock˜ èclock@4 ti,clksel”Ö+clock-mcbsp1-mux-fck@2”Öti,composite-mux-clockãmcbsp1_mux_fck˜è clock-mcbsp2-mux-fck@6”Öti,composite-mux-clockãmcbsp2_mux_fck˜èmcbsp1_fckÖti,composite-clock˜ èþmcbsp2_fckÖti,composite-clock˜ èmcbsp3_fckÖti,composite-clock˜èmcbsp4_fckÖti,composite-clock˜èclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single” \+ ,A_ÿtwl4030-vpins-pins |èêgpio-key-wkup-pins| è!lan9221-pins|Zè mmc1-cd-pins|Tèûtarget-module@480a6000ti,sysc-omap2ti,sysc”H `DH `HH `Lörevsyscsyss  ˜Ÿick+ H ` aes1@0 ti,omap3-aes”Pð(  -txrxtarget-module@480c5000ti,sysc-omap2ti,sysc”H PDH PHH PLörevsyscsyss  ˜Ÿick+ H P aes2@0 ti,omap3-aes”Pð(AB-txrxprm@48306000 ti,omap3-prm”H0`@ð clocks+virt_16_8m_ckÖ fixed-clock7Yèosc_sys_ck@d40Ö ti,mux-clock˜” @èsys_ck@1270Öti,divider-clock˜GT”p_è!sys_clkout1@d70Öti,gate-clock˜” pGdpll3_x2_ckÖfixed-factor-clock˜vdpll3_m2x2_ckÖfixed-factor-clock˜vè dpll4_x2_ckÖfixed-factor-clock˜vcorex2_fckÖfixed-factor-clock˜ vè"wkup_l4_ickÖfixed-factor-clock˜!vèacorex2_d3_fckÖfixed-factor-clock˜"vè‰corex2_d5_fckÖfixed-factor-clock˜"vèŠclockdomainscm@48004000 ti,omap3-cm”H@@clocks+dummy_apb_pclkÖ fixed-clock7omap_32k_fckÖ fixed-clock7€èGvirt_12m_ckÖ fixed-clock7·èvirt_13m_ckÖ fixed-clock7Æ]@èvirt_19200000_ckÖ fixed-clock7$øèvirt_26000000_ckÖ fixed-clock7Œº€èvirt_38_4m_ckÖ fixed-clock7Iðèdpll4_ck@d00Öti,omap3-dpll-per-clock˜!!” D 0èdpll4_m2_ck@d48Öti,divider-clock˜T?” H_è#dpll4_m2x2_mul_ckÖfixed-factor-clock˜#vè$dpll4_m2x2_ck@d00Öti,gate-clock˜$G” ‹è%omap_96m_alwon_fckÖfixed-factor-clock˜%vè1dpll3_ck@d00Öti,omap3-dpll-core-clock˜!!” @ 0èclock@1140 ti,clksel”@Ö+clock-dpll3-m3@16”Öti,divider-clock ãdpll3_m3_ck˜T_è+clock-dpll4-m6@24”Öti,divider-clock ãdpll4_m6_ck˜T?_è=clock-emu-src-mux@0”Ö ti,mux-clockãemu_src_mux_ck˜!&'(èuclock-pclk-fck@8”Öti,divider-clock ãpclk_fck˜)T_clock-pclkx2-fck@6”Öti,divider-clock ãpclkx2_fck˜)T_clock-atclk-fck@4”Öti,divider-clock ãatclk_fck˜)T_clock-traceclk-src-fck@2”Ö ti,mux-clockãtraceclk_src_fck˜!&'(è*clock-traceclk-fck@11” Öti,divider-clock ãtraceclk_fck˜*T_dpll3_m3x2_mul_ckÖfixed-factor-clock˜+vè,dpll3_m3x2_ck@d00Öti,gate-clock˜,G ” ‹è-emu_core_alwon_ckÖfixed-factor-clock˜-vè&sys_altclkÖ fixed-clock7è4mcbsp_clksÖ fixed-clock7ècore_ckÖfixed-factor-clock˜vè.dpll1_fck@940Öti,divider-clock˜.GT” @_è/dpll1_ck@904Öti,omap3-dpll-clock˜!/”  $ @ 4èdpll1_x2_ckÖfixed-factor-clock˜vè0dpll1_x2m2_ck@944Öti,divider-clock˜0T” D_èDcm_96m_fckÖfixed-factor-clock˜1vè2clock@d40 ti,clksel” @Ö+clock-dpll3-m2@27”Öti,divider-clock ãdpll3_m2_ck˜T_èclock-omap-96m-fck@6”Ö ti,mux-clock ãomap_96m_fck˜2!èXclock-omap-54m-fck@5”Ö ti,mux-clock ãomap_54m_fck˜34è@clock-omap-48m-fck@3”Ö ti,mux-clock ãomap_48m_fck˜54è8clock@e40 ti,clksel”@Ö+clock-dpll4-m3@8”Öti,divider-clock ãdpll4_m3_ck˜T _è6clock-dpll4-m4@0”Öti,divider-clock ãdpll4_m4_ck˜T_è9dpll4_m3x2_mul_ckÖfixed-factor-clock˜6vè7dpll4_m3x2_ck@d00Öti,gate-clock˜7G” ‹è3cm_96m_d2_fckÖfixed-factor-clock˜2vè5omap_12m_fckÖfixed-factor-clock˜8vèYdpll4_m4x2_mul_ckÖti,fixed-factor-clock˜9¡¯¼è:dpll4_m4x2_ck@d00Öti,gate-clock˜:G” ‹¼è]dpll4_m5_ck@f40Öti,divider-clock˜T?”@_è;dpll4_m5x2_mul_ckÖti,fixed-factor-clock˜;¡¯¼è<�dpll4_m5x2_ck@d00Öti,gate-clock˜<�G” ‹¼èydpll4_m6x2_mul_ckÖfixed-factor-clock˜=vè>dpll4_m6x2_ck@d00Öti,gate-clock˜>G” ‹è?emu_per_alwon_ckÖfixed-factor-clock˜?vè'clock@d70 ti,clksel” pÖ+clock-clkout2-src-gate@7”Ö ti,composite-no-wait-gate-clockãclkout2_src_gate_ck˜.èBclock-clkout2-src-mux@0”Öti,composite-mux-clockãclkout2_src_mux_ck˜.!2@èCclock-sys-clkout2@3”Öti,divider-clock ãsys_clkout2˜AT@Ïclkout2_src_ckÖti,composite-clock˜BCèAmpu_ckÖfixed-factor-clock˜DvèEarm_fck@924Öti,divider-clock˜E” $Temu_mpu_alwon_ckÖfixed-factor-clock˜Evè(clock@a40 ti,clksel” @Ö+clock-l3-ick@0”Öti,divider-clockãl3_ick˜.T_èFclock-l4-ick@2”Öti,divider-clockãl4_ick˜FT_èHclock-gpt10-mux-fck@6”Öti,composite-mux-clockãgpt10_mux_fck˜G!èUclock-gpt11-mux-fck@7”Öti,composite-mux-clockãgpt11_mux_fck˜G!èWclock-ssi-ssr-div-fck-3430es2@8”Öti,composite-divider-clockãssi_ssr_div_fck_3430es2˜"$åè~clock@c40 ti,clksel” @Ö+clock-rm-ick@1”Öti,divider-clockãrm_ick˜HT_clock-gpt1-mux-fck@0”Öti,composite-mux-clock ãgpt1_mux_fck˜G!è`clock-usim-mux-fck@3”Öti,composite-mux-clock ãusim_mux_fck(˜!IJKLMNOPQ_è‚clock@a00 ti,clksel” Ö+clock-gpt10-gate-fck@11” Öti,composite-gate-clockãgpt10_gate_fck˜!èTclock-gpt11-gate-fck@12” Öti,composite-gate-clockãgpt11_gate_fck˜!èVclock-mmchs2-fck@25”Öti,wait-gate-clock ãmmchs2_fck˜è·clock-mmchs1-fck@24”Öti,wait-gate-clock ãmmchs1_fck˜è¸clock-i2c3-fck@17”Öti,wait-gate-clock ãi2c3_fck˜è¹clock-i2c2-fck@16”Öti,wait-gate-clock ãi2c2_fck˜èºclock-i2c1-fck@15”Öti,wait-gate-clock ãi2c1_fck˜è»clock-mcbsp5-gate-fck@10” Öti,composite-gate-clockãmcbsp5_gate_fck˜è clock-mcbsp1-gate-fck@9” Öti,composite-gate-clockãmcbsp1_gate_fck˜è clock-mcspi4-fck@21”Öti,wait-gate-clock ãmcspi4_fck˜Rè¼clock-mcspi3-fck@20”Öti,wait-gate-clock ãmcspi3_fck˜Rè½clock-mcspi2-fck@19”Öti,wait-gate-clock ãmcspi2_fck˜Rè¾clock-mcspi1-fck@18”Öti,wait-gate-clock ãmcspi1_fck˜Rè¿clock-uart2-fck@14”Öti,wait-gate-clock ãuart2_fck˜RèÀclock-uart1-fck@13” Öti,wait-gate-clock ãuart1_fck˜RèÁclock-hdq-fck@22”Öti,wait-gate-clockãhdq_fck˜SèÂclock-modem-fck@31”Öti,omap3-interface-clock ãmodem_fck˜!èÞclock-mspro-fck@23”Öti,wait-gate-clock ãmspro_fck˜clock-ssi-ssr-gate-fck-3430es2@0”Ö ti,composite-no-wait-gate-clockãssi_ssr_gate_fck_3430es2˜"è}clock-mmchs3-fck@30”Öti,wait-gate-clock ãmmchs3_fck˜èÚgpt10_fckÖti,composite-clock˜TUgpt11_fckÖti,composite-clock˜VWcore_96m_fckÖfixed-factor-clock˜Xvècore_48m_fckÖfixed-factor-clock˜8vèRcore_12m_fckÖfixed-factor-clock˜YvèScore_l3_ickÖfixed-factor-clock˜FvèZclock@a10 ti,clksel” Ö+clock-sdrc-ick@1”Öti,wait-gate-clock ãsdrc_ick˜Zèclock-mmchs2-ick@25”Öti,omap3-interface-clock ãmmchs2_ick˜[èÃclock-mmchs1-ick@24”Öti,omap3-interface-clock ãmmchs1_ick˜[èÄclock-hdq-ick@22”Öti,omap3-interface-clockãhdq_ick˜[èÅclock-mcspi4-ick@21”Öti,omap3-interface-clock ãmcspi4_ick˜[èÆclock-mcspi3-ick@20”Öti,omap3-interface-clock ãmcspi3_ick˜[èÇclock-mcspi2-ick@19”Öti,omap3-interface-clock ãmcspi2_ick˜[èÈclock-mcspi1-ick@18”Öti,omap3-interface-clock ãmcspi1_ick˜[èÉclock-i2c3-ick@17”Öti,omap3-interface-clock ãi2c3_ick˜[èÊclock-i2c2-ick@16”Öti,omap3-interface-clock ãi2c2_ick˜[èËclock-i2c1-ick@15”Öti,omap3-interface-clock ãi2c1_ick˜[èÌclock-uart2-ick@14”Öti,omap3-interface-clock ãuart2_ick˜[èÍclock-uart1-ick@13” Öti,omap3-interface-clock ãuart1_ick˜[èÎclock-gpt11-ick@12” Öti,omap3-interface-clock ãgpt11_ick˜[èÏclock-gpt10-ick@11” Öti,omap3-interface-clock ãgpt10_ick˜[èÐclock-mcbsp5-ick@10” Öti,omap3-interface-clock ãmcbsp5_ick˜[èÑclock-mcbsp1-ick@9” Öti,omap3-interface-clock ãmcbsp1_ick˜[èÒclock-omapctrl-ick@6”Öti,omap3-interface-clock ãomapctrl_ick˜[èÓclock-aes2-ick@28”Öti,omap3-interface-clock ãaes2_ick˜[èclock-sha12-ick@27”Öti,omap3-interface-clock ãsha12_ick˜[èÔclock-icr-ick@29”Öti,omap3-interface-clockãicr_ick˜[clock-des2-ick@26”Öti,omap3-interface-clock ãdes2_ick˜[clock-mspro-ick@23”Öti,omap3-interface-clock ãmspro_ick˜[clock-mailboxes-ick@7”Öti,omap3-interface-clockãmailboxes_ick˜[clock-sad2d-ick@3”Öti,omap3-interface-clock ãsad2d_ick˜Fèßclock-hsotgusb-ick-3430es2@4”Ö"ti,omap3-hsotgusb-interface-clockãhsotgusb_ick_3430es2˜ZèŽclock-ssi-ick-3430es2@0”Öti,omap3-ssi-interface-clockãssi_ick_3430es2˜\èclock-mmchs3-ick@30”Öti,omap3-interface-clock ãmmchs3_ick˜[èÙgpmc_fckÖfixed-factor-clock˜Zvcore_l4_ickÖfixed-factor-clock˜Hvè[clock@e00 ti,clksel”Ö+clock-dss-tv-fckÖti,gate-clock ãdss_tv_fck˜@Gè²clock-dss-96m-fckÖti,gate-clock ãdss_96m_fck˜XGè³clock-dss2-alwon-fckÖti,gate-clockãdss2_alwon_fck˜!Gè´clock-dss1-alwon-fck-3430es2@0”Öti,dss-gate-clockãdss1_alwon_fck_3430es2˜]¼èµdummy_ckÖ fixed-clock7clock@c00 ti,clksel” Ö+clock-gpt1-gate-fck@0”Öti,composite-gate-clockãgpt1_gate_fck˜!è_clock-gpio1-dbck@3”Öti,gate-clock ãgpio1_dbck˜^è©clock-wdt2-fck@5”Öti,wait-gate-clock ãwdt2_fck˜^èªclock-sr1-fck@6”Öti,wait-gate-clockãsr1_fck˜!èclock-sr2-fck@7”Öti,wait-gate-clockãsr2_fck˜!èclock-usim-gate-fck@9” Öti,composite-gate-clockãusim_gate_fck˜Xègpt1_fckÖti,composite-clock˜_`èwkup_32k_fckÖfixed-factor-clock˜Gvè^clock@c10 ti,clksel” Ö+clock-wdt2-ick@5”Öti,omap3-interface-clock ãwdt2_ick˜aè«clock-wdt1-ick@4”Öti,omap3-interface-clock ãwdt1_ick˜aè¬clock-gpio1-ick@3”Öti,omap3-interface-clock ãgpio1_ick˜aè­clock-omap-32ksync-ick@2”Öti,omap3-interface-clockãomap_32ksync_ick˜aè®clock-gpt12-ick@1”Öti,omap3-interface-clock ãgpt12_ick˜aè¯clock-gpt1-ick@0”Öti,omap3-interface-clock ãgpt1_ick˜aè°clock-usim-ick@9” Öti,omap3-interface-clock ãusim_ick˜aè±per_96m_fckÖfixed-factor-clock˜1vèper_48m_fckÖfixed-factor-clock˜8vèbclock@1000 ti,clksel”Ö+clock-uart3-fck@11” Öti,wait-gate-clock ãuart3_fck˜bèclock-gpt2-gate-fck@3”Öti,composite-gate-clockãgpt2_gate_fck˜!èdclock-gpt3-gate-fck@4”Öti,composite-gate-clockãgpt3_gate_fck˜!èfclock-gpt4-gate-fck@5”Öti,composite-gate-clockãgpt4_gate_fck˜!èhclock-gpt5-gate-fck@6”Öti,composite-gate-clockãgpt5_gate_fck˜!èjclock-gpt6-gate-fck@7”Öti,composite-gate-clockãgpt6_gate_fck˜!èlclock-gpt7-gate-fck@8”Öti,composite-gate-clockãgpt7_gate_fck˜!ènclock-gpt8-gate-fck@9” Öti,composite-gate-clockãgpt8_gate_fck˜!èpclock-gpt9-gate-fck@10” Öti,composite-gate-clockãgpt9_gate_fck˜!èrclock-gpio6-dbck@17”Öti,gate-clock ãgpio6_dbck˜cèclock-gpio5-dbck@16”Öti,gate-clock ãgpio5_dbck˜cè‘clock-gpio4-dbck@15”Öti,gate-clock ãgpio4_dbck˜cè’clock-gpio3-dbck@14”Öti,gate-clock ãgpio3_dbck˜cè“clock-gpio2-dbck@13” Öti,gate-clock ãgpio2_dbck˜cè”clock-wdt3-fck@12” Öti,wait-gate-clock ãwdt3_fck˜cè•clock-mcbsp2-gate-fck@0”Öti,composite-gate-clockãmcbsp2_gate_fck˜è clock-mcbsp3-gate-fck@1”Öti,composite-gate-clockãmcbsp3_gate_fck˜èclock-mcbsp4-gate-fck@2”Öti,composite-gate-clockãmcbsp4_gate_fck˜èclock@1040 ti,clksel”@Ö+clock-gpt2-mux-fck@0”Öti,composite-mux-clock ãgpt2_mux_fck˜G!èeclock-gpt3-mux-fck@1”Öti,composite-mux-clock ãgpt3_mux_fck˜G!ègclock-gpt4-mux-fck@2”Öti,composite-mux-clock ãgpt4_mux_fck˜G!èiclock-gpt5-mux-fck@3”Öti,composite-mux-clock ãgpt5_mux_fck˜G!èkclock-gpt6-mux-fck@4”Öti,composite-mux-clock ãgpt6_mux_fck˜G!èmclock-gpt7-mux-fck@5”Öti,composite-mux-clock ãgpt7_mux_fck˜G!èoclock-gpt8-mux-fck@6”Öti,composite-mux-clock ãgpt8_mux_fck˜G!èqclock-gpt9-mux-fck@7”Öti,composite-mux-clock ãgpt9_mux_fck˜G!èsgpt2_fckÖti,composite-clock˜deègpt3_fckÖti,composite-clock˜fggpt4_fckÖti,composite-clock˜higpt5_fckÖti,composite-clock˜jkgpt6_fckÖti,composite-clock˜lmgpt7_fckÖti,composite-clock˜nogpt8_fckÖti,composite-clock˜pqgpt9_fckÖti,composite-clock˜rsper_32k_alwon_fckÖfixed-factor-clock˜Gvècper_l4_ickÖfixed-factor-clock˜Hvètclock@1010 ti,clksel”Ö+clock-gpio6-ick@17”Öti,omap3-interface-clock ãgpio6_ick˜tè–clock-gpio5-ick@16”Öti,omap3-interface-clock ãgpio5_ick˜tè—clock-gpio4-ick@15”Öti,omap3-interface-clock ãgpio4_ick˜tè˜clock-gpio3-ick@14”Öti,omap3-interface-clock ãgpio3_ick˜tè™clock-gpio2-ick@13” Öti,omap3-interface-clock ãgpio2_ick˜tèšclock-wdt3-ick@12” Öti,omap3-interface-clock ãwdt3_ick˜tè›clock-uart3-ick@11” Öti,omap3-interface-clock ãuart3_ick˜tèœclock-uart4-ick@18”Öti,omap3-interface-clock ãuart4_ick˜tèclock-gpt9-ick@10” Öti,omap3-interface-clock ãgpt9_ick˜tèžclock-gpt8-ick@9” Öti,omap3-interface-clock ãgpt8_ick˜tèŸclock-gpt7-ick@8”Öti,omap3-interface-clock ãgpt7_ick˜tè clock-gpt6-ick@7”Öti,omap3-interface-clock ãgpt6_ick˜tè¡clock-gpt5-ick@6”Öti,omap3-interface-clock ãgpt5_ick˜tè¢clock-gpt4-ick@5”Öti,omap3-interface-clock ãgpt4_ick˜tè£clock-gpt3-ick@4”Öti,omap3-interface-clock ãgpt3_ick˜tè¤clock-gpt2-ick@3”Öti,omap3-interface-clock ãgpt2_ick˜tè¥clock-mcbsp2-ick@0”Öti,omap3-interface-clock ãmcbsp2_ick˜tè¦clock-mcbsp3-ick@1”Öti,omap3-interface-clock ãmcbsp3_ick˜tè§clock-mcbsp4-ick@2”Öti,omap3-interface-clock ãmcbsp4_ick˜tè¨emu_src_ckÖti,clkdm-gate-clock˜uè)secure_32k_fckÖ fixed-clock7€èvgpt12_fckÖfixed-factor-clock˜vvèwdt1_fckÖfixed-factor-clock˜vvsecurity_l4_ick2Öfixed-factor-clock˜Hvèwclock@a14 ti,clksel” Ö+clock-aes1-ick@3”Öti,omap3-interface-clock ãaes1_ick˜wèclock-rng-ick@2”Öti,omap3-interface-clockãrng_ick˜wèÿclock-sha11-ick@1”Öti,omap3-interface-clock ãsha11_ick˜wclock-des1-ick@0”Öti,omap3-interface-clock ãdes1_ick˜wclock-pka-ick@4”Öti,omap3-interface-clockãpka_ick˜xclock@f00 ti,clksel”Ö+clock-cam-mclk@0”Öti,gate-clock ãcam_mclk˜y¼clock-csi2-96m-fck@1”Öti,gate-clock ãcsi2_96m_fck˜èÜcam_ick@f10Ö!ti,omap3-no-wait-interface-clock˜H”GèÛsecurity_l3_ickÖfixed-factor-clock˜Fvèxssi_l4_ickÖfixed-factor-clock˜Hvè\sr_l4_ickÖfixed-factor-clock˜Hvdpll2_fck@40Öti,divider-clock˜.GT”@_èzdpll2_ck@4Öti,omap3-dpll-clock˜!z”$@4ñ è{dpll2_m2_ck@44Öti,divider-clock˜{T”D_è|iva2_ck@0Öti,wait-gate-clock˜|”GèÝclock@a18 ti,clksel” Ö+clock-mad2d-ick@3”Öti,omap3-interface-clock ãmad2d_ick˜Fèàclock-usbtll-ick@2”Öti,omap3-interface-clock ãusbtll_ick˜[èØssi_ssr_fck_3430es2Öti,composite-clock˜}~èssi_sst_fck_3430es2Öfixed-factor-clock˜vèsys_d2_ckÖfixed-factor-clock˜!vèIomap_96m_d2_fckÖfixed-factor-clock˜XvèJomap_96m_d4_fckÖfixed-factor-clock˜XvèKomap_96m_d8_fckÖfixed-factor-clock˜XvèLomap_96m_d10_fckÖfixed-factor-clock˜Xv èMdpll5_m2_d4_ckÖfixed-factor-clock˜€vèNdpll5_m2_d8_ckÖfixed-factor-clock˜€vèOdpll5_m2_d16_ckÖfixed-factor-clock˜€vèPdpll5_m2_d20_ckÖfixed-factor-clock˜€vèQusim_fckÖti,composite-clock˜‚dpll5_ck@d04Öti,omap3-dpll-clock˜!!”  $ L 4ñèƒdpll5_m2_ck@d50Öti,divider-clock˜ƒT” P_è€sgx_gate_fck@b00Öti,composite-gate-clock˜.G” è‹core_d3_ckÖfixed-factor-clock˜.vè„core_d4_ckÖfixed-factor-clock˜.vè…core_d6_ckÖfixed-factor-clock˜.vè†omap_192m_alwon_fckÖfixed-factor-clock˜%vè‡core_d2_ckÖfixed-factor-clock˜.vèˆsgx_mux_fck@b40Öti,composite-mux-clock ˜„…†2‡ˆ‰Š” @èŒsgx_fckÖti,composite-clock˜‹Œèsgx_ick@b10Öti,wait-gate-clock˜F” Gèácpefuse_fck@a08Öti,gate-clock˜!” GèÕts_fck@a08Öti,gate-clock˜G” GèÖusbtll_fck@a08Öti,wait-gate-clock˜€” Gè×dss_ick_3430es2@e10Öti,omap3-dss-interface-clock˜H”Gè¶usbhost_120m_fck@1400Öti,gate-clock˜€”Gèâusbhost_48m_fck@1400Öti,dss-gate-clock˜8”Gèãusbhost_ick@1410Öti,omap3-dss-interface-clock˜H”Gèäclockdomainscore_l3_clkdmti,clockdomain˜Ždpll3_clkdmti,clockdomain˜dpll1_clkdmti,clockdomain˜per_clkdmti,clockdomainh˜‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨emu_clkdmti,clockdomain˜)dpll4_clkdmti,clockdomain˜wkup_clkdmti,clockdomain$˜©ª«¬­®¯°±dss_clkdmti,clockdomain˜²³´µ¶core_l4_clkdmti,clockdomain”˜·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚcam_clkdmti,clockdomain˜ÛÜiva2_clkdmti,clockdomain˜Ýdpll2_clkdmti,clockdomain˜{d2d_clkdmti,clockdomain ˜Þßàdpll5_clkdmti,clockdomain˜ƒsgx_clkdmti,clockdomain˜áusbhost_clkdmti,clockdomain ˜âãätarget-module@48320000ti,sysc-omap2ti,sysc”H2H2 örevsysc ˜^®Ÿfckick+ H2counter@0ti,omap-counter32k” interrupt-controller@48200000ti,omap3-intc,”H ètarget-module@48056000ti,sysc-omap2ti,sysc”H`H`,H`(örevsyscsyss# ,  ˜ZŸick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma”ð :E R`ègpio@48310000ti,omap3-gpio”H1ðûgpio1_q,è"gpio@49050000ti,omap3-gpio”Iðûgpio2q,gpio@49052000ti,omap3-gpio”I ðûgpio3q,gpio@49054000ti,omap3-gpio”I@ð ûgpio4q,èügpio@49056000ti,omap3-gpio”I`ð!ûgpio5q,èögpio@49058000ti,omap3-gpio”I€ð"ûgpio6q,èserial@4806a000ti,omap3-uart”H  HåR(12-txrxûuart17Ülserial@4806c000ti,omap3-uart”HÀIåJ(34-txrxûuart27Ül¡default¯æserial@49020000ti,omap3-uart”IJ(56-txrxûuart37Üli2c@48070000 ti,omap3-i2c”H€ð8+ûi2c1¡default¯ç7'¬@twl@48”Hð ˜èŸfck ti,twl4030,¡default¯éêaudioti,twl4030-audiocodecrtcti,twl4030-rtcð bciti,twl4030-bcið ¹ëÇì Óvacä0Ôð–watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1¦-ÆÀ¾-ÆÀèôregulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4¦w@¾w@èñregulator-vdd1ti,twl4030-vdd1¦ 'À¾ èregulator-vdacti,twl4030-vdac¦w@¾w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1¦:¾0°èýregulator-vmmc2ti,twl4030-vmmc2¦:¾0°regulator-vusb1v5ti,twl4030-vusb1v5èíregulator-vusb1v8ti,twl4030-vusb1v8èîregulator-vusb3v1ti,twl4030-vusb3v1èëregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2¦w@¾w@ûèregulator-vsimti,twl4030-vsim¦w@¾-ÆÀgpioti,twl4030-gpioq,ètwl4030-usbti,twl4030-usbð í)î7ëENèpwmti,twl4030-pwmYpwmledti,twl4030-pwmledYpwrbuttonti,twl4030-pwrbuttonðkeypadti,twl4030-keypadðdt ‡disabledmadcti,twl4030-madcðŽèìpower4ti,twl4030-power-idle-osc-offti,twl4030-power-idle i2c@48072000 ti,omap3-i2c”H €ð9+ûi2c2¡default¯ï7€mt9p031@48aptina,mt9p031”H˜ð°ñ»ñÆñportendpointÔn6êJ¢òèi2c@48060000 ti,omap3-i2c”H€ð=+ûi2c3¡default¯ó7€at24@50 atmel,24c64”Ptsc2004@48 ti,tsc2004”Hô¡default¯õ ö$7JdwŠ£³@mailbox@48094000ti,omap3-mailboxûmailbox”H @ðÎÚìmbox-dsp þ  spi@48098000ti,omap2-mcspi”H €ðA+ûmcspi1@(#$%&'()* -tx0rx0tx1rx1tx2rx2tx3rx3¡default¯÷at25@0 atmel,at25”"LK@4=F@J€Ospi@4809a000ti,omap2-mcspi”H  ðB+ûmcspi2 (+,-.-tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi”H €ð[+ûmcspi3 (-tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi”H  ð0+ûmcspi4(FG-tx0rx01w@480b2000 ti,omap3-1w”H ð:ûhdq1w¡default¯ømmc@4809c000ti,omap3-hsmmc”H ÀðSûmmc1](=>-txrxjùSå¡default¯úû wü€ýŒ–mmc@480b4000ti,omap3-hsmmc”H @ðVûmmc2(/0-txrxmmc@480ad000ti,omap3-hsmmc”H Ðð^ûmmc3(MN-txrxmmu@480bd400©ti,omap2-iommu”H Ô€ðûmmu_isp¶èmmu@5d000000©ti,omap2-iommu”]€ðûmmu_iva ‡disabledwdt@48314000 ti,omap3-wdt”H1@€ ûwd_timer2mcbsp@48074000ti,omap3-mcbsp”H@ÿömpu ð;<� ÆcommontxrxÖ€ûmcbsp1( -txrx˜þŸfck ‡disabledtarget-module@480a0000ti,sysc-omap2ti,sysc”H <�H @H Dörevsyscsyss ˜ÿŸick+ H rng@0 ti,omap2-rng” ð4mcbsp@49022000ti,omap3-mcbsp”I ÿI€ÿ ömpusidetoneð>?ÆcommontxrxsidetoneÖûmcbsp2mcbsp2_sidetone(!"-txrx˜¦Ÿfckick‡okay¡default¯è#mcbsp@49024000ti,omap3-mcbsp”I@ÿI ÿ ömpusidetoneðYZÆcommontxrxsidetoneÖ€ûmcbsp3mcbsp3_sidetone(-txrx˜§Ÿfckick ‡disabledmcbsp@49026000ti,omap3-mcbsp”I`ÿömpu ð67 ÆcommontxrxÖ€ûmcbsp4(-txrx˜Ÿfckå ‡disabledmcbsp@48096000ti,omap3-mcbsp”H `ÿömpu ðQR ÆcommontxrxÖ€ûmcbsp5(-txrx˜Ÿfck ‡disabledsham@480c3000ti,omap3-shamûsham”H 0dð1(E-rxtarget-module@48318000ti,sysc-omap2-timerti,sysc”H1€H1€H1€örevsyscsyss'  ˜°Ÿfckick+ H1€ö timer@0ti,omap3430-timer”€˜Ÿfckð%$4Gtarget-module@49032000ti,sysc-omap2-timerti,sysc”I I I örevsyscsyss'  ˜¥Ÿfckick+ I timer@0ti,omap3430-timer”ð&timer@49034000ti,omap3430-timer”I@ð'ûtimer3timer@49036000ti,omap3430-timer”I`ð(ûtimer4timer@49038000ti,omap3430-timer”I€ð)ûtimer5Ktimer@4903a000ti,omap3430-timer”I ð*ûtimer6Ktimer@4903c000ti,omap3430-timer”IÀð+ûtimer7Ktimer@4903e000ti,omap3430-timer”Iàð,ûtimer8XKtimer@49040000ti,omap3430-timer”Ið-ûtimer9Xtimer@48086000ti,omap3430-timer”H`ð.ûtimer10Xè%timer@48088000ti,omap3430-timer”H€ð/ûtimer11Xtarget-module@48304000ti,sysc-omap2-timerti,sysc”H0@H0@H0@örevsyscsyss'  ˜¯Ÿfckick+ H0@timer@0ti,omap3430-timer”ð_eusbhstll@48062000 ti,usbhs-tll”H ðN ûusb_tll_hsusbhshost@48064000ti,usbhs-host”H@ ûusb_host_hs+ ‡disabledohci@48064400ti,ohci-omap3”HDðLuehci@48064800 ti,ehci-omap”HHðMgpmc@6e000000ti,omap3430-gpmcûgpmc”nÐð(-rxtx™+,q00,(ènand@0,0ti,omap2-nand ” ð«micron,mt29f4g16abbda3wºÉbch8 Ùâó,,%4"G,Z(i6x@‡R˜R©(»Ó+ethernet@gpmc¡default¯  öð ”ÿsmsc,lan9221smsc,lan9115åðó*$%4 G  i* Z$‡<�˜6x$  8 O»©* i ƒ   ­  » Èusb@6,0¡default¯ nxp,usb-isp1763 ”ÿ öðÆhostŒ ÞhostðÓ æ ô i ƒó--%4G i- Z‡<�˜-x#  8 O<�  »©target-module@480ab000ti,sysc-omap2ti,sysc”H ´H ´H ´örevsyscsyss ,  Ÿfck+ H °˜Žusb@0ti,omap3-musb”ð\]Æmcdma 5 @ H ¡default¯  Q ` h musb2-phyI w2dss@48050000 ti,omap3-dss”H‡okay ûdss_core˜µŸfck+ } ¡default¯dispc@48050400ti,omap3-dispc”Hð ûdss_dispc˜µŸfckencoder@4804fc00 ti,omap3-dsi”HüHþ@Hÿ öprotophypllð ‡disabled ûdss_dsi1˜µ´ Ÿfcksys_clk+encoder@48050800ti,omap3-rfbi”H ‡disabled ûdss_rfbi˜µ¶Ÿfckickencoder@48050c00ti,omap3-venc”H  ‡disabled ûdss_venc˜²Ÿfckportendpoint Ÿè(ssi-controller@48058000 ti,omap3-ssiûssi‡okay”H€HösysgddðGÆgdd_mpu+ ˜ Ÿssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port”H H¨ötxrxðCDssi-port@4805b000ti,omap3-ssi-port”H°H¸ötxrxðEFpinmux@480025d8 ti,omap3-padconfpinctrl-single”H%Ø$+ ,A_ÿisp@480bc000 ti,omap3-isp”H ÀüH Ø|𠪐l ±Ö¡default¯èðports+port@0”endpointŒ ½ Ê ×èòbandgap@48002524”H%$ti,omap34xx-bandgap ãètarget-module@480cb000ti,sysc-omap3430-srti,syscûsmartreflex_core”H °$ösysc˜Ÿfck+ H °smartreflex@0ti,omap3-smartreflex-core”ðtarget-module@480c9000ti,sysc-omap3430-srti,syscûsmartreflex_mpu_iva”H $ösysc˜Ÿfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-iva”ðtarget-module@50000000ti,sysc-omap2ti,sysc”Pörev˜áŸfckick+ Pgpu@0#ti,omap3430-gpuimg,powervr-sgx530”ðopp-tableoperating-points-v2-ti-cpuèopp-125000000 ùsY@ à˜à˜à˜ ÿÿÿÿopp-250000000 ùæ²€ g8g8g8 ÿÿÿÿ opp-500000000 ùÍe O€O€O€ ÿÿÿÿopp-550000000 ù ÈU€ txtxtx ÿÿÿÿopp-600000000 ù#ÃF ™p™p™p ÿÿÿÿopp-720000000 ù*êT ™p™p™p ÿÿÿÿ +thermal-zonescpu-thermal 6ú Lè ZN  gtripscpu_alert w8€ ƒÐpassiveècpu_crit w_ ƒÐ criticalcooling-mapsmap0 Ž “ÿÿÿÿÿÿÿÿmemory@80000000ˆmemory”€leds gpio-leds¡default¯led-user0 ¢user0 z ¨noneled1 ¢led1 z ¨cpu0led2 ¢led2 z ¨noneoscillatorÖ fixed-clock7Œº€èègpio_keys gpio-keys¡default¯ !sysboot2 ¢sysboot2 z" ¾ Ésysboot5 ¢sysboot5 z" ¾ Égpio1 ¢gpio1 z ¾ Égpio2 ¢gpio2 z ¾ Ésoundti,omap-twl4030 ×omap3logic à#pwm-10ti,omap-dmtimer-pwm¡default¯$ é%Y óè*displaynewhaven,nhd-4.3-480272ef-atxl ¢15¡default¯& ' öportendpoint(èbacklightpwm-backlight¡default¯) *LK@,  (2<�FPZd 1 öè'regulator-vddvarioregulator-fixed —vddvarioûè regulator-vdd33aregulator-fixed—vdd33aûè  compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellsti,use_poweroffvaa-supplyvdd-supplyvdd_io-supplyinput-clock-frequencypixel-clock-frequencyremote-endpointreadonlyvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyspi-cphaspi-cpolpagesizeaddress-widthti,dual-voltpbias-supplycd-gpiosvmmc-supplybus-widthcap-power-off-card#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optrb-gpiosgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressdr_modegpmc,wait-pingpmc,burst-lengthgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowervdds_dsi-supplyvdda_video-supplydata-linesiommusti,phy-typehsync-activevsync-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelabellinux,default-triggerlinux,codewakeup-sourceti,modelti,mcbspti,timersti,clock-sourcebacklightenable-gpiospwmsbrightness-levelsdefault-brightness-level