Ð þíOë8KD(§K 2Marvell Armada XP Development Board DB-MV784MP-GPOmarvell,axp-gpmarvell,armadaxp-mv78460marvell,armadaxpmarvell,armada-370-xp aliases ,/soc/internal-regs/serial@12000 4/soc/internal-regs/serial@12100 ÿÿÿÿ | ödisableddevbus-cs1marvell,mvebu-devbus xðï=ÿÿÿÿ | ödisableddevbus-cs2marvell,mvebu-devbus xðï;ÿÿÿÿ | ödisableddevbus-cs3marvell,mvebu-devbus xð ï7ÿÿÿÿ | ödisabledinternal-regs simple-bus ïðrtc@10300marvell,orion-rtcx Ó2i2c@11000(marvell,mv78230-i2cmarvell,mv64xxx-i2c Ó| ödisabledxi2c@11100(marvell,mv78230-i2cmarvell,mv64xxx-i2c Ó | ödisabledxserial@12000snps,dw-apb-uartx ÞÓ)è|öokayserial@12100snps,dw-apb-uartx!ÞÓ*è|öokaypin-ctrl@18000x€8marvell,mv78460-pinctrlge0-gmii-pins†õmpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge0ge0-rgmii-pins>õmpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11ge0ge1-rgmii-pinsHõmpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23ge1sdio-pins$õmpp30mpp31mpp32mpp33mpp34mpp35sd0spi0-pinsõmpp36mpp37mpp38mpp39spi0spi1-pinsõmpp13mpp14mpp16mpp17spi1uart2-pins õmpp42mpp43uart2 uart3-pins õmpp44mpp45uart3corediv-clock@18740!marvell,armada-370-corediv-clockx‡@ |(nand mbus-controller@20000marvell,mbus-controllerx€ Pinterrupt-controller@20a00 marvell,mpic;Lax ÐpXcoherency-fabric@20200marvell,coherency-fabricx°timer@20300x0@0Ó%&'(marvell,armada-xp-timer | pnbclkfixedwatchdog@20300x4marvell,armada-xp-wdt | pnbclkfixedÓ]&cpurst@20800marvell,armada-370-cpu-resetx pmsu@22000marvell,armada-370-pmsux usb@50000marvell,orion-ehcixÓ-öokay|usb@51000marvell,orion-ehcixÓ.öokay|ethernet@70000x@Ó|öokaymarvell,armada-xp-neta| €qsgmii‰ ˜mdio@72004 marvell,orion-mdiox |ethernet-phy@0x ethernet-phy@1x ethernet-phy@2xethernet-phy@3xethernet@74000x@@Ó |öokaymarvell,armada-xp-neta| €qsgmii‰ ˜sata@a0000marvell,armada-370-satax PÓ7|p01öokay¥nand-controller@d0000"marvell,armada370-nand-controllerx T Óq| öokaynand@0x®pxa3xx_nand-0´¼mvsdio@d4000marvell,orion-sdiox @Ó6|ÎÛì ödisabledsdramc@1400#marvell,armada-xp-sdram-controllerxl2-cache@8000marvell,aurora-system-cachex€þ &serial@12200snps,dw-apb-uart2 ;@ï‚‚ÿF`Ygy|  ödisabledinterrupt-controllerL;pcie@6,0lpci#‚0@ x0 6intxœ?;@ï‚‚ÿF`Ygy|  ödisabledinterrupt-controllerL;pcie@7,0lpci#‚8€ x8 6intxœ@;@ï‚‚ÿF`Ygy|  ödisabledinterrupt-controllerL;pcie@8,0lpci#‚@À x@ 6intxœA;@ï‚‚ÿF`Ygy|  ödisabledinterrupt-controllerL;pcie@9,0lpci#‚H xH 6intxœc;@ï‚‚  ÿF`Ygy|öokayinterrupt-controllerL;pcie@a,0lpci#‚P xP 6intxœg;@ï‚‚  ÿF`Y    gy|öokayinterrupt-controllerL; clocksmainpll fixed-clock‹w5”oscillator fixed-clock‹}x@chosen›serial0:115200n8memory@0lmemory xð modelcompatible#address-cells#size-cellsserial0serial1serial2serial3gpio0gpio1gpio2enable-methoddevice_typeregclocksclock-latencyctrl-gpiosinterrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesstatusdevbus,bus-widthdevbus,turn-off-psdevbus,badr-skew-psdevbus,acc-first-psdevbus,acc-next-psdevbus,rd-setup-psdevbus,rd-hold-psdevbus,sync-enabledevbus,wr-high-psdevbus,wr-low-psdevbus,ale-wr-psbank-widthinterruptsreg-shiftreg-io-widthmarvell,pinsmarvell,functionphandle#clock-cellsclock-output-names#interrupt-cellsinterrupt-controllermsi-controllerclock-namesphyphy-modebuffer-managerbm,pool-longnr-portslabelnand-rbnand-on-flash-bbtcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedcache-id-partcache-levelcache-unifiedwt-overridepinctrl-0pinctrl-namesdmacap,memcpydmacap,xordmacap,memsetreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memngpiosgpio-controller#gpio-cells#pwm-cellscell-indexspi-max-frequencyno-memory-wcmsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequencystdout-path