Ð þí@ˆ8<¬(Üÿÿÿÿ¦ ­disableddevbus-cs1!marvell,mvebu-devbus ¢ð›=ÿÿÿÿ¦ ­disableddevbus-cs2!marvell,mvebu-devbus ¢ð›;ÿÿÿÿ¦ ­disableddevbus-cs3!marvell,mvebu-devbus ¢ð ›7ÿÿÿÿ¦ ­disabledinternal-regs !simple-bus›ðsdramc@1400#!marvell,armada-xp-sdram-controller¢cache-controller@8000!arm,pl310-cache¢€´ÂÎçscu@c000!arm,cortex-a9-scu¢ÀXtimer@c200!arm,cortex-a9-global-timer¢Â  " ¦timer@c600!arm,cortex-a9-twd-timer¢Æ  " ¦interrupt-controller@d000!arm,cortex-a9-gic->¢ÐÁSi2c@11000+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c¢  "¦­okay[† i2c@11100+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c¢  "¦ ­disabledserial@12000!!marvell,armada-38x-uartns16550a¢ k " u¦­okayserial@12100!!marvell,armada-38x-uartns16550a¢!k " u¦ ­disabledpinctrl@18000¢€ !marvell,mv88f6828-pinctrlSge-rgmii-pins-0D‚mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17ge0ge-rgmii-pins-1H‚mpp21mpp27mpp28mpp29mpp30mpp31mpp32mpp37mpp38mpp39mpp40mpp41ge1i2c-pins-0 ‚mpp2mpp3i2c0mdio-pins ‚mpp4mpp5geref-clk-pins-0‚mpp45refref-clk-pins-1‚mpp46refspi-pins-0‚mpp22mpp23mpp24mpp25spi0spi-pins-1‚mpp56mpp57mpp58mpp59spi1nand-pinsN‚mpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32devnand-rb‚mpp41nanduart-pins-0 ‚mpp0mpp1ua0uart-pins-1 ‚mpp19mpp20ua1sdhci-pins<�‚mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59sd0Ssata-pins-0‚mpp20sata0sata-pins-1‚mpp19sata1sata-pins-2‚mpp47sata2sata-pins-3‚mpp44sata3i2s-pins$‚mpp48mpp49mpp50mpp51mpp52mpp53audiospdif-pins‚mpp51audiogpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio¢@À  gpiopwmª ±Á ÍÙ>-0"5678¦gpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio¢@@È  gpiopwmª±Á ÍÙ>-0":;<�=¦system-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controller¢‚clock-gating-control@18220 !marvell,armada-380-gating-clock¢‚ ¦äSphy@18300!marvell,armada-380-comphy  comphyconf¢ƒ„`phy@0¢ñphy@1¢ñphy@2¢ñphy@3¢ñphy@4¢ñphy@5¢ñmvebu-sar@18600!marvell,armada-380-core-clock¢†äSmbus-controller@20000!marvell,mbus-controller¢€ PSinterrupt-controller@20a00 !marvell,mpic¢ ÐpX->ü "Stimer@203001!marvell,armada-380-timermarvell,armada-xp-timer¢0@0PH    ¦  nbclkfixedwatchdog@20300!marvell,armada-380-wdt¢4‚` ¦  nbclkfixed H@ cpurst@20800!marvell,armada-370-cpu-reset¢mpcore-soc-ctrl@20d20#!marvell,armada-380-mpcore-soc-ctrl¢ lcoherency-fabric@21010$!marvell,armada-380-coherency-fabric¢pmsu@22000!marvell,armada-380-pmsu¢ ethernet@70000!marvell,armada-370-neta¢@H¦&H­okay% )rgmii-idethernet@30000!marvell,armada-370-neta¢@H ¦­okay%  )rgmii-idethernet@34000!marvell,armada-370-neta¢@@H ¦ ­disabledusb@58000!marvell,orion-ehci¢€ "¦ ­disabledxor@60800)!marvell,armada-380-xormarvell,orion-xor¢ ¦­okayxor00 "2@xor01 "2@Kxor@60900)!marvell,armada-380-xormarvell,orion-xor¢  ¦­okayxor10 "A2@xor11 "B2@Kmdio@72004!marvell,orion-mdio¢ ¦ethernet-phy@0¢S ethernet-phy@1¢Scrypto@90000!marvell,armada-38x-crypto¢  regs" ¦ cesa0cesa1cesaz0cesaz1Y nrtc@a3800!marvell,armada-380-rtc¢ 8 „    rtcrtc-soc "sata@a8000!marvell,armada-380-ahci¢ €  "¦ ­disabledbm@c8000!marvell,armada-380-neta-bm¢ €¬¦ ‡  ­disabledsata@e0000!marvell,armada-380-ahci¢  "¦ ­disabledclock@e4250!!marvell,armada-380-corediv-clock¢BP ä¦ ”nandSthermal@e8078!marvell,armada380-thermal¢@x@p­okaynand-controller@d0000"!marvell,armada370-nand-controller¢ T "T¦ ­disabledsdhci@d8000!marvell,armada-380-sdhci sdhcimbusconf-sdio3¢ € À„T "¦§­okay½defaultËÕßèôaudio-controller@e8000þ!marvell,armada-380-audio¢€@„ ‚ i2s_regspll_regssoc_ctrl "K¦  internal ­disabledusb3@f0000!marvell,armada-380-xhci¢@@@ "¦ ­okayusb3@f8000!marvell,armada-380-xhci¢€@À@ "¦  ­disabledsa-sram0 !mmio-sram ¢ ¦› S sa-sram1 !mmio-sram ¢ ¦› S bm-bppi !mmio-sram ¢ › ¦  ­disabledS spi@10600)!marvell,armada-380-spimarvell,orion-spi ¢ðP "¦­okayflash@0!st,m25p128jedec,spi-nor¢'oóspi@10680)!marvell,armada-380-spimarvell,orion-spi ¢ð€P "?¦ ­disabledpcie!marvell,armada-370-pcie­okay9pciEPÿP›‚ð ‚ð ‚@ð@ ‚€ð€ ‚èà‚èà‚؁Ђ¸°pcie@1,09pciZ‚ ¢mintxH-@›‚‚Pÿ}`ž°¦­okayinterrupt-controller>-Spcie@2,09pciZ‚ ¢mintxH!-@›‚‚Pÿ}`ž°¦ ­disabledinterrupt-controller>-Spcie@3,09pciZ‚@ ¢mintxHF-@›‚‚Pÿ}`ž°¦ ­disabledinterrupt-controller>-Spcie@4,09pciZ‚ € ¢ mintxHG-@›‚‚Pÿ}`ž°¦ ­disabledinterrupt-controller>-Sclocksmainpll !fixed-clockä[;šÊS oscillator !fixed-clockä[}x@ScpusÂmarvell,armada-380-smpcpu@09cpu!arm,cortex-a9¢cpu@19cpu!arm,cortex-a9¢chosenÐserial0:115200n8memory9memory¢ #address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandleclock-frequencyreg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpiosgpio-controllergpio-ranges#gpio-cells#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphyphy-modedmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memclock-output-namesmrvl,clk-delay-cyclespinctrl-namespinctrl-0broken-cdno-1-8-vwp-invertedbus-width#sound-dai-cellsno-memory-wccell-indexspi-max-frequencydevice_typemsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneenable-methodstdout-path