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!nxp,pca9555[defaultg"ƒ“>-¢!S)eeprom@57 !atmel,24c64¢Wi2c@11100+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c¢  "¦ ­disabledserial@12000!!marvell,armada-38x-uartns16550a¢ Ÿ " ©¦­okay[defaultiserial@12100!!marvell,armada-38x-uartns16550a¢!Ÿ " ©¦ ­disabledpinctrl@18000¢€ !marvell,mv88f6828-pinctrlS ge-rgmii-pins-0D¶mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17Ãge0S ge-rgmii-pins-1H¶mpp21mpp27mpp28mpp29mpp30mpp31mpp32mpp37mpp38mpp39mpp40mpp41Ãge1Si2c-pins-0 ¶mpp2mpp3Ãi2c0Smdio-pins ¶mpp4mpp5ÃgeSref-clk-pins-0¶mpp45ÃrefS ref-clk-pins-1¶mpp46Ãrefspi-pins-0¶mpp22mpp23mpp24mpp25Ãspi0S$spi-pins-1¶mpp56mpp57mpp58mpp59Ãspi1nand-pinsN¶mpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32Ãdevnand-rb¶mpp41Ãnanduart-pins-0 ¶mpp0mpp1Ãua0Suart-pins-1 ¶mpp19mpp20Ãua1sdhci-pins<�¶mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59Ãsd0S!sata-pins-0¶mpp20Ãsata0Ssata-pins-1¶mpp19Ãsata1Ssata-pins-2¶mpp47Ãsata2Ssata-pins-3¶mpp44Ãsata3Si2s-pins$¶mpp48mpp49mpp50mpp51mpp52mpp53Ãaudiospdif-pins¶mpp51Ãaudiopca0_pins¶mpp18ÃgpioSgpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio¢@À ÔgpiopwmÞ ƒå “ñ>-0"5678¦Sgpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio¢@@È ÔgpiopwmÞƒå “ñ>-0":;<�=¦system-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controller¢‚clock-gating-control@18220 !marvell,armada-380-gating-clock¢‚ ¦üS phy@18300!marvell,armada-380-comphy Ôcomphyconf¢ƒ„`phy@0¢ phy@1¢ phy@2¢ phy@3¢ phy@4¢ phy@5¢ mvebu-sar@18600!marvell,armada-380-core-clock¢†üSmbus-controller@20000!marvell,mbus-controller¢€ PSinterrupt-controller@20a00 !marvell,mpic¢ ÐpX-> "Stimer@203001!marvell,armada-380-timermarvell,armada-xp-timer¢0@0PH    ¦  #nbclkfixedwatchdog@20300!marvell,armada-380-wdt¢4‚` ¦  #nbclkfixed H@ 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­okayinterrupt-controller>-S&pcie@3,0“pci´‚@ ¢ÇintxHF-@›‚‚ªÿ×`ê''''ø ¦ ­okayinterrupt-controller>-S'pcie@4,0“pci´‚ € ¢ ÇintxHG-@›‚‚ªÿ×`ê((((ø ¦  ­disabledinterrupt-controller>-S(gpio-fan !gpio-fan ß) ¸clocksmainpll !fixed-clocküs;šÊSoscillator !fixed-clocküs}x@S cpus/marvell,armada-380-smpcpu@0“cpu!arm,cortex-a9¢cpu@1“cpu!arm,cortex-a9¢chosen=serial0:115200n8memory“memory¢€usb2_1_phy!usb-nop-xceivt* S"usb3_phy!usb-nop-xceivt+ S#usb3-vbus!regulator-fixed Iusb3-vbusXLK@pLK@ˆ ›)S+v5-vbus0!regulator-fixed Iv5.0-vbus0XLK@pLK@ˆ  ›)Sv5-vbus1!regulator-fixed Iv5.0-vbus1XLK@pLK@ˆ ›,S*pwr-sata0!regulator-fixed Ipwr_en_sata0X·p·ˆ´ ›,S-v5-sata0!regulator-fixed Iv5.0-sata0XLK@pLK@Æ-Sv12-sata0!regulator-fixed Iv12.0-sata0X·p·Æ-pwr-sata1 Ipwr_en_sata1!regulator-fixedX·p·ˆ´ ›,S.v5-sata1!regulator-fixed Iv5.0-sata1XLK@pLK@Æ.Sv12-sata1!regulator-fixed Iv12.0-sata1X·p·Æ.pwr-sata2!regulator-fixed Ipwr_en_sata2ˆ´ ›, S/v5-sata2!regulator-fixed Iv5.0-sata2XLK@pLK@Æ/Sv12-sata2!regulator-fixed Iv12.0-sata2X·p·Æ/pwr-sata3!regulator-fixed Ipwr_en_sata3ˆ´ ›, S0v5-sata3!regulator-fixed Iv5.0-sata3XLK@pLK@Æ0Sv12-sata3!regulator-fixed Iv12.0-sata3X·p·Æ0 #address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandlepinctrl-namespinctrl-0clock-frequencygpio-controller#gpio-cellsreg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpiosgpio-ranges#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphyphy-modebuffer-managerbm,pool-longbm,pool-shortvcc-supplydmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizetarget-supplyinternal-memclock-output-namesmrvl,clk-delay-cyclesno-1-8-vbroken-cdwp-invertedbus-width#sound-dai-cellsusb-phyno-memory-wccell-indexspi-max-frequencym25p,fast-readdevice_typemsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-lanegpio-fan,speed-mapenable-methodstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onregulator-boot-onvin-supply