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þíj§8dÜ(Ëd¤ti,dm8148ti,dm814+7Winterland IceBoardchosen=serial1:115200n8 IearlyconaliasesR/ocp/l4ls@48000000/i2c@28000W/ocp/l4ls@48000000/i2c@2a000 \/ocp/l4ls@48000000/serial@20000 d/ocp/l4ls@48000000/serial@22000 l/ocp/l4ls@48000000/serial@24000=t/ocp/l4hs@4a000000/target-module@100000/ethernet@0/slave@200=~/ocp/l4hs@4a000000/target-module@100000/ethernet@0/slave@300ˆ/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#’/ocp/usb@47400000/usb-phy@47401300/—/ocp/l4ls@48000000/control@140000/usb-phy@1b00cpus+cpu@0arm,cortex-a8œcpu¨pmuarm,cortex-a8-pmu¬socti,omap-inframpu
ti,omap3-mpu·mpuocpsimple-bus+Á·l3_mainusb@47400000ti,am33xx-usb¨G@Á+·usb_otg_hsusb-phy@47401300ti,am335x-usb-phy¨G@ÈphyÒÞéusb@47401000ti,musb-am33xx¨G@G@Èmccontrol¬ñmchost *:ôGhL
„Qrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15[defaultiusb@47401800ti,musb-am33xx¨G@G@Èmccontrol¬ñmchost *:ôGhL„Qrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15[defaultidma-controller@47402000ti,am3359-cppi41 ¨G@G@ G@0G@@@#Ègluecontrollerschedulerqueuemgr¬ñglues~Œél4ls@48000000ti,dm814-l4lssimple-bus+ÁHi2c@28000
ti,omap4-i2c+·i2c1¨€¬Fi2c-mux@70nxp,pca9548¨p+ši2c@0+¨i2c@1+¨i2c@2+¨i2c@3+¨i2c@4+¨i2c@5+¨ina230@40
ti,ina230¨@²ˆina230@41
ti,ina230¨A²ˆina230@42
ti,ina230¨B²ˆina230@44
ti,ina230¨D²ˆina230@45
ti,ina230¨E²ˆina230@46
ti,ina230¨F²ˆina230@47
ti,ina230¨G²|ina230@48
ti,ina230¨H² 8ina230@49
ti,ina230¨I² 8ina230@43
ti,ina230¨C² 8ina230@4b
ti,ina230¨K²|ina230@4c
ti,ina230¨L² 8ina230@4d
ti,ina230¨M²ina230@4e
ti,ina230¨N²ina230@4f
ti,ina230¨O²i2c@6+¨i2c@7+¨pca9575@20nxp,pca9575¨ ÁÑÌÝFMCA_EN_12V0FMCA_EN_3V3FMCA_EN_VADJFMCA_PG_M2CFMCA_PG_C2MFMCA_PRSNT_M2C_LFMCA_CLK_DIRSFP_LOSFMCB_EN_12V0FMCB_EN_3V3FMCB_EN_VADJFMCB_PG_M2CFMCB_PG_C2MFMCB_PRSNT_M2C_LFMCB_CLK_DIRSFP_ModPrsLípca9575@21nxp,pca9575¨!ÁÑ»ÝQSFPA_ModPrsLQSFPA_IntLQSFPA_ResetLQSFPA_ModSelLQSFPA_LPModeQSFPB_ModPrsLQSFPB_IntLQSFPB_ResetLSFP_TxFaultSFP_TxDisableSFP_RS0SFP_RS1QSFPB_ModSelLQSFPB_LPModeSEL_SFPARM_MRípca9575@22nxp,pca9575¨"ÁÑ`ù ` xÝGP_SW1GP_SW2GP_SW3GP_SW4GP_SW5GP_SW6GP_SW7GP_SW8GP_LED8GP_LED7GP_LED6GP_LED5GP_LED4GP_LED3GP_LED2GP_LED1íé pca9575@23nxp,pca9575¨#ÁÑÖÝGP_LED9GP_LED10GP_LED11GP_LED12GTX1V8PowerFaultPHYAPowerFaultPHYBPowerFaultArmPowerFaultBP_SLOW_GPIO0BP_SLOW_GPIO1BP_SLOW_GPIO2BP_SLOW_GPIO3BP_SLOW_GPIO4BP_SLOW_GPIO5__unused_u59_p16__unused_u59_p17ítmp100@48
ti,tmp100¨Htmp100@4a
ti,tmp100¨Jtmp100@4b
ti,tmp100¨Ktmp100@4c
ti,tmp100¨Lat24c01@57atmel,24c01¨Wat24cs01@5f
atmel,24cs01¨_elm@80000ti,814-elm·elm¨ ¬gpio@32000ti,omap4-gpio·gpio1¨ ¬`ÁÑ3[defaulti
¥ÝPROGRAM_BINIT_BDONEFMCA_TMSFMCA_TCKFMCA_TDOFMCA_TDIFMCA_TRSTFMCB_TMSFMCB_TCKFMCB_TDOFMCB_TDIFMCB_TRSTFPGA_TMSFPGA_TCKFPGA_TDOFPGA_TDIgpio@4c000ti,omap4-gpio·gpio2¨À ¬bÁÑ3[defaultiGÝPHYA_IRQ_NPHYA_RESET_NPHYB_IRQ_NPHYB_RESET_NARM_IRQGPIO_IRQégpio@1ac000ti,omap4-gpio·gpio3¨À ¬ ÁÑ3[default%ÝARMClkSel0EnFPGARefARMClkSel1gpio@1ae000ti,omap4-gpio·gpio4¨à ¬>ÁÑ3[defaultiNÝBP_ARM_GPIO0BP_ARM_GPIO1BP_ARM_GPIO2BP_ARM_GPIO3BP_ARM_GPIO4BP_ARM_GPIO5i2c@2a000
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atmel,24cs08¨\tmp421@4d
ti,tmp421¨Mtmp421@4e
ti,tmp421¨Nina230@40
ti,ina230¨@² 8amc6821@18ti,amc6821¨spi@30000ti,omap4-mcspi¨+¬AQ·mcspi1`L
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Qtx0rx0target-module@2e000ti,sysc-omap4-timerti,sysc¨àà Èrevsyscw„’™fck+Áॹtimer@0ti,am335x-timer-1ms¨¬CÄ’™fckÓãserial@20000ti,am3352-uartti,omap3-uart·uart1¨ úÜl¬HL
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Qtxrxtarget-module@40000ti,sysc-omap4-timerti,sysc¨ Èrevsyscw„’™fck+Á¥¹timer@0ti,dm814-timer¨¬D’™fckÓãtimer@42000ti,dm814-timer¨ ¬E·timer3mmc@60000ti,omap4-hsmmc·mmc1L
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disabledrtc@c0000ti,am3352-rtcti,da830-rtc¨¬KL·rtcmmc@1d8000ti,omap4-hsmmc·mmc2L
Qtxrx¬¨€[defaulticontrol@140000ti,dm814-scmsimple-bus¨+Áscm_conf@0sysconsimple-bus¨+Áé,phy-gmii-selti,dm814-phy-gmii-sel¨PÞé-clocks+devosc_ck@40'
ti,mux-clock’4¨@éauxosc_ck'fixed-clockúXodértcosc_ck'fixed-clockú€é#tclkin_ck'fixed-clockúévirt_20000000_ck'fixed-clockú1-évirt_19200000_ck'fixed-clockú$øémpu_ck'fixed-clockú;šÊclockdomainscontrol@620ti,am335x-usb-ctrl-module¨ HÈphy_ctrlwakeupédma-router@f90ti,am335x-edma-crossbar¨@s A
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ti,mux-clock’4¨àétimer2_fck@2e0'
ti,mux-clock’4¨àécpsw_cpts_rft_clk'
ti,mux-clock’ !"4¨èé+cpsw_125mhz_gclk'fixed-clockúsY@é*sysclk18_ck@2f0'
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xvmmcsd_fixed‡2Z Ÿ2Z ·é compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathbootargsi2c0i2c1serial0serial1serial2ethernet0ethernet1usb0usb1phy0phy1device_typereginterruptsti,hwmodsrangesreg-namesti,ctrl_mod#phy-cellsphandleinterrupt-namesdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphysdmasdma-namespinctrl-namespinctrl-0#dma-cells#dma-channels#dma-requestsi2c-mux-idle-disconnectshunt-resistorgpio-controller#gpio-cellsgpio-line-namesreset-gpiossw-gpiosled-gpiosti,gpio-always-oninterrupt-controller#interrupt-cellsmulti-masterti,spi-num-csspi-max-frequencylabelti,sysc-maskti,sysc-sidleclocksclock-namesti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsclock-frequencystatusvmmc-supplybus-width#clock-cellsti,bit-shiftdma-masters#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsclock-multclock-divti,clock-multti,clock-divti,max-divclock-output-namesti,tptcsti,edma-memcpy-channelsti,sysc-midleti,syss-maskcpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsyscondual_emacbus_freqrxc-skew-psrxdv-skew-psrxd3-skew-psrxd2-skew-psrxd1-skew-psrxd0-skew-psphy-reset-gpiosmac-addressphy-handlephy-modedual_emac_res_vlanti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on