Ð þíg8b„(‘bL ,Mele M9 top set box2mele,m9allwinner,sun6i-a31aliases=/soc/ethernet@1c30000G/soc/serial@1c28000chosen OVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi@u3/2w’zŠ |disabledframebuffer-lcd002allwinner,simple-framebuffersimple-framebuffer bde_be0-lcd00u3/w’z |disabledtimer2arm,armv7-timer0ƒ   Žn6žcpusÂallwinner,sun6i-a31 cpu@02arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@12arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@22arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿcpu@32arm,cortex-a7ÐcpuÜu๰ îa€O€ /O€ ü€ÈàSB@ÿ thermal-zonescpu-thermal!ú7èEcooling-mapsmap0U0Zÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿtripscpu-alert0ipuÐ×passivecpu-criti† uÐ ×criticalpmu2arm,cortex-a7-pmu0ƒxyz{clocks Oclk-24M€ 2fixed-clockŽn6ÃPœosc24Mclk-32k€ 2fixed-clockŽ€ÃP œext_osc32k9clk-mii-phy-tx€ 2fixed-clockŽ}x@ œmii_phy_tx clk-gmac-int-tx€ 2fixed-clockŽsY@ œgmac_int_tx clk@1c200d0€2allwinner,sun7i-a20-gmac-clkÜÂÐu œgmac_tx%display-engine#2allwinner,sun6i-a31-display-engine¯  |disabledsoc 2simple-bus Odma-controller@1c020002allwinner,sun6i-a31-dmaÜÀ  ƒ2uÃÊlcd-controller@1c0c0002allwinner,sun6i-a31-tconÜÀÀ ƒVÕ Ã) Úlcdlvds u/æahbtcon-ch0tcon-ch1lvds-altœtcon0-pixel-clock€ports port@0 Üendpoint@0Üò7endpoint@1Üò1port@1 Üendpoint@1Üòlcd-controller@1c0d0002allwinner,sun6i-a31-tconÜÀÐ ƒWÕ Ã) Úlcdlvds u0€‚æahbtcon-ch0tcon-ch1lvds-altœtcon1-pixel-clock€ports port@0 Üendpoint@0Üò8endpoint@1Üò2port@1 Üendpoint@1Üòmmc@1c0f0002allwinner,sun7i-a20-mmcÜÀð uOQPæahbmmcoutputsampleÃÚahb ƒ<�default'|okay 1=Gmmc@1c100002allwinner,sun7i-a20-mmcÜÁ uRTSæahbmmcoutputsampleÃÚahb ƒ=default' |disabled mmc@1c110002allwinner,sun7i-a20-mmcÜÁ uUWVæahbmmcoutputsampleÃÚahb ƒ> |disabled mmc@1c120002allwinner,sun7i-a20-mmcÜÁ  uXZYæahbmmcoutputsampleà Úahb ƒ? |disabled hdmi@1c160002allwinner,sun6i-a31-hdmiÜÁ` ƒX(u2Š‹ æahbmodddcpll-0pll-1ÃPddc-txddc-rxaudio-txÕ   |disabledports port@0 Üendpoint@0Üòendpoint@1Üòport@1Üusb@1c190002allwinner,sun6i-a31-musbÜÁu(à ƒGZmcjousby€otg |disabledphy@1c194002allwinner,sun6i-a31-usb-phyÜÁ”Á¨Á¸ˆphy_ctrlpmu1pmu2udefæusb0_phyusb1_phyusb2_phyÃ!Úusb0_resetusb1_resetusb2_reset|okay’®usb@1c1a000&2allwinner,sun6i-a31-ehcigeneric-ehciÜÁ  ƒHu)Ãjousb|okayusb@1c1a400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁ¤ ƒIu+gÃjousb |disabledusb@1c1b000&2allwinner,sun6i-a31-ehcigeneric-ehciÜÁ° ƒJu*Ãjousb|okayusb@1c1b400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁ´ ƒKu,hÃjousb |disabledusb@1c1c400&2allwinner,sun6i-a31-ohcigeneric-ohciÜÁÄ ƒMu-ià |disabledclock@1c200002allwinner,sun6i-a31-ccuÜ u æhosclosc€¿pinctrl@1c208002allwinner,sun6i-a31-pinctrlÜ 0ƒ u@æapbhoscloscÌÜñgmac-gmii-pins‚PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27gmacgmac-mii-pinsTPA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA27gmac&gmac-rgmii-pinsFPA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA27gmac(i2c0-pins PH14PH15i2c0"i2c1-pins PH16PH17i2c1#i2c2-pins PH18PH19i2c2$lcd0-rgb888-pins‚PD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15PD16PD17PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27lcd0mmc0-pinsPF0PF1PF2PF3PF4PF5mmc0+mmc1-pinsPG0PG1PG2PG3PG4PG5mmc1+mmc2-4bit-pinsPC6PC7PC8PC9PC10PC11mmc2+mmc2-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24mmc2+mmc3-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24mmc3(+spdif-tx-pinPH28spdifuart0-ph-pins PH20PH21uart0!timer@1c20c002allwinner,sun4i-a10-timerÜ  Hƒuwatchdog@1c20ca02allwinner,sun6i-a31-wdtÜ    ƒuspdif@1c2100082allwinner,sun6i-a31-spdifÜ ƒ u>cÃ+ æapbspdifÕPrxtx |disabledi2s@1c2200082allwinner,sun6i-a31-i2sÜ  ƒ uAaÃ-æapbmodÕPrxtx |disabledi2s@1c2240082allwinner,sun6i-a31-i2sÜÂ$ ƒuBbÃ.æapbmodÕPrxtx |disabledlradc@1c228002allwinner,sun4i-a10-lradc-keysÜÂ(  ƒ |disabledrtp@1c250002allwinner,sun6i-a31-tsÜÂP ƒIserial@1c280002snps,dw-apb-uartÜ€ ƒ_iuGÃ3ÕPtxrx|okaydefault'!serial@1c284002snps,dw-apb-uartÜ„ ƒ_iuHÃ4ÕPtxrx |disabledserial@1c288002snps,dw-apb-uart܈ ƒ_iuIÃ5ÕPtxrx |disabledserial@1c28c002snps,dw-apb-uartÜÂŒ ƒ_iuJÃ6Õ  Ptxrx |disabledserial@1c290002snps,dw-apb-uartܐ ƒ_iuKÃ7Õ  Ptxrx |disabledserial@1c294002snps,dw-apb-uartÜ” ƒ_iuLÃ8ÕPtxrx |disabledi2c@1c2ac002allwinner,sun6i-a31-i2cܬ ƒuCÃ/default'" |disabled i2c@1c2b0002allwinner,sun6i-a31-i2cÜ° ƒuDÃ0default'# |disabled i2c@1c2b4002allwinner,sun6i-a31-i2cÜ´ ƒuEÃ1default'$ |disabled i2c@1c2b8002allwinner,sun6i-a31-i2cܸ ƒ uFÃ2 |disabled ethernet@1c300002allwinner,sun7i-a20-gmacÜÃT ƒRZmacirq u!%æstmmacethallwinner_gmac_txà  Ústmmacethv|okaydefault'&§'²mii»(mdio2snps,dwmac-mdio ethernet-phy@1Ü'crypto-engine@1c1500062allwinner,sun6i-a31-cryptoallwinner,sun4i-a10-cryptoÜÁP ƒPu\æahbmodÃÚahbcodec@1c22c0082allwinner,sun6i-a31-codecÜÂ, ƒu=‡ æapbcodecÃ*ÕPrxtx |disabledtimer@1c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimerÜÆ0ƒ3456u#Ãspi@1c680002allwinner,sun6i-a31-spiÜÆ€ ƒAu$]æahbmodÕPrxtxà |disabled spi@1c690002allwinner,sun6i-a31-spiÜƐ ƒBu%^æahbmodÕPrxtxà |disabled spi@1c6a0002allwinner,sun6i-a31-spiÜÆ  ƒCu&_æahbmodÕPrxtxà |disabled spi@1c6b0002allwinner,sun6i-a31-spiÜÆ° ƒDu'`æahbmodÕPrxtxà |disabled interrupt-controller@1c81000 2arm,gic-400 ÜÈÈ È@ È` Üñ ƒ display-frontend@1e00000%2allwinner,sun6i-a31-display-frontendÜà ƒ]u5|u æahbmodramÃ! ports port@1 Üendpoint@0Üò)3endpoint@1Üò*-display-frontend@1e20000%2allwinner,sun6i-a31-display-frontendÜâ ƒ^u6}v æahbmodramÃ" ports port@1 Üendpoint@0Üò+4endpoint@1Üò,.display-backend@1e40000$2allwinner,sun6i-a31-display-backendÜä ƒ`u4{x æahbmodramà ports port@0 Üendpoint@0Üò-*endpoint@1Üò.,port@1 Üendpoint@1Üò/0drc@1e500002allwinner,sun6i-a31-drcÜå ƒ[u<�“r æahbmodramÃ(ports port@0 Üendpoint@1Üò0/port@1 Üendpoint@0Üò1endpoint@1Üò2display-backend@1e60000$2allwinner,sun6i-a31-display-backendÜæ ƒ_u3zw æahbmodramÃports port@0 Üendpoint@0Üò3)endpoint@1Üò4+port@1Üendpointò56drc@1e700002allwinner,sun6i-a31-drcÜç ƒ[u;’q æahbmodramÃ'ports port@0Üendpointò65port@1 Üendpoint@0Üò7endpoint@1Üò8rtc@1f00000€2allwinner,sun6i-a31-rtcÜðT ƒ()u9œosc32kinterrupt-controller@1f00c002allwinner,sun6i-a31-r-intcÜñÜð  ƒ  prcm@1f014002allwinner,sun6i-a31-prcmÜðar100-clk2allwinner,sun6i-a31-ar100-clk€u  œar100:ahb0-clk2fixed-factor-clock€ÆÐu:œahb0;apb0-clk2allwinner,sun6i-a31-apb0-clk€u;œapb0<�apb0-gates-clk#2allwinner,sun6i-a31-apb0-gates-clk€u<�Dœapb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2c=ir-clk€2allwinner,sun4i-a10-mod0-clk uœir>apb0-rst 2allwinner,sun6i-a31-clock-reset¿?cpucfg@1f01c002allwinner,sun6i-a31-cpuconfigÜðir@1f020002allwinner,sun6i-a31-ir u=>æapbirÃ? ƒ%Üð @|okaydefault'@pinctrl@1f02c002allwinner,sun6i-a31-r-pinctrlÜð, ƒ-.u=æapbhoscloscÌÜñs-ir-rx-pinPL4s_ir@s-p2wi-pinsPL0PL1s_p2wiAi2c@1f034002allwinner,sun6i-a31-p2wiÜð4 ƒ'u=Ž† Ã?default'A|okay pmic@682x-powers,axp221Üh  ƒ Üñac-power 2x-powers,axp221-ac-power-supply |disabledadc2x-powers,axp221-adcÛbattery-power%2x-powers,axp221-battery-power-supply |disabledgpio2x-powers,axp221-gpioÌregulatorsí ¸dcdc1vcc-3v3#2Z ;2Z dcdc2vdd-gpu# ®`;$@dcdc3vdd-cpu# ®`;$@dcdc4 vdd-sys-dll# ®`;$@dcdc5 vcc-dram#ã`;ã`dc1swdc1swdc5ldo vdd-cpus# ®`;$@aldo1 vcc-wifi#2Z ;2Z aldo2aldo2aldo3avcc#)2à;2Z dldo1vcc-ethernet-phy#2Z ;2Z (dldo2dldo2dldo3dldo3dldo4 vcc-usb-hub#2Z ;2Z eldo1eldo1eldo2eldo2eldo3eldo3ldo_io0ldo_io0 |disabledldo_io1ldo_io1 |disabledrtc_ldo#-ÆÀ;-ÆÀrtc_ldodrivevbus drivevbus |disabledusb-power!2x-powers,axp221-usb-power-supply |disabledahci-5v2regulator-fixedahci-5v#LK@;LK@Sex |disabledusb0-vbus2regulator-fixed usb0-vbus#LK@;LK@ex  |disabledusb1-vbus2regulator-fixed usb1-vbus#LK@;LK@Sex|okayusb2-vbus2regulator-fixed usb2-vbus#LK@;LK@Sex |disabledvcc3v02regulator-fixedvcc3v0#-ÆÀ;-ÆÀvcc3v32regulator-fixedvcc3v3#2Z ;2Z vcc5v02regulator-fixedvcc5v0#LK@;LK@leds 2gpio-ledsled }m9:blue:pwrJ ƒon interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusinterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methoddevice_typeregclock-latencyoperating-points#cooling-cellscpu-supplyphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-accuracyclock-output-namesallwinner,pipelinesresets#dma-cellsdmasreset-namesclock-namesremote-endpointallwinner,tcon-channelpinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpiosdma-namesinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cellsusb1_vbus-supplyusb2_vbus-supply#reset-cellsgpio-controllerinterrupt-controller#interrupt-cells#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephy-handlephy-modephy-supplyclock-divclock-mult#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabeldefault-state