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Fø[l4_sys_free_clkù!altr,socfpga-a10-perip-clkÊ[,l4_main_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[l4_mp_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[l4_sp_clkù!altr,socfpga-a10-gate-clkÊ ¨,H[ mpu_periph_clkù!altr,socfpga-a10-gate-clkÊ,H[+sdmmc_clkù!altr,socfpga-a10-gate-clkÊ,È[#qspi_clkù!altr,socfpga-a10-gate-clkÊ,È [*nand_x_clkù!altr,socfpga-a10-gate-clkÊ,È [nand_ecc_clkù!altr,socfpga-a10-gate-clkÊ,È [%nand_clkù!altr,socfpga-a10-gate-clkÊ,È [$spi_m_clkù!altr,socfpga-a10-gate-clkÊ,È [!usb_clkù!altr,socfpga-a10-gate-clkÊ,È[-s2f_usr1_clkù!altr,socfpga-a10-gate-clkÊ,Èstmmac-axi-config5EU[ethernet@ff8000008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _DFÿ€  t\rmacirq‚Ž©€ÅÓ@ÊÑstmmacethptp_refÝ (ästmmacethahbáñokayørgmiiÿÿÿÿ Ø['mdio!snps,dwmac-mdioethernet-phy@3$1>KX¤e¤r¤¤Œ™D¥¤²F[ethernet@ff8020008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _HFÿ€  t]rmacirq‚Ž©€ÅÓ@ÊÑstmmacethptp_refÝ!)ästmmacethahbá ñdisabledethernet@ff8040008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac 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_(ñokayXis}‡[(nand-controller@ffb90000!altr,socfpga-denali-nandFÿ¹ ÿ¸nand_datadenali_reg tc Ê$%Ñnandnand_xeccÝ% ñdisabledsram@ffe00000 !mmio-sramFÿàeccmgr!altr,socfpga-a10-ecc-manager_t£’¸sdramedac!altr,sdram-edac-a10—&t1l2-ecc@ffd06010!altr,socfpga-a10-l2-eccFÿÐ`t ocram-ecc@ff8c3000!altr,socfpga-a10-ocram-eccFÿŒ0t!emac0-rx-ecc@ff8c0800!altr,socfpga-eth-mac-eccFÿŒ§'t$emac0-tx-ecc@ff8c0c00!altr,socfpga-eth-mac-eccFÿŒ §'t%sdmmca-ecc@ff8c2c00!altr,socfpga-sdmmc-eccFÿŒ,§( t/0dma-ecc@ff8c8000!altr,socfpga-dma-eccFÿŒ€§"t *usb0-ecc@ff8c8800!altr,socfpga-usb-eccFÿŒˆ§)t"spi@ff809000!!intel,socfpga-qspicdns,qspi-norFÿ€ÿ  td·€Ç×Ê*Ý&.äqspiqspi-ocp ñdisabledrstmgr@ffd05000ì !altr,rst-mgrFÿÐPù [snoop-control-unit@ffffc000!arm,cortex-a9-scuFÿÿÀsysmgr@ffd06000!altr,sys-mgrsysconFÿÐ` ÿÐb0[timer@ffffc600!arm,cortex-a9-twd-timerFÿÿÆ t Ê+timer0@ffc02700!snps,dw-apb-timer tsFÿÀ'Ê ÑtimerÝDätimertimer1@ffc02800!snps,dw-apb-timer ttFÿÀ(Ê ÑtimerÝEätimertimer2@ffd00000!snps,dw-apb-timer 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Cusb2-phy ñdisabledwatchdog@ffd00200 !snps,dw-wdtFÿÐ twÊ,Ý@ ñdisabledwatchdog@ffd00300 !snps,dw-wdtFÿÐ txÊ,ÝA ñdisabledaliasesU/soc/ethernet@ff800000_/soc/serial@ffc02100g/soc/serial@ffc02000memory@0:memoryF€chosenoserial1:115200n8 #address-cells#size-cellsmodelcompatibleenable-methoddevice_typeregnext-level-cachephandleinterrupt-parentinterruptsinterrupt-affinity#interrupt-cellsinterrupt-controllerranges#dma-cellsclocksclock-namesresetsreset-namesfpga-mgr#clock-cellsclock-frequencydiv-regfixed-dividerclk-gatesnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenaltr,sysmgr-sysconinterrupt-namesmac-addresssnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthsnps,axi-configstatusphy-modephy-addrmax-frame-sizephy-handletxd0-skew-pstxd1-skew-pstxd2-skew-pstxd3-skew-psrxd0-skew-psrxd1-skew-psrxd2-skew-psrxd3-skew-pstxen-skew-pstxc-skew-psrxdv-skew-psrxc-skew-psgpio-controller#gpio-cellssnps,nr-gpiosnum-cstx-dma-channelrx-dma-channelcache-unifiedcache-levelprefetch-dataprefetch-instrarm,shared-overridecap-sd-highspeedbroken-cdbus-widthclk-phase-sd-hsreg-namesaltr,sdr-sysconaltr,ecc-parentcdns,fifo-depthcdns,fifo-widthcdns,trigger-address#reset-cellsaltr,modrst-offsetcpu1-start-addrreg-shiftreg-io-width#phy-cellsphysphy-namesdr_modeethernet0serial1serial0stdout-path