Ð þí¡Ê8—È( —#asus,rk3288-tinkerrockchip,rk3288&"7Rockchip RK3288 Asus Tinker Boardaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000‚/i2c@ff140000‡/i2c@ff660000Œ/i2c@ff150000‘/i2c@ff160000–/i2c@ff170000›/mmc@ff0f0000¡/mmc@ff0c0000§/mmc@ff0d0000­/mmc@ff0e0000³/serial@ff180000»/serial@ff190000Ã/serial@ff690000Ë/serial@ff1b0000Ó/serial@ff1c0000Û/spi@ff110000à/spi@ff120000å/spi@ff130000arm-pmuarm,cortex-a12-pmu0ê—˜™šõcpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]œ@krrŒ ˜cpu@501#cpuarm,cortex-a12/3:N]œ@krr˜cpu@502#cpuarm,cortex-a12/3:N]œ@krr˜cpu@503#cpuarm,cortex-a12/3:N]œ@krr˜opp-table-0operating-points-v2 ˜opp-126000000«‚›€² » opp-216000000« ßæ² » opp-312000000«˜¾² » opp-408000000«Q–² » opp-600000000«#ÃF² » opp-696000000«)|²~ðopp-816000000«0£,²B@opp-1008000000«<ܲopp-1200000000«G†Œ²Èàopp-1416000000«Tfr²O€opp-1512000000«ZJ²Ö opp-1608000000«_Ø"²™popp-1704000000«eú²™popp-1800000000«kIÒ²\Àreserved-memoryÀdma-unusable@fe000000/þoscillator fixed-clockÇn6×xin24mê˜ timerarm,armv7-timer÷0ê   Çn6timer@ff810000rockchip,rk3288-timer/ÿ  êH ka  2pclktimerdisplay-subsystemrockchip,display-subsystem> mmc@ff0c0000rockchip,rk3288-dw-mshcDðÑ€ kÈDrv2biuciuciu-driveciu-sampleR ê /ÿ @3€]resetiokaypzŒ§²defaultÀ ÊÖmmc@ff0d0000rockchip,rk3288-dw-mshcDúð€ kÉEsw2biuciuciu-driveciu-sampleR ê!/ÿ @3]resetiokaypŒãð²defaultÀ,9ÊÖmmc@ff0e0000rockchip,rk3288-dw-mshcDðÑ€ kÊFtx2biuciuciu-driveciu-sampleR ê"/ÿ@3‚]reset idisabledmmc@ff0f0000rockchip,rk3288-dw-mshcDðÑ€ kËGuy2biuciuciu-driveciu-sampleR ê#/ÿ@3ƒ]reset idisabledsaradc@ff100000rockchip,saradc/ÿ ê$FkI[2saradcapb_pclk3W ]saradc-apbiokayXspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR2spiclkapb_pclkd  itxrx ê,²defaultÀ/ÿ idisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS2spiclkapb_pclkd itxrx ê-²defaultÀ !"#/ÿ idisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT2spiclkapb_pclkditxrx ê.²defaultÀ$%&'/ÿ idisabledi2c@ff140000rockchip,rk3288-i2c/ÿ ê>2i2ckM²defaultÀ( idisabledi2c@ff150000rockchip,rk3288-i2c/ÿ ê?2i2ckO²defaultÀ) idisabledi2c@ff160000rockchip,rk3288-i2c/ÿ ê@2i2ckP²defaultÀ* idisabledi2c@ff170000rockchip,rk3288-i2c/ÿ êA2i2ckQ²defaultÀ+iokay˜pserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê7s}kMU2baudclkapb_pclkditxrx²defaultÀ,iokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê8s}kNV2baudclkapb_pclkditxrx²defaultÀ-iokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿi ê9s}kOW2baudclkapb_pclk²defaultÀ.iokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê:s}kPX2baudclkapb_pclkditxrx²defaultÀ/iokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê;s}kQY2baudclkapb_pclkd  itxrx²defaultÀ0iokaydma-controller@ff250000arm,pl330arm,primecell/ÿ%@ꊕ°k 2apb_pclk˜thermal-zonesreserve-thermalÇè݈ë1cpu-thermalÇd݈ë1tripscpu_alert0ûpÐ*passive˜2cpu_alert1û$øÐ*passive˜3cpu_critû_Ð *criticalcooling-mapsmap020ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap130ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalÇd݈ë1tripsgpu_alert0ûpÐ*passive˜4gpu_critû_Ð *criticalcooling-mapsmap04 5ÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadc/ÿ( ê%kHZ2tsadcapb_pclk3Ÿ ]tsadc-apb²initdefaultsleepÀ6&706:P8]siokayt‹˜1ethernet@ff290000rockchip,rk3288-gmac/ÿ)ê¦macirqeth_wake_irqP88k—fgc˜Ä]M2stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B ]stmmacethiokay¶—Æ9Ýinputêrgmiió:²defaultÀ; þ<� $'B@90Busb@ff500000 generic-ehci/ÿP êkÂK=Pusbiokayusb@ff520000 generic-ohci/ÿR ê)kÂK=Pusb idisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/ÿT êkÃ2otgZhostK> Pusb2-phybiokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/ÿX êkÁ2otgZotgy‹š€€@@ K? Pusb2-phyiokayusb@ff5c0000 generic-ehci/ÿ\ êkÄ idisableddma-controller@ff600000arm,pl330arm,primecell/ÿ`@ꊕ°kÁ 2apb_pclk idisabledi2c@ff650000rockchip,rk3288-i2c/ÿe ê<�2i2ckL²defaultÀ@iokayÇ€pmic@1brockchip,rk808/&Aêê×xin32krk808-clkout2©A A ²defaultÀBCDE³ÔâFîFúFFFF*6BOF\i˜regulatorsDCDC_REG1vŠœ q°´\ÀÌvdd_armÛp˜ regulator-state-memðDCDC_REG2vŠœ øP´ÐÌvdd_gpuÛp˜uregulator-state-mem !B@DCDC_REG3vŠÌvcc_ddrregulator-state-mem DCDC_REG4vŠœ2Z ´2Z Ìvcc_io˜regulator-state-mem !2Z LDO_REG1vŠœw@´w@ Ìvcc18_ldo1˜regulator-state-mem !w@LDO_REG2vŠœ2Z ´2Z  Ìvcc33_mipiregulator-state-memðLDO_REG3vŠœB@´B@Ìvdd_10regulator-state-mem !B@LDO_REG4vŠœw@´w@ Ìvcc18_codecregulator-state-mem !w@LDO_REG5vŠœw@´2Z  Ìvccio_sd˜regulator-state-mem !2Z LDO_REG6vŠœB@´B@ Ìvdd10_lcdregulator-state-mem !B@LDO_REG7vŠœw@´w@Ìvcc_18˜regulator-state-mem !w@LDO_REG8vŠœw@´w@ Ìvcc18_lcdregulator-state-mem !w@SWITCH_REG1vŠ Ìvcc33_sd˜regulator-state-mem SWITCH_REG2vŠ Ìvcc33_lan˜:regulator-state-mem i2c@ff660000rockchip,rk3288-i2c/ÿf ê=2i2ckN²defaultÀGiokaypwm@ff680000rockchip,rk3288-pwm/ÿh=²defaultÀHk_iokaypwm@ff680010rockchip,rk3288-pwm/ÿh=²defaultÀIk_ idisabledpwm@ff680020rockchip,rk3288-pwm/ÿh =²defaultÀJk_ idisabledpwm@ff680030rockchip,rk3288-pwm/ÿh0=²defaultÀKk_ idisabledsram@ff700000 mmio-sram/ÿp€Àÿp€smp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/ÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/ÿs˜power-controller!rockchip,rk3288-power-controllerH¶hÆ ˜]power-domain@9/ ÈkÊÍÈÌÅƾ¿ÔÕÖÙÑÒchgfdehilkj$\LMNOPQRSTHpower-domain@11/ kÏop\UVHpower-domain@12/ kÐÜ\WHpower-domain@13/ kÀ\XYHreboot-modesyscon-reboot-modec”jRBÃvRBÄRBà ”RBÃsyscon@ff740000rockchip,rk3288-sgrfsyscon/ÿtclock-controller@ff760000rockchip,rk3288-cru/ÿvk 2xin24mP8ê H¶ÑÝjÒÞk$­#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀ˜syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/ÿw˜8edp-phyrockchip,rk3288-dp-phykh224m idisabled˜mio-domains"rockchip,rk3288-io-voltage-domainiokayÍÛusbphyrockchip,rk3288-usb-phyiokayusb-phy@320Â/ k]2phyclkê3… ]phy-reset˜?usb-phy@334Â/4k^2phyclkê3ˆ ]phy-reset˜=usb-phy@348Â/Hk_2phyclkê3‹ ]phy-reset˜>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/ÿ€kp êOiokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/ÿ‹çkTÐ 2mclkhclkdZitx ê6²defaultÀ[P8 idisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ÿ‰ç ê5kRÎ2i2s_clki2s_hclkdZZitxrx²defaultÀ\øiokay˜‚crypto@ff8a0000rockchip,rk3288-crypto/ÿŠ@ ê0 kÇÍ}Á2aclkhclksclkapb_pclk3® ]crypto-rstiommu@ff900800rockchip,iommu/ÿ@ êkÊÔ 2aclkiface- idisablediommu@ff914000rockchip,iommu /ÿ‘@ÿ‘P êkÍÕ 2aclkiface-: idisabledrga@ff920000rockchip,rk3288-rga/ÿ’€ êkÈÖj2aclkhclksclkU] 3ilm ]coreaxiahbvop@ff930000rockchip,rk3288-vop /ÿ“œÿ“ êkžÑ2aclk_vopdclk_vophclk_vopU] 3def ]axiahbdclkc^iokayport˜ endpoint@0/j_˜qendpoint@1/j`˜nendpoint@2/ja˜hendpoint@3/jb˜kiommu@ff930300rockchip,iommu/ÿ“ êkÅÑ 2aclkifaceU] -iokay˜^vop@ff940000rockchip,rk3288-vop /ÿ”œÿ” êkÆ¿Ò2aclk_vopdclk_vophclk_vopU] 3°±² ]axiahbdclkcciokayport˜ endpoint@0/jd˜rendpoint@1/je˜oendpoint@2/jf˜iendpoint@3/jg˜liommu@ff940300rockchip,iommu/ÿ” êkÆÒ 2aclkifaceU] -iokay˜cdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/ÿ–@ êk~d 2refpclkU] P8 idisabledportsport@0/endpoint@0/jh˜aendpoint@1/ji˜fport@1/lvds@ff96c000rockchip,rk3288-lvds/ÿ–À@kg 2pclk_lvds²lcdcÀjU] P8 idisabledportsport@0/endpoint@0/jk˜bendpoint@1/jl˜gport@1/dp@ff970000rockchip,rk3288-dp/ÿ—@ êbkic2dppclkKmPdpU] 3o]dpP8 idisabledportsport@0/endpoint@0/jn˜`endpoint@1/jo˜eport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/ÿ˜} êgkhmn2iahbisfrcecU] P8çiokayzp˜portsport@0/endpoint@0/jq˜_endpoint@1/jr˜dport@1/video-codec@ff9a0000rockchip,rk3288-vpu/ÿšê   ¦vepuvdpukÐÜ 2aclkhclkcsU] iommu@ff9a0800rockchip,iommu/ÿš ê kÐÜ 2aclkiface-U] ˜siommu@ff9c0440rockchip,iommu /ÿœ@@ÿœ€@ êokÏÛ 2aclkiface- idisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/ÿ£$ê ¦jobmmugpukÀ:tNU] iokay†u˜5opp-table-1operating-points-v2˜topp-100000000«õá²~ðopp-200000000« ë²~ðopp-300000000«á£²B@opp-400000000«ׄ²Èàopp-600000000«#ÃF²Ðqos@ffaa0000rockchip,rk3288-qossyscon/ÿª ˜Xqos@ffaa0080rockchip,rk3288-qossyscon/ÿª€ ˜Yqos@ffad0000rockchip,rk3288-qossyscon/ÿ­ ˜Mqos@ffad0100rockchip,rk3288-qossyscon/ÿ­ ˜Nqos@ffad0180rockchip,rk3288-qossyscon/ÿ­€ ˜Oqos@ffad0400rockchip,rk3288-qossyscon/ÿ­ ˜Pqos@ffad0480rockchip,rk3288-qossyscon/ÿ­€ ˜Qqos@ffad0500rockchip,rk3288-qossyscon/ÿ­ ˜Lqos@ffad0800rockchip,rk3288-qossyscon/ÿ­ ˜Rqos@ffad0880rockchip,rk3288-qossyscon/ÿ­€ ˜Sqos@ffad0900rockchip,rk3288-qossyscon/ÿ­ ˜Tqos@ffae0000rockchip,rk3288-qossyscon/ÿ® ˜Wqos@ffaf0000rockchip,rk3288-qossyscon/ÿ¯ ˜Uqos@ffaf0080rockchip,rk3288-qossyscon/ÿ¯€ ˜Vdma-controller@ffb20000arm,pl330arm,primecell/ÿ²@ꊕ°kÁ 2apb_pclk˜Zefuse@ffb40000rockchip,rk3288-efuse/ÿ´ kq 2pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400’§@/ÿÀÿÀ ÿÀ@ ÿÀ`  ê ˜pinctrlrockchip,rk3288-pinctrlP8Àgpio@ff750000rockchip,gpio-bank/ÿu êQk@¸È’§˜Agpio@ff780000rockchip,gpio-bank/ÿx êRkA¸È’§˜~gpio@ff790000rockchip,gpio-bank/ÿy êSkB¸È’§gpio@ff7a0000rockchip,gpio-bank/ÿz êTkC¸È’§gpio@ff7b0000rockchip,gpio-bank/ÿ{ êUkD¸È’§˜<�gpio@ff7c0000rockchip,gpio-bank/ÿ| êVkE¸È’§gpio@ff7d0000rockchip,gpio-bank/ÿ} êWkF¸È’§gpio@ff7e0000rockchip,gpio-bank/ÿ~ êXkG¸È’§˜ƒgpio@ff7f0000rockchip,gpio-bank/ÿ êYkH¸È’§hdmihdmi-cec-c0Ôvhdmi-cec-c7Ôvhdmi-ddc Ôvvhdmi-ddc-unwedge Ôwvpcfg-output-lowâ˜wpcfg-pull-upí˜xpcfg-pull-downú˜ypcfg-pull-none ˜vpcfg-pull-none-12ma   ˜|suspendglobal-pwroffÔv˜Cddrio-pwroffÔvddr0-retentionÔxddr1-retentionÔxedpedp-hpdÔ yi2c0i2c0-xfer Ôvv˜@i2c1i2c1-xfer Ôvv˜(i2c2i2c2-xfer Ô v v˜Gi2c3i2c3-xfer Ôvv˜)i2c4i2c4-xfer Ôvv˜*i2c5i2c5-xfer Ôvv˜+i2s0i2s0-bus`Ôvvvvvv˜\lcdclcdc-ctl@Ôvvvv˜jsdmmcsdmmc-clkÔz˜ sdmmc-cmdÔ{˜sdmmc-cdÔx˜sdmmc-bus1Ôxsdmmc-bus4@Ô{{{{˜sdmmc-pwrÔ v˜„sdio0sdio0-bus1Ôxsdio0-bus4@Ôxxxx˜sdio0-cmdÔx˜sdio0-clkÔv˜sdio0-cdÔxsdio0-wpÔxsdio0-pwrÔxsdio0-bkpwrÔxsdio0-intÔx˜sdio1sdio1-bus1Ôxsdio1-bus4@Ôxxxxsdio1-cdÔxsdio1-wpÔxsdio1-bkpwrÔxsdio1-intÔxsdio1-cmdÔxsdio1-clkÔvsdio1-pwrÔ xemmcemmc-clkÔvemmc-cmdÔxemmc-pwrÔ xemmc-bus1Ôxemmc-bus4@Ôxxxxemmc-bus8€Ôxxxxxxxxspi0spi0-clkÔ x˜spi0-cs0Ô x˜spi0-txÔx˜spi0-rxÔx˜spi0-cs1Ôxspi1spi1-clkÔ x˜ spi1-cs0Ô x˜#spi1-rxÔx˜"spi1-txÔx˜!spi2spi2-cs1Ôxspi2-clkÔx˜$spi2-cs0Ôx˜'spi2-rxÔx˜&spi2-txÔ x˜%uart0uart0-xfer Ôxv˜,uart0-ctsÔxuart0-rtsÔvuart1uart1-xfer Ôx v˜-uart1-ctsÔ xuart1-rtsÔ vuart2uart2-xfer Ôxv˜.uart3uart3-xfer Ôxv˜/uart3-ctsÔ xuart3-rtsÔ vuart4uart4-xfer Ôxv˜0uart4-ctsÔ xuart4-rtsÔ vtsadcotp-pinÔ v˜6otp-outÔ v˜7pwm0pwm0-pinÔv˜Hpwm1pwm1-pinÔv˜Ipwm2pwm2-pinÔv˜Jpwm3pwm3-pinÔv˜Kgmacrgmii-pinsðÔvvvv||||vvv ||vv˜;rmii-pins Ôvvvvvvvvvvspdifspdif-txÔ v˜[pcfg-pull-none-drv-8ma ˜zpcfg-pull-up-drv-8maí ˜{backlightbl-enÔvbuttonspwrbtnÔx˜}eth_phyeth-phy-pwrÔvpmicpmic-intÔx˜Bdvs-1Ô y˜Ddvs-2Ô y˜Eusbhost-vbus-drvÔvpwr-3gÔvsdiowifi-enable Ôvv˜€chosen %serial2:115200n8memory/€#memoryexternal-gmac-clock fixed-clockêÇsY@ ×ext_gmac˜9gpio-keys gpio-keys 1²defaultÀ}button ­A <�t GGPIO Key Power MÔ ^dgpio-leds gpio-ledsled-0 ­~ pmmc0led-1 ­~ pheartbeatled-2 ­A pdefault-onsdio-pwrseqmmc-pwrseq-simplek 2ext_clock²defaultÀ€ †<�<�˜soundsimple-audio-card ’i2s «rockchip,tinker-codec Âsimple-audio-card,codec ܁simple-audio-card,cpu Ü‚vsys-regulatorregulator-fixedÌvcc_sysœLK@´LK@vŠ˜Fsdmmc-regulatorregulator-fixed  ƒ ²defaultÀ„Ìvcc_sdœ2Z ´2Z  憠 ÷ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply