Ð þí¢Ê8˜¬( ˜t%asus,rk3288-tinker-srockchip,rk3288&$7Rockchip RK3288 Asus Tinker Board Saliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000‚/i2c@ff140000‡/i2c@ff660000Œ/i2c@ff150000‘/i2c@ff160000–/i2c@ff170000›/mmc@ff0f0000¡/mmc@ff0c0000§/mmc@ff0d0000­/mmc@ff0e0000³/serial@ff180000»/serial@ff190000Ã/serial@ff690000Ë/serial@ff1b0000Ó/serial@ff1c0000Û/spi@ff110000à/spi@ff120000å/spi@ff130000arm-pmuarm,cortex-a12-pmu0ê—˜™šõcpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]œ@krrŒ ˜cpu@501#cpuarm,cortex-a12/3:N]œ@krr˜cpu@502#cpuarm,cortex-a12/3:N]œ@krr˜cpu@503#cpuarm,cortex-a12/3:N]œ@krr˜opp-table-0operating-points-v2 ˜opp-126000000«‚›€² » opp-216000000« ßæ² » opp-312000000«˜¾² » opp-408000000«Q–² » opp-600000000«#ÃF² » opp-696000000«)|²~ðopp-816000000«0£,²B@opp-1008000000«<ܲopp-1200000000«G†Œ²Èàopp-1416000000«Tfr²O€opp-1512000000«ZJ²Ö opp-1608000000«_Ø"²™popp-1704000000«eú²™popp-1800000000«kIÒ²\Àreserved-memoryÀdma-unusable@fe000000/þoscillator fixed-clockÇn6×xin24mê˜ timerarm,armv7-timer÷0ê   Çn6timer@ff810000rockchip,rk3288-timer/ÿ  êH ka  2pclktimerdisplay-subsystemrockchip,display-subsystem> mmc@ff0c0000rockchip,rk3288-dw-mshcDðÑ€ kÈDrv2biuciuciu-driveciu-sampleR ê /ÿ @3€]resetiokaypzŒ§²defaultÀ ÊÖmmc@ff0d0000rockchip,rk3288-dw-mshcDúð€ kÉEsw2biuciuciu-driveciu-sampleR ê!/ÿ @3]resetiokaypŒãð²defaultÀ,9ÊÖmmc@ff0e0000rockchip,rk3288-dw-mshcDðÑ€ kÊFtx2biuciuciu-driveciu-sampleR ê"/ÿ@3‚]reset idisabledmmc@ff0f0000rockchip,rk3288-dw-mshcDðÑ€ kËGuy2biuciuciu-driveciu-sampleR ê#/ÿ@3ƒ]resetiokaypz²defaultÀFUsaradc@ff100000rockchip,saradc/ÿ ê$bkI[2saradcapb_pclk3W ]saradc-apbiokaytspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR2spiclkapb_pclk€  …txrx ê,²defaultÀ !"#/ÿ idisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS2spiclkapb_pclk€ …txrx ê-²defaultÀ$%&'/ÿ idisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT2spiclkapb_pclk€…txrx ê.²defaultÀ()*+/ÿ idisabledi2c@ff140000rockchip,rk3288-i2c/ÿ ê>2i2ckM²defaultÀ, idisabledi2c@ff150000rockchip,rk3288-i2c/ÿ ê?2i2ckO²defaultÀ- idisabledi2c@ff160000rockchip,rk3288-i2c/ÿ ê@2i2ckP²defaultÀ. idisabledi2c@ff170000rockchip,rk3288-i2c/ÿ êA2i2ckQ²defaultÀ/iokay˜tserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê7™kMU2baudclkapb_pclk€…txrx²defaultÀ0iokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê8™kNV2baudclkapb_pclk€…txrx²defaultÀ1iokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿi ê9™kOW2baudclkapb_pclk²defaultÀ2iokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê:™kPX2baudclkapb_pclk€…txrx²defaultÀ3iokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ÿ ê;™kQY2baudclkapb_pclk€  …txrx²defaultÀ4iokaydma-controller@ff250000arm,pl330arm,primecell/ÿ%@ꦱÌk 2apb_pclk˜thermal-zonesreserve-thermalãèùˆ5cpu-thermalãdùˆ5tripscpu_alert0p#Ð*passive˜6cpu_alert1$ø#Ð*passive˜7cpu_crit_#Ð *criticalcooling-mapsmap0.603ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1.703ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalãdùˆ5tripsgpu_alert0p#Ð*passive˜8gpu_crit_#Ð *criticalcooling-mapsmap0.8 39ÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3288-tsadc/ÿ( ê%kHZ2tsadcapb_pclk3Ÿ ]tsadc-apb²initdefaultsleepÀ:B;L:Vl<�ysiokay§˜5ethernet@ff290000rockchip,rk3288-gmac/ÿ)êÂmacirqeth_wake_irql<�8k—fgc˜Ä]M2stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B ]stmmacethiokayÒ—â=ùinputrgmii>²defaultÀ? @* @'B@U0^usb@ff500000 generic-ehci/ÿP êkÂgAlusbiokayusb@ff520000 generic-ohci/ÿR ê)kÂgAlusb idisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/ÿT êkÃ2otgvhostgB lusb2-phy~iokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/ÿX êkÁ2otgvotg•§¶€€@@ gC lusb2-phyiokayusb@ff5c0000 generic-ehci/ÿ\ êkÄ idisableddma-controller@ff600000arm,pl330arm,primecell/ÿ`@ꦱÌkÁ 2apb_pclk idisabledi2c@ff650000rockchip,rk3288-i2c/ÿe ê<�2i2ckL²defaultÀDiokayÇ€pmic@1brockchip,rk808/&Eêê×xin32krk808-clkout2ÅE E ²defaultÀFGHIÏðþJ JJ"J.J:JFR^kJx…˜„regulatorsDCDC_REG1’¦¸ q°Ð\Àèvdd_arm÷p˜ regulator-state-mem DCDC_REG2’¦¸ øPÐÐèvdd_gpu÷p˜zregulator-state-mem%=B@DCDC_REG3’¦èvcc_ddrregulator-state-mem%DCDC_REG4’¦¸2Z Ð2Z èvcc_io˜regulator-state-mem%=2Z LDO_REG1’¦¸w@Ðw@ èvcc18_ldo1˜regulator-state-mem%=w@LDO_REG2’¦¸2Z Ð2Z  èvcc33_mipiregulator-state-mem LDO_REG3’¦¸B@ÐB@èvdd_10regulator-state-mem%=B@LDO_REG4’¦¸w@Ðw@ èvcc18_codecregulator-state-mem%=w@LDO_REG5’¦¸w@Ð2Z  èvccio_sd˜regulator-state-mem%=2Z LDO_REG6’¦¸B@ÐB@ èvdd10_lcdregulator-state-mem%=B@LDO_REG7’¦¸w@Ðw@èvcc_18˜regulator-state-mem%=w@LDO_REG8’¦¸w@Ðw@ èvcc18_lcdregulator-state-mem%=w@SWITCH_REG1’¦ èvcc33_sd˜regulator-state-mem%SWITCH_REG2’¦ èvcc33_lan˜>regulator-state-mem%i2c@ff660000rockchip,rk3288-i2c/ÿf ê=2i2ckN²defaultÀKiokaypwm@ff680000rockchip,rk3288-pwm/ÿhY²defaultÀLk_iokaypwm@ff680010rockchip,rk3288-pwm/ÿhY²defaultÀMk_ idisabledpwm@ff680020rockchip,rk3288-pwm/ÿh Y²defaultÀNk_ idisabledpwm@ff680030rockchip,rk3288-pwm/ÿh0Y²defaultÀOk_ idisabledsram@ff700000 mmio-sram/ÿp€Àÿp€smp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/ÿrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/ÿs˜power-controller!rockchip,rk3288-power-controllerdÒhâ ˜apower-domain@9/ ÈkÊÍÈÌÅƾ¿ÔÕÖÙÑÒchgfdehilkj$xPQRSTUVWXdpower-domain@11/ kÏopxYZdpower-domain@12/ kÐÜx[dpower-domain@13/ kÀx\]dreboot-modesyscon-reboot-mode”†RBÃ’RBàRBà °RBÃsyscon@ff740000rockchip,rk3288-sgrfsyscon/ÿtclock-controller@ff760000rockchip,rk3288-cru/ÿvk 2xin24ml<�ê¼HÒÑÝjÒÞk$É#g¸€ׄÍeá£ðÑ€xhÀá£ðÑ€xhÀ˜syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/ÿw˜<�edp-phyrockchip,rk3288-dp-phykh224mÞ idisabled˜qio-domains"rockchip,rk3288-io-voltage-domainiokayé÷usbphyrockchip,rk3288-usb-phyiokayusb-phy@320Þ/ k]2phyclkê3… ]phy-reset˜Cusb-phy@334Þ/4k^2phyclkê3ˆ ]phy-reset˜Ausb-phy@348Þ/Hk_2phyclkê3‹ ]phy-reset˜Bwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/ÿ€kp êOiokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/ÿ‹kTÐ 2mclkhclk€^…tx ê6²defaultÀ_l<� idisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ÿ‰ ê5kRÎ2i2s_clki2s_hclk€^^…txrx²defaultÀ`/iokay˜‡crypto@ff8a0000rockchip,rk3288-crypto/ÿŠ@ ê0 kÇÍ}Á2aclkhclksclkapb_pclk3® ]crypto-rstiommu@ff900800rockchip,iommu/ÿ@ êkÊÔ 2aclkifaceI idisablediommu@ff914000rockchip,iommu /ÿ‘@ÿ‘P êkÍÕ 2aclkifaceIV idisabledrga@ff920000rockchip,rk3288-rga/ÿ’€ êkÈÖj2aclkhclksclkqa 3ilm ]coreaxiahbvop@ff930000rockchip,rk3288-vop /ÿ“œÿ“ êkžÑ2aclk_vopdclk_vophclk_vopqa 3def ]axiahbdclkbiokayport˜ endpoint@0/†c˜vendpoint@1/†d˜rendpoint@2/†e˜lendpoint@3/†f˜oiommu@ff930300rockchip,iommu/ÿ“ êkÅÑ 2aclkifaceqa Iiokay˜bvop@ff940000rockchip,rk3288-vop /ÿ”œÿ” êkÆ¿Ò2aclk_vopdclk_vophclk_vopqa 3°±² ]axiahbdclkgiokayport˜ endpoint@0/†h˜wendpoint@1/†i˜sendpoint@2/†j˜mendpoint@3/†k˜piommu@ff940300rockchip,iommu/ÿ” êkÆÒ 2aclkifaceqa Iiokay˜gdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/ÿ–@ êk~d 2refpclkqa l<� idisabledportsport@0/endpoint@0/†l˜eendpoint@1/†m˜jport@1/lvds@ff96c000rockchip,rk3288-lvds/ÿ–À@kg 2pclk_lvds²lcdcÀnqa l<� idisabledportsport@0/endpoint@0/†o˜fendpoint@1/†p˜kport@1/dp@ff970000rockchip,rk3288-dp/ÿ—@ êbkic2dppclkgqldpqa 3o]dpl<� idisabledportsport@0/endpoint@0/†r˜dendpoint@1/†s˜iport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/ÿ˜™ êgkhmn2iahbisfrcecqa l<�iokay–t²defaultÀu˜†portsport@0/endpoint@0/†v˜cendpoint@1/†w˜hport@1/video-codec@ff9a0000rockchip,rk3288-vpu/ÿšê   ÂvepuvdpukÐÜ 2aclkhclkxqa iommu@ff9a0800rockchip,iommu/ÿš ê kÐÜ 2aclkifaceIqa ˜xiommu@ff9c0440rockchip,iommu /ÿœ@@ÿœ€@ êokÏÛ 2aclkifaceI idisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/ÿ£$ê ÂjobmmugpukÀ:yNqa iokay¢z˜9opp-table-1operating-points-v2˜yopp-100000000«õá²~ðopp-200000000« ë²~ðopp-300000000«á£²B@opp-400000000«ׄ²Èàopp-600000000«#ÃF²Ðqos@ffaa0000rockchip,rk3288-qossyscon/ÿª ˜\qos@ffaa0080rockchip,rk3288-qossyscon/ÿª€ ˜]qos@ffad0000rockchip,rk3288-qossyscon/ÿ­ ˜Qqos@ffad0100rockchip,rk3288-qossyscon/ÿ­ ˜Rqos@ffad0180rockchip,rk3288-qossyscon/ÿ­€ ˜Sqos@ffad0400rockchip,rk3288-qossyscon/ÿ­ ˜Tqos@ffad0480rockchip,rk3288-qossyscon/ÿ­€ ˜Uqos@ffad0500rockchip,rk3288-qossyscon/ÿ­ ˜Pqos@ffad0800rockchip,rk3288-qossyscon/ÿ­ ˜Vqos@ffad0880rockchip,rk3288-qossyscon/ÿ­€ ˜Wqos@ffad0900rockchip,rk3288-qossyscon/ÿ­ ˜Xqos@ffae0000rockchip,rk3288-qossyscon/ÿ® ˜[qos@ffaf0000rockchip,rk3288-qossyscon/ÿ¯ ˜Yqos@ffaf0080rockchip,rk3288-qossyscon/ÿ¯€ ˜Zdma-controller@ffb20000arm,pl330arm,primecell/ÿ²@ꦱÌkÁ 2apb_pclk˜^efuse@ffb40000rockchip,rk3288-efuse/ÿ´ kq 2pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400®Ã@/ÿÀÿÀ ÿÀ@ ÿÀ`  ê ˜pinctrlrockchip,rk3288-pinctrll<�Àgpio@ff750000rockchip,gpio-bank/ÿu êQk@Ôä®Ã˜Egpio@ff780000rockchip,gpio-bank/ÿx êRkAÔä®Ã˜ƒgpio@ff790000rockchip,gpio-bank/ÿy êSkBÔä®Ãgpio@ff7a0000rockchip,gpio-bank/ÿz êTkCÔä®Ãgpio@ff7b0000rockchip,gpio-bank/ÿ{ êUkDÔä®Ã˜@gpio@ff7c0000rockchip,gpio-bank/ÿ| êVkEÔä®Ãgpio@ff7d0000rockchip,gpio-bank/ÿ} êWkFÔä®Ãgpio@ff7e0000rockchip,gpio-bank/ÿ~ êXkGÔä®Ã˜ˆgpio@ff7f0000rockchip,gpio-bank/ÿ êYkHÔä®Ãhdmihdmi-cec-c0ð{˜uhdmi-cec-c7ð{hdmi-ddc ð{{hdmi-ddc-unwedge ð|{pcfg-output-lowþ˜|pcfg-pull-up ˜}pcfg-pull-down ˜~pcfg-pull-none %˜{pcfg-pull-none-12ma % 2 ˜suspendglobal-pwroffð{˜Gddrio-pwroffð{ddr0-retentionð}ddr1-retentionð}edpedp-hpdð ~i2c0i2c0-xfer ð{{˜Di2c1i2c1-xfer ð{{˜,i2c2i2c2-xfer ð { {˜Ki2c3i2c3-xfer ð{{˜-i2c4i2c4-xfer ð{{˜.i2c5i2c5-xfer ð{{˜/i2s0i2s0-bus`ð{{{{{{˜`lcdclcdc-ctl@ð{{{{˜nsdmmcsdmmc-clkð˜ sdmmc-cmdð€˜sdmmc-cdð}˜sdmmc-bus1ð}sdmmc-bus4@ð€€€€˜sdmmc-pwrð {˜‰sdio0sdio0-bus1ð}sdio0-bus4@ð}}}}˜sdio0-cmdð}˜sdio0-clkð{˜sdio0-cdð}sdio0-wpð}sdio0-pwrð}sdio0-bkpwrð}sdio0-intð}˜sdio1sdio1-bus1ð}sdio1-bus4@ð}}}}sdio1-cdð}sdio1-wpð}sdio1-bkpwrð}sdio1-intð}sdio1-cmdð}sdio1-clkð{sdio1-pwrð }emmcemmc-clkð{˜emmc-cmdð}˜emmc-pwrð }˜emmc-bus1ð}emmc-bus4@ð}}}}emmc-bus8€ð}}}}}}}}˜spi0spi0-clkð }˜ spi0-cs0ð }˜#spi0-txð}˜!spi0-rxð}˜"spi0-cs1ð}spi1spi1-clkð }˜$spi1-cs0ð }˜'spi1-rxð}˜&spi1-txð}˜%spi2spi2-cs1ð}spi2-clkð}˜(spi2-cs0ð}˜+spi2-rxð}˜*spi2-txð }˜)uart0uart0-xfer ð}{˜0uart0-ctsð}uart0-rtsð{uart1uart1-xfer ð} {˜1uart1-ctsð }uart1-rtsð {uart2uart2-xfer ð}{˜2uart3uart3-xfer ð}{˜3uart3-ctsð }uart3-rtsð {uart4uart4-xfer ð}{˜4uart4-ctsð }uart4-rtsð {tsadcotp-pinð {˜:otp-outð {˜;pwm0pwm0-pinð{˜Lpwm1pwm1-pinð{˜Mpwm2pwm2-pinð{˜Npwm3pwm3-pinð{˜Ogmacrgmii-pinsðð{{{{{{{ {{˜?rmii-pins ð{{{{{{{{{{spdifspdif-txð {˜_pcfg-pull-none-drv-8ma 2˜pcfg-pull-up-drv-8ma  2˜€backlightbl-enð{buttonspwrbtnð}˜‚eth_phyeth-phy-pwrð{pmicpmic-intð}˜Fdvs-1ð ~˜Hdvs-2ð ~˜Iusbhost-vbus-drvð{pwr-3gð{sdiowifi-enable ð{{˜…chosen Aserial2:115200n8memory/€#memoryexternal-gmac-clock fixed-clockêÇsY@ ×ext_gmac˜=gpio-keys gpio-keys M²defaultÀ‚button ÉE Xt cGPIO Key Power ið zdgpio-leds gpio-ledsled-0 Ƀ Œmmc0led-1 Ƀ Œheartbeatled-2 ÉE Œdefault-onsdio-pwrseqmmc-pwrseq-simplek„ 2ext_clock²defaultÀ… ¢@@˜soundsimple-audio-card ®i2s Çrockchip,tinker-codec Þsimple-audio-card,codec ø†simple-audio-card,cpu ø‡vsys-regulatorregulator-fixedèvcc_sys¸LK@ÐLK@’¦˜Jsdmmc-regulatorregulator-fixed %ˆ ²defaultÀ‰èvcc_sd¸2Z Ð2Z  †   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50mmc-hs200-1_8vmmc-ddr-1_8v#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply