Ð þí^#8W(“WX.,rockchip,px3-evbrockchip,px3rockchip,rk31887Rockchip PX3-EVBaliases=/ethernet@10204000G/pinctrl/gpio@2000a000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000€/serial@10126000ˆ/serial@20064000/serial@20068000˜/spi@20070000/spi@20074000¢/mmc@10214000§/mmc@1021c000oscillator ,fixed-clock¬n6¼Éxin24mÜ8gpu@10090000",rockchip,rk3188-maliarm,mali-400ä èÅÅ ïbuscoreûÅ õá x 'disabledx. 59gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Ivideo-codec@10104000(,rockchip,rk3188-vpurockchip,rk3066-vpuä@.   9vepuvdpu èÎØÍ×(ïaclk_vdpuhclk_vdpuaclk_vepuhclk_vepuIcache-controller@10138000,arm,pl310-cacheä€WeÜ0scu@1013c000,arm,cortex-a9-scuäÀglobal-timer@1013c200,arm,cortex-a9-global-timerä  . è 'disabledlocal-timer@1013c600,arm,cortex-a9-twd-timeräÆ  . èinterrupt-controller@1013d000,arm,cortex-a9-gicq†äÐÁÜserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uartä@ ."—¡ïbaudclkapb_pclkè@L'okay®default¼serial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uartä` .#—¡ïbaudclkapb_pclkèAM'okay®default¼qos@1012d000,rockchip,rk3066-qossysconäÐ Üqos@1012e000,rockchip,rk3066-qossysconäà Üqos@1012f000,rockchip,rk3066-qossysconäð Üqos@1012f080,rockchip,rk3066-qossysconäð€ Üqos@1012f100,rockchip,rk3066-qossysconäñ Üqos@1012f180,rockchip,rk3066-qossysconäñ€ Üqos@1012f200,rockchip,rk3066-qossysconäò qos@1012f280,rockchip,rk3066-qossysconäò€ Üusb@10180000,rockchip,rk3066-usbsnps,dwc2ä .èÃïotgÆotgÎà@@ þ usb2-phy'okayusb@101c0000 ,snps,dwc2ä .èÉïotgÆhostþ usb2-phy'okayethernet@10204000,rockchip,rk3188-emacä @<� . èÄD ïhclkmacrefd$rmii 'disabledmmc@10214000,rockchip,rk2928-dw-mshcä!@ .èÀHïbiuciu- 2rx-tx<� QGreset'okay®default¼ S_i{Œmmc@10218000,rockchip,rk2928-dw-mshcä!€ .èÁIïbiuciu- 2rx-tx<� RGreset 'disabledmmc@1021c000,rockchip,rk2928-dw-mshcä!À .èÂJïbiuciu- 2rx-tx<� SGreset'okay_i—®default ¼nand-controller@10500000,rockchip,rk2928-nfcäP@ .èÓïahb 'disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdä @Ü9reboot-mode,syscon-reboot-mode¥@¬RBøRBÃÆRBà ÖRBÃpower-controller!,rockchip,rk3188-power-controllerâÜpower-domain@7ähèÃľ¿ÍÎOÊÐÈÑÉÒöâpower-domain@6ä èÎÍØ×öâpower-domain@8äèÅöâgrf@20008000&,rockchip,rk3188-grfsysconsimple-mfdä €Üio-domains",rockchip,rk3188-io-voltage-domain 'disabledusbphy,rockchip,rk3188-usb-phy'okayusb-phy@10cä èQïphyclk¼ýÜusb-phy@11cäèRïphyclk¼ýÜdma-controller@20018000,arm,pl330arm,primecellä €@..èÀ ïapb_pclkÜ6dma-controller@2001c000,arm,pl330arm,primecellä À@..èÀ ïapb_pclk 'disabledi2c@2002d000,rockchip,rk3188-i2cä Ð .( ïi2cèP'okay®default¼accelerometer@18 ,bosch,bma250ä.i2c@2002f000,rockchip,rk3188-i2cä ð .) èQïi2c'okay®default¼¬€pmic@1c,rockchip,rk818ä. Ef¼Éxin32krk808-clkout2t€Œ˜¤°¼ÈregulatorsDCDC_REG1Ôèú q°™p*vdd_armÜ2regulator-state-mem9DCDC_REG2Ôèú øPÐ*vdd_gpuregulator-state-memRjB@DCDC_REG3Ôè*vcc_ddrregulator-state-memRDCDC_REG4Ôèú2Z 2Z *vcc_ioÜregulator-state-memRj2Z LDO_REG1ú2Z 2Z *vcc_cifLDO_REG2Ôèú2Z 2Z  *vcc_jetta33LDO_REG3ÔèúB@B@*vdd_10regulator-state-memRjB@LDO_REG4úw@w@*lvds_12LDO_REG5úw@2Z *lvds_25LDO_REG6úB@B@*cif_18LDO_REG7úw@2Z *vcc_sdÜregulator-state-memRj2Z LDO_REG8úw@2Z *wl_18SWITCH_REG*lcd_33pwm@20030000,rockchip,rk2928-pwmä †èF 'disabled®default¼pwm@20030010,rockchip,rk2928-pwmä †èF'okay®default¼watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdtä ÀèK .3'okaypwm@20050020,rockchip,rk2928-pwmä  †èG'okay®default¼ pwm@20050030,rockchip,rk2928-pwmä 0†èG'okay®default¼!i2c@20056000,rockchip,rk3188-i2cä ` .* èRïi2c 'disabled®default¼"touchscreen@40,silead,gsl1680ä@#. ‘ °Ãi2c@2005a000,rockchip,rk3188-i2cä   .+ èSïi2c 'disabled®default¼$i2c@2005e000,rockchip,rk3188-i2cä à .4 èTïi2c 'disabled®default¼%serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uartä @ .$—¡ïbaudclkapb_pclkèBN'okay®default¼&serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uartä € .%—¡ïbaudclkapb_pclkèCO'okay®default¼'saradc@2006c000,rockchip,saradcä À .ÖèGJïsaradcapb_pclk W Gsaradc-apb 'disabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spièEHïspiclkapb_pclk .&ä - 2txrx 'disabled®default¼()*+spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spièFIïspiclkapb_pclk .'ä @- 2txrx 'disabled®default¼,-./dma-controller@20078000,arm,pl330arm,primecellä €@..èÁ ïapb_pclkÜ cpusèrockchip,rk3066-smpcpu@0öcpu,arm,cortex-a90äœ@è!1 52cpu@1öcpu,arm,cortex-a90ä!1 52cpu@2öcpu,arm,cortex-a90ä!1 52cpu@3öcpu,arm,cortex-a90ä!1 52opp-table-0,operating-points-v2@Ü1opp-312000000K˜¾R Yø`œ@opp-504000000K nRHopp-600000000K#ÃFR~ðqopp-816000000K0£,Rà˜opp-1008000000K<ÜRg8opp-1200000000KG†ŒRŒ0opp-1416000000KTfrRÐopp-1608000000K_Ø"R™pdisplay-subsystem,rockchip,display-subsystem}34sram@10080000 ,mmio-sramä€ ƒ€smp-sram@0,rockchip,rk3066-smp-sramäPvop@1010c000,rockchip,rk3188-vopäÀ . èþÍïaclk_vopdclk_vophclk_vopI def Gaxiahbdclk 'disabledportÜ3vop@1010e000,rockchip,rk3188-vopäà .èÄ¿Îïaclk_vopdclk_vophclk_vopI ghi Gaxiahbdclk 'disabledportÜ4timer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timerä à  ..èEW ïpclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timerä €   .@èBZ ïpclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2sä   . ®default¼5èKÆïi2s_clki2s_hclk-662txrxŠ¥¿ 'disabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdifäà ¿èNÅ ïmclkhclk-62tx . ®default¼7 'disabledclock-controller@20000000,rockchip,rk3188-cruä è8ïxin24m ¼ÐÜefuse@20010000,rockchip,rk3188-efuseä @è[ ïpclk_efusecpu_leakage@17äpinctrl,rockchip,rk3188-pinctrl Ý9ƒgpio@2000a000,rockchip,rk3188-gpio-bank0ä   .6èUêúq†Ügpio@2003c000,rockchip,gpio-bankä À .7èVêúq†Ü#gpio@2003e000,rockchip,gpio-bankä à .8èWêúq†gpio@20080000,rockchip,gpio-bankä  .9èXêúq†pcfg-pull-upÜ;pcfg-pull-downpcfg-pull-none"Ü:emmcemmc-clk/:Üemmc-cmd/;Üemmc-rst/:Üemacemac-xfer€/::::::::emac-mdio /::i2c0i2c0-xfer /::Üi2c1i2c1-xfer /::Üi2c2i2c2-xfer /::Ü"i2c3i2c3-xfer /::Ü$i2c4i2c4-xfer /::Ü%lcdc1lcdc1-dclk/:lcdc1-den/:lcdc1-hsync/:lcdc1-vsync/:lcdc1-rgb24€/::::::::: : : : : :::::::::::pwm0pwm0-out/:Üpwm1pwm1-out/:Üpwm2pwm2-out/:Ü pwm3pwm3-out/:Ü!spi0spi0-clk/;Ü(spi0-cs0/;Ü+spi0-tx/;Ü)spi0-rx/;Ü*spi0-cs1/;spi1spi1-clk/;Ü,spi1-cs0/;Ü/spi1-rx/;Ü.spi1-tx/;Ü-spi1-cs1/;uart0uart0-xfer /;:Üuart0-cts/:uart0-rts/:uart1uart1-xfer /;:Üuart1-cts/:uart1-rts/:uart2uart2-xfer /; :Ü&uart3uart3-xfer / ; :Ü'uart3-cts/ :uart3-rts/ :sd0sd0-clk/:Ü sd0-cmd/:Ü sd0-cd/:Ü sd0-wp/ :sd0-pwr/:sd0-bus-width1/:sd0-bus-width4@/::::Ü sd1sd1-clk/:sd1-cmd/:sd1-cd/:sd1-wp/:sd1-bus-width1/:sd1-bus-width4@/::::i2s0i2s0-bus`/::::::Ü5spdifspdif-tx/:Ü7pcfg-output-low=usbhost-vbus-drv/:otg-vbus-drv/:chosenHserial2:115200n8memory@60000000ä`€ömemorygpio-keys ,gpio-keysTkey-power —_tjGPIO Key Powerpfdvsys-regulator,regulator-fixed*vsysúLK@LK@èÜ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modedmasdma-namesfifo-depthreset-namesvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellspower-gpiostouchscreen-size-xtouchscreen-size-ysilead,max-fingers#io-channel-cellsenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrangesrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-interval