Ð þí_¹8ZX(aZ (,haoyu,marsboard-rk3066rockchip,rk3066a7MarsBoard RK3066aliases=/ethernet@10204000G/pinctrl/gpio@20034000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000€/serial@10126000ˆ/serial@20064000/serial@20068000˜/spi@20070000/spi@20074000¢/pinctrl/gpio@20084000¨/pinctrl/gpio@2000a000®/mmc@10214000oscillator ,fixed-clock³n6ÃÐxin24mãEgpu@10090000",rockchip,rk3066-maliarm,mali-400ë ïÅÅ öbuscoreÅõá'x .disabledx55@gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Pvideo-codec@10104000,rockchip,rk3066-vpuë@5   @vepuvdpu ïÎØÍ×(öaclk_vdpuhclk_vdpuaclk_vepuhclk_vepuPcache-controller@10138000,arm,pl310-cacheë€^lã8scu@1013c000,arm,cortex-a9-scuëÀglobal-timer@1013c200,arm,cortex-a9-global-timerë  5 ï .disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerëÆ  5 ïinterrupt-controller@1013d000,arm,cortex-a9-gicxëÐÁãserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartë@ 5"ž¨öbaudclkapb_pclkï@L.okayµºtxrxÄdefaultÒserial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartë` 5#ž¨öbaudclkapb_pclkïAM.okayµºtxrxÄdefaultÒqos@1012d000,rockchip,rk3066-qossysconëÐ ã!qos@1012e000,rockchip,rk3066-qossysconëà ã qos@1012f000,rockchip,rk3066-qossysconëð ãqos@1012f080,rockchip,rk3066-qossysconëð€ ãqos@1012f100,rockchip,rk3066-qossysconëñ ãqos@1012f180,rockchip,rk3066-qossysconëñ€ ãqos@1012f200,rockchip,rk3066-qossysconëò ãqos@1012f280,rockchip,rk3066-qossysconëò€ ãusb@10180000,rockchip,rk3066-usbsnps,dwc2ë 5ïÃöotgÜotgäö€€@@  usb2-phy.okayusb@101c0000 ,snps,dwc2ë 5ïÉöotgÜhost usb2-phy.okayethernet@10204000,rockchip,rk3066-emacë @<� 5# ïÄD öhclkmacref0d:rmii.okayC G Ädefault Ò mdioethernet-phy@0ë5ã mmc@10214000,rockchip,rk2928-dw-mshcë!@ 5ïÀHöbiuciuµºrx-txR'Q]reset.okay³úð€iúð€ÄdefaultÒwmmc@10218000,rockchip,rk2928-dw-mshcë!€ 5ïÁIöbiuciuµºrx-txR'R]reset .disabledÄdefaultÒmmc@1021c000,rockchip,rk2928-dw-mshcë!À 5ïÂJöbiuciuµºrx-txR'S]reset .disablednand-controller@10500000,rockchip,rk2928-nfcëP@ 5ïÓöahb .disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdë @reboot-mode,syscon-reboot-modeƒ@ŠRBÖRBäRBà ´RBÃpower-controller!,rockchip,rk3066-power-controllerÀãpower-domain@7ëˆïÃľ¿ÍÎPÇÖOÊÐÙÈÑÉÒÔÀpower-domain@6ë ïÎÍØ×Ô Àpower-domain@8ëïÅÔ!Àgrf@20008000&,rockchip,rk3066-grfsysconsimple-mfdë €ã usbphy,rockchip,rk3066a-usb-phy.okayusb-phy@17cë|ïQöphyclkÃÛãusb-phy@188ëˆïRöphyclkÃÛãdma-controller@20018000,arm,pl330arm,primecellë €@5æñ ïÀ öapb_pclkãdma-controller@2001c000,arm,pl330arm,primecellë À@5æñ ïÀ öapb_pclk .disabledi2c@2002d000,rockchip,rk3066-i2cë Ð 5(# öi2cïP .disabledÄdefaultÒ"i2c@2002f000,rockchip,rk3066-i2cë ð 5)# ïQöi2c.okayÄdefaultÒ#³€tps@2dë-$5#%/%;%G%S&_&k%w% ,ti,tps65910regulatorsregulator@0„vcc_rtc“ë§vrtcregulator@1„vcc_io“ë§vioã&regulator@2„vdd_arm¼ 'ÀÔã`ì“ë§vdd1ã9regulator@3„vcc_ddr¼ 'ÀÔã`ì“ë§vdd2regulator@5 „vcc18_cif“ë§vdig1regulator@6„vdd_11“ë§vdig2regulator@7„vcc_25“ë§vpllregulator@8„vcc_18“ë§vdacregulator@9 „vcc25_hdmi“ë §vaux1regulator@10„vcca_33“ë §vaux2regulator@11 „vcc_rmiië §vaux33ã regulator@12 „vcc28_cif“ë §vmmcregulator@4ë§vdd3regulator@13ë §vbbpwm@20030000,rockchip,rk2928-pwmë þïF .disabledÄdefaultÒ'pwm@20030010,rockchip,rk2928-pwmë þïF .disabledÄdefaultÒ(watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdtë ÀïK 53.okaypwm@20050020,rockchip,rk2928-pwmë  þïG .disabledÄdefaultÒ)pwm@20050030,rockchip,rk2928-pwmë 0þïG.okayÄdefaultÒ*ãHi2c@20056000,rockchip,rk3066-i2cë ` 5*# ïRöi2c .disabledÄdefaultÒ+i2c@2005a000,rockchip,rk3066-i2cë   5+# ïSöi2c .disabledÄdefaultÒ,i2c@2005e000,rockchip,rk3066-i2cë à 54# ïTöi2c .disabledÄdefaultÒ-serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartë @ 5$ž¨öbaudclkapb_pclkïBN.okayµºtxrxÄdefaultÒ.serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartë € 5%ž¨öbaudclkapb_pclkïCO.okayµ ºtxrxÄdefaultÒ/saradc@2006c000,rockchip,saradcë À 5 ïGJösaradcapb_pclk'W ]saradc-apb .disabledspi@20070000,rockchip,rk3066-spiïEHöspiclkapb_pclk 5&ë µ  ºtxrx .disabledÄdefaultÒ0123spi@20074000,rockchip,rk3066-spiïFIöspiclkapb_pclk 5'ë @µ  ºtxrx .disabledÄdefaultÒ4567dma-controller@20078000,arm,pl330arm,primecellë €@5æñ ïÁ öapb_pclkãcpusrockchip,rk3066-smpcpu@0)cpu,arm,cortex-a958ë8F›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8Wœ@ïe9cpu@1)cpu,arm,cortex-a958ëe9display-subsystem,rockchip,display-subsystemp:;sram@10080000 ,mmio-sramë vsmp-sram@0,rockchip,rk3066-smp-sramëPvop@1010c000,rockchip,rk3066-vopëÀœ 5 ïþÍöaclk_vopdclk_vophclk_vopP'def ]axiahbdclk .disabledportã:endpoint@0ë}<�ã@vop@1010e000,rockchip,rk3066-vopëàœ 5ïÄ¿Îöaclk_vopdclk_vophclk_vopP'ghi ]axiahbdclk .disabledportã;endpoint@0ë}=ãAhdmi@10116000,rockchip,rk3066-hdmië`  5@ïÙöhclkÄdefaultÒ>?P#  .disabledportsport@0ëendpoint@0ë}@ã<�endpoint@1ë}Aã=port@1ëi2s@10118000,rockchip,rk3066-i2së€  5ÄdefaultÒBïKÆöi2s_clki2s_hclkµºtxrxž¹ .disabledi2s@1011a000,rockchip,rk3066-i2së   5 ÄdefaultÒCïLÇöi2s_clki2s_hclkµºtxrxž¹ .disabledi2s@1011c000,rockchip,rk3066-i2sëÀ  5ÄdefaultÒDïMÈöi2s_clki2s_hclkµ  ºtxrxž¹ .disabledclock-controller@20000000,rockchip,rk3066a-cruë ïEöxin24m# ÃÓ@ËÔ^ÌÕ_ ׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀãtimer@2000e000,snps,dw-apb-timerë à 5.ïVD ötimerpclkefuse@20010000,rockchip,rk3066a-efuseë @ï[ öpclk_efusecpu_leakage@17ëtimer@20038000,snps,dw-apb-timerë € 5,ïTB ötimerpclktimer@2003a000,snps,dw-apb-timerë   5-ïUC ötimerpclktsadc@20060000,rockchip,rk3066-tsadcë ï]]ösaradcapb_pclk 5 '\ ]saradc-apb .disabledpinctrl,rockchip,rk3066a-pinctrl# vgpio@20034000,rockchip,gpio-bankë @ 56ïUàðxgpio@2003c000,rockchip,gpio-bankë À 57ïVàðxãgpio@2003e000,rockchip,gpio-bankë à 58ïWàðxgpio@20080000,rockchip,gpio-bankë  59ïXàðxãIgpio@20084000,rockchip,gpio-bankë @ 5:ïYàðxgpio@2000a000,rockchip,gpio-bankë   5<�ïZàðxã$pcfg-pull-defaultüãGpcfg-pull-noneãFemacemac-xfer€FFFFFFFFã emac-mdio FFã emmcemmc-clkGemmc-cmd Gemmc-rst Ghdmihdmi-hpdGã?hdmii2c-xfer FFã>i2c0i2c0-xfer FFã"i2c1i2c1-xfer FFã#i2c2i2c2-xfer FFã+i2c3i2c3-xfer FFã,i2c4i2c4-xfer FFã-pwm0pwm0-outFã'pwm1pwm1-outFã(pwm2pwm2-outFã)pwm3pwm3-outFã*spi0spi0-clkGã0spi0-cs0Gã3spi0-txGã1spi0-rxGã2spi0-cs1Gspi1spi1-clkGã4spi1-cs0Gã7spi1-rxGã6spi1-txGã5spi1-cs1Guart0uart0-xfer GGãuart0-ctsGuart0-rtsGuart1uart1-xfer GGãuart1-ctsGuart1-rtsGuart2uart2-xfer G Gã.uart3uart3-xfer GGã/uart3-ctsGuart3-rtsGsd0sd0-clkGãsd0-cmd Gãsd0-cdGãsd0-wpGsd0-bus-width1 Gsd0-bus-width4@ G G G Gãsd1sd1-clkGãsd1-cmdGãsd1-cdGãsd1-wpGsd1-bus-width1Gsd1-bus-width4@GGGGãi2s0i2s0-busGG G G G G GGGãBi2s1i2s1-bus`GGGGGGãCi2s2i2s2-bus`GGGGGGãDlan8720aphy-intFãmemory@60000000)memoryë`@vdd-log,pwm-regulator -Hè„vdd_log¼O€ÔO€“2B@dO€*.okaysdmmc-regulator,regulator-fixed „sdmmc-supply¼-ÆÀÔ-ÆÀ @IE† V&ãvsys-regulator,regulator-fixed„vsys¼LK@ÔLK@ìã% #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1gpio4gpio6mmc0clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyfifo-depthreset-namesmax-frequencyvmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supply