Ð þí__8Y¸(§Y€',mundoreader,bq-curie2rockchip,rk3066a 7bq Curie 2aliases=/ethernet@10204000G/pinctrl/gpio@20034000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000€/serial@10126000ˆ/serial@20064000/serial@20068000˜/spi@20070000/spi@20074000¢/pinctrl/gpio@20084000¨/pinctrl/gpio@2000a000®/mmc@10214000³/mmc@10218000oscillator ,fixed-clock¸n6ÈÕxin24mè=gpu@10090000",rockchip,rk3066-maliarm,mali-400ð ôÅÅ ûbuscoreÅõá,x 3disabledx:5Egpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Uvideo-codec@10104000,rockchip,rk3066-vpuð@:   Evepuvdpu ôÎØÍ×(ûaclk_vdpuhclk_vdpuaclk_vepuhclk_vepuUcache-controller@10138000,arm,pl310-cacheð€cqè0scu@1013c000,arm,cortex-a9-scuðÀglobal-timer@1013c200,arm,cortex-a9-global-timerð  : ô 3disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerðÆ  : ôinterrupt-controller@1013d000,arm,cortex-a9-gic}’ðÐÁèserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartð@ :"£­ûbaudclkapb_pclkô@L3okayº¿txrxÉdefault×serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartð` :#£­ûbaudclkapb_pclkôAM3okayº¿txrxÉdefault×qos@1012d000,rockchip,rk3066-qossysconðÐ èqos@1012e000,rockchip,rk3066-qossysconðà èqos@1012f000,rockchip,rk3066-qossysconðð èqos@1012f080,rockchip,rk3066-qossysconðð€ èqos@1012f100,rockchip,rk3066-qossysconðñ èqos@1012f180,rockchip,rk3066-qossysconðñ€ èqos@1012f200,rockchip,rk3066-qossysconðò èqos@1012f280,rockchip,rk3066-qossysconðò€ èusb@10180000,rockchip,rk3066-usbsnps,dwc2ð :ôÃûotgáotgéû €€@@  usb2-phy 3disabledusb@101c0000 ,snps,dwc2ð :ôÉûotgáhost usb2-phy 3disabledethernet@10204000,rockchip,rk3066-emacð @<� :( ôÄD ûhclkmacref5d?rmii 3disabledmmc@10214000,rockchip,rk2928-dw-mshcð!@ :ôÀHûbiuciuº ¿rx-txH,QSreset3okay¸úð€_úð€Édefault× myƒ•¦mmc@10218000,rockchip,rk2928-dw-mshcð!€ :ôÁIûbiuciuº ¿rx-txH,RSreset3okayÉdefault ×±ymmc@1021c000,rockchip,rk2928-dw-mshcð!À :ôÂJûbiuciuº ¿rx-txH,SSreset 3disablednand-controller@10500000,rockchip,rk2928-nfcðP@ :ôÓûahb 3disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdð @reboot-mode,syscon-reboot-mode¿@ÆRBÃÒRBÃàRBà ðRBÃpower-controller!,rockchip,rk3066-power-controllerüèpower-domain@7ðˆôÃľ¿ÍÎPÇÖOÊÐÙÈÑÉÒüpower-domain@6ð ôÎÍØ×üpower-domain@8ðôÅügrf@20008000&,rockchip,rk3066-grfsysconsimple-mfdð €è usbphy,rockchip,rk3066a-usb-phy 3disabledusb-phy@17cð|ôQûphyclkÈèusb-phy@188ðˆôRûphyclkÈèdma-controller@20018000,arm,pl330arm,primecellð €@:"-HôÀ ûapb_pclkèdma-controller@2001c000,arm,pl330arm,primecellð À@:"-HôÀ ûapb_pclk 3disabledi2c@2002d000,rockchip,rk3066-i2cð Ð :(( ûi2côP 3disabledÉdefault×i2c@2002f000,rockchip,rk3066-i2cð ð :)( ôQûi2c3okayÉdefault׸€tps@2dð-:_k ,ti,tps65910regulatorsregulator@0wvcc_rtc†ðšvrtcregulator@1wvcc_io†ðšvioèregulator@2wvdd_arm¯ 'ÀÇã`߆ðšvdd1è1regulator@3wvcc_ddr¯ 'ÀÇã`߆ðšvdd2regulator@5 wvcc18_cif†ðšvdig1regulator@6wvdd_11†ðšvdig2regulator@7wvcc_25†ðšvpllregulator@8wvcc_18†ðšvdacregulator@9 wvcc25_hdmi†ð švaux1regulator@10wvcca_33†ð švaux2regulator@11wvcc_tp†ð švaux33regulator@12 wvcc28_cif†ð švmmcregulator@4ðšvdd3regulator@13ð švbbpwm@20030000,rockchip,rk2928-pwmð ñôF 3disabledÉdefault×pwm@20030010,rockchip,rk2928-pwmð ñôF 3disabledÉdefault× watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdtð ÀôK :33okaypwm@20050020,rockchip,rk2928-pwmð  ñôG 3disabledÉdefault×!pwm@20050030,rockchip,rk2928-pwmð 0ñôG3okayÉdefault×"è@i2c@20056000,rockchip,rk3066-i2cð ` :*( ôRûi2c 3disabledÉdefault×#i2c@2005a000,rockchip,rk3066-i2cð   :+( ôSûi2c 3disabledÉdefault×$i2c@2005e000,rockchip,rk3066-i2cð à :4( ôTûi2c 3disabledÉdefault×%serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartð @ :$£­ûbaudclkapb_pclkôBN3okayº  ¿txrxÉdefault×&serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartð € :%£­ûbaudclkapb_pclkôCO3okayº  ¿txrxÉdefault×'saradc@2006c000,rockchip,saradcð À :üôGJûsaradcapb_pclk,W Ssaradc-apb 3disabledspi@20070000,rockchip,rk3066-spiôEHûspiclkapb_pclk :&ð º ¿txrx 3disabledÉdefault×()*+spi@20074000,rockchip,rk3066-spiôFIûspiclkapb_pclk :'ð @º ¿txrx 3disabledÉdefault×,-./dma-controller@20078000,arm,pl330arm,primecellð €@:"-HôÁ ûapb_pclkè cpusrockchip,rk3066-smpcpu@0cpu,arm,cortex-a9(0ð89›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8Jœ@ôX1cpu@1cpu,arm,cortex-a9(0ðX1display-subsystem,rockchip,display-subsystemc23sram@10080000 ,mmio-sramð ismp-sram@0,rockchip,rk3066-smp-sramðPvop@1010c000,rockchip,rk3066-vopðÀœ : ôþÍûaclk_vopdclk_vophclk_vopU,def Saxiahbdclk 3disabledportè2endpoint@0ðp4è8vop@1010e000,rockchip,rk3066-vopðàœ :ôÄ¿Îûaclk_vopdclk_vophclk_vopU,ghi Saxiahbdclk 3disabledportè3endpoint@0ðp5è9hdmi@10116000,rockchip,rk3066-hdmið`  :@ôÙûhclkÉdefault×67U( € 3disabledportsport@0ðendpoint@0ðp8è4endpoint@1ðp9è5port@1ði2s@10118000,rockchip,rk3066-i2sð€  :Édefault×:ôKÆûi2s_clki2s_hclkº¿txrx‘¬€ 3disabledi2s@1011a000,rockchip,rk3066-i2sð   : Édefault×;ôLÇûi2s_clki2s_hclkº¿txrx‘¬€ 3disabledi2s@1011c000,rockchip,rk3066-i2sðÀ  :Édefault×<�ôMÈûi2s_clki2s_hclkº  ¿txrx‘¬€ 3disabledclock-controller@20000000,rockchip,rk3066a-cruð ô=ûxin24m( ÈÆ@ËÔ^ÌÕ_ ׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀètimer@2000e000,snps,dw-apb-timerð à :.ôVD ûtimerpclkefuse@20010000,rockchip,rk3066a-efuseð @ô[ ûpclk_efusecpu_leakage@17ðtimer@20038000,snps,dw-apb-timerð € :,ôTB ûtimerpclktimer@2003a000,snps,dw-apb-timerð   :-ôUC ûtimerpclktsadc@20060000,rockchip,rk3066-tsadcð ô]]ûsaradcapb_pclk :ü,\ Ssaradc-apb 3disabledpinctrl,rockchip,rk3066a-pinctrl( igpio@20034000,rockchip,gpio-bankð @ :6ôUÓã}’gpio@2003c000,rockchip,gpio-bankð À :7ôVÓã}’gpio@2003e000,rockchip,gpio-bankð à :8ôWÓã}’gpio@20080000,rockchip,gpio-bankð  :9ôXÓã}’èAgpio@20084000,rockchip,gpio-bankð @ ::ôYÓã}’èBgpio@2000a000,rockchip,gpio-bankð   :<�ôZÓã}’èpcfg-pull-defaultïè?pcfg-pull-noneè>emacemac-xfer€>>>>>>>>emac-mdio >>emmcemmc-clk?emmc-cmd ?emmc-rst ?hdmihdmi-hpd?è7hdmii2c-xfer >>è6i2c0i2c0-xfer >>èi2c1i2c1-xfer >>èi2c2i2c2-xfer >>è#i2c3i2c3-xfer >>è$i2c4i2c4-xfer >>è%pwm0pwm0-out>èpwm1pwm1-out>è pwm2pwm2-out>è!pwm3pwm3-out>è"spi0spi0-clk?è(spi0-cs0?è+spi0-tx?è)spi0-rx?è*spi0-cs1?spi1spi1-clk?è,spi1-cs0?è/spi1-rx?è.spi1-tx?è-spi1-cs1?uart0uart0-xfer ??èuart0-cts?uart0-rts?uart1uart1-xfer ??èuart1-cts?uart1-rts?uart2uart2-xfer ? ?è&uart3uart3-xfer ??è'uart3-cts?uart3-rts?sd0sd0-clk?è sd0-cmd ?è sd0-cd?è sd0-wp?sd0-bus-width1 ?sd0-bus-width4@ ? ? ? ?èsd1sd1-clk?èsd1-cmd?èsd1-cd?sd1-wp?sd1-bus-width1?sd1-bus-width4@????èi2s0i2s0-bus?? ? ? ? ? ???è:i2s1i2s1-bus`??????è;i2s2i2s2-bus`??????è<�memory@60000000memoryð`@vdd-log,pwm-regulator  @èwvdd_log¯O€ÇO€†%B@dO€*3okayfixed-regulator,regulator-fixed wsdmmc-supply¯-ÆÀÇ-ÆÀ 3A8† Iègpio-keys ,gpio-keysTkey-power _etpGPIO Key Powerv‡•dkey-volume-down _BerpGPIO Key Vol-v•d #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1gpio4gpio6mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modefifo-depthreset-namesmax-frequencyvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supplyautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-interval