Ð þíuÆ8j( 6jX"ti,omap4-sdpti,omap4430ti,omap4 +7TI OMAP4 SDP boardchosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?V/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bj/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B‚/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 Š/ocp/dsp‘/ocp/ipu@55020000G˜/ocp/target-module@58000000/dss@0/target-module@4000/encoder@0/panel@0G¡/ocp/target-module@58000000/dss@0/target-module@5000/encoder@0/panel@0 ª/connectorcpus+cpu@0arm,cortex-a9³cpu¿ÐÔÛcpuç“à õ“à£è 'ÀO€ 5èa€û²cpu@1arm,cortex-a9³cpu¿Ðsram@40304000 mmio-sramÐ@0@ Žinterrupt-controller@48241000arm,cortex-a9-gic2ÐH$H$ cache-controller@48242000arm,pl310-cacheÐH$ CQlocal-timer@48240600arm,cortex-a9-twd-timerÔÐH$  ]  interrupt-controller@48281000ti,omap4-wugen-mpu2ÐH( ocpsimple-pm-bush$Ô +vl3-noc@44000000ti,omap4-l3-nocÐDD€ E]  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-bush  Ô ÛfckÐJ0J0J0 }aplaia0+$vJ0J1J2segment@0simple-pm-bus+„v`` €€  °°@@PPÀÀÐÐtarget-module@4000ti,sysc-omap2ti,syscÐ@@ }revsysc‡ Ô 0Ûfck+ v@counter@0ti,omap-counter32kÐ target-module@6000ti,sysc-omap4ti,syscÐ`}rev+ v` prm@0ti,omap4-prmsimple-busÐ  ] + v clocks+sys_clkin_ck@110• ti,mux-clock ¢sys_clkin_ckÔ Ðµabe_dpll_bypass_clk_mux_ck@108• ti,mux-clock¢abe_dpll_bypass_clk_mux_ckÔÌÐ9abe_dpll_refclk_mux_ck@10c• ti,mux-clock¢abe_dpll_refclk_mux_ckÔÐ 8dbgclk_mux_ck•fixed-factor-clock¢dbgclk_mux_ckÔÙäl4_wkup_clk_mux_ck@108• ti,mux-clock¢l4_wkup_clk_mux_ckÔÐsyc_clk_div_ck@100•ti,divider-clock¢syc_clk_div_ckÔÐî•usim_ck@1858•ti,divider-clock¢usim_ckÔÌÐXùusim_fclk@1858•ti,gate-clock ¢usim_fclkÔÌÐXtrace_clk_div_ck•ti,clkdm-gate-clock¢trace_clk_div_ck Ôbandgap_fclk@1888•ti,gate-clock ¢bandgap_fclkÔÌЈclockdomainsemu_sys_clkdmti,clockdomain¢emu_sys_clkdmÔl4_wkup_cm@1800 ti,omap4-cm ¢l4_wkup_cmÐ+ vclk@20 ti,clkctrl¢l4_wkup_clkctrlÐ \• emu_sys_cm@1a00 ti,omap4-cm ¢emu_sys_cmÐ+ vclk@20 ti,clkctrl¢emu_sys_clkctrlÐ •prm@300#ti,omap4-prm-instti,omap-prm-instÐŒprm@400#ti,omap4-prm-instti,omap-prm-instÐcprm@500#ti,omap4-prm-instti,omap-prm-instЏprm@600#ti,omap4-prm-instti,omap-prm-instÐprm@700#ti,omap4-prm-instti,omap-prm-instÐ4prm@f00#ti,omap4-prm-instti,omap-prm-instЭprm@1000#ti,omap4-prm-instti,omap-prm-instЖprm@1100#ti,omap4-prm-instti,omap-prm-instÐ@¤prm@1200#ti,omap4-prm-instti,omap-prm-instСprm@1300#ti,omap4-prm-instti,omap-prm-instÐprm@1400#ti,omap4-prm-instti,omap-prm-instÐprm@1600#ti,omap4-prm-instti,omap-prm-instÐprm@1700#ti,omap4-prm-instti,omap-prm-instÐ prm@1900#ti,omap4-prm-instti,omap-prm-instЗprm@1b00#ti,omap4-prm-instti,omap-prm-instÐ@target-module@a000ti,sysc-omap4ti,syscР}rev+ v scrm@0ti,omap4-scrmÐ clocks+auxclk0_src_gate_ck@310• ti,composite-no-wait-gate-clock¢auxclk0_src_gate_ckÔÌÐauxclk0_src_mux_ck@310•ti,composite-mux-clock¢auxclk0_src_mux_ck ÔÌÐauxclk0_src_ck•ti,composite-clock¢auxclk0_src_ckÔauxclk0_ck@310•ti,divider-clock ¢auxclk0_ckÔÌîÐ.auxclk1_src_gate_ck@314• ti,composite-no-wait-gate-clock¢auxclk1_src_gate_ckÔÌÐauxclk1_src_mux_ck@314•ti,composite-mux-clock¢auxclk1_src_mux_ck ÔÌÐ auxclk1_src_ck•ti,composite-clock¢auxclk1_src_ckÔ !auxclk1_ck@314•ti,divider-clock ¢auxclk1_ckÔ!ÌîÐ/auxclk2_src_gate_ck@318• ti,composite-no-wait-gate-clock¢auxclk2_src_gate_ckÔÌÐ"auxclk2_src_mux_ck@318•ti,composite-mux-clock¢auxclk2_src_mux_ck ÔÌÐ#auxclk2_src_ck•ti,composite-clock¢auxclk2_src_ckÔ"#$auxclk2_ck@318•ti,divider-clock ¢auxclk2_ckÔ$ÌîÐ0auxclk3_src_gate_ck@31c• ti,composite-no-wait-gate-clock¢auxclk3_src_gate_ckÔÌÐ%auxclk3_src_mux_ck@31c•ti,composite-mux-clock¢auxclk3_src_mux_ck ÔÌÐ&auxclk3_src_ck•ti,composite-clock¢auxclk3_src_ckÔ%&'auxclk3_ck@31c•ti,divider-clock ¢auxclk3_ckÔ'ÌîÐ1auxclk4_src_gate_ck@320• ti,composite-no-wait-gate-clock¢auxclk4_src_gate_ckÔÌÐ (auxclk4_src_mux_ck@320•ti,composite-mux-clock¢auxclk4_src_mux_ck ÔÌÐ )auxclk4_src_ck•ti,composite-clock¢auxclk4_src_ckÔ()*auxclk4_ck@320•ti,divider-clock ¢auxclk4_ckÔ*ÌîÐ 2auxclk5_src_gate_ck@324• ti,composite-no-wait-gate-clock¢auxclk5_src_gate_ckÔÌÐ$+auxclk5_src_mux_ck@324•ti,composite-mux-clock¢auxclk5_src_mux_ck ÔÌÐ$,auxclk5_src_ck•ti,composite-clock¢auxclk5_src_ckÔ+,-auxclk5_ck@324•ti,divider-clock ¢auxclk5_ckÔ-ÌîÐ$3auxclkreq0_ck@210• ti,mux-clock¢auxclkreq0_ckÔ./0123ÌÐauxclkreq1_ck@214• ti,mux-clock¢auxclkreq1_ckÔ./0123ÌÐauxclkreq2_ck@218• ti,mux-clock¢auxclkreq2_ckÔ./0123ÌÐauxclkreq3_ck@21c• ti,mux-clock¢auxclkreq3_ckÔ./0123ÌÐauxclkreq4_ck@220• ti,mux-clock¢auxclkreq4_ckÔ./0123ÌÐ auxclkreq5_ck@224• ti,mux-clock¢auxclkreq5_ckÔ./0123ÌÐ$clockdomainstarget-module@c000ti,sysc-omap4ti,syscÐÀÀ }revsysc‡+ vÀscm@c000ti,omap4-scm-wkupÐÀsegment@10000simple-pm-bus+xv@@PP€€ÀÀÐÐààððtarget-module@0ti,sysc-omap2ti,syscÐ}revsyscsyss&‡3Ô   Ûfckdbclk+ vgpio@0ti,omap4-gpioÐ ]@Rb2Štarget-module@4000ti,sysc-omap2ti,syscÐ@@@}revsyscsyss&"‡3 Ô Ûfck+ v@wdt@0ti,omap4-wdtti,omap3-wdtЀ ]Ptarget-module@8000ti,sysc-omap2-timerti,syscЀ€€}revsyscsyss&' ‡3 Ô Ûfck+ v€n‚timer@0ti,omap3430-timerЀÔ Ûfcktimer_sys_ck ]% œ ¬target-module@c000ti,sysc-omap2ti,syscÐÀÀÀ}revsyscsyss&' ‡3 Ô XÛfck+ vÀkeypad@0ti,omap4-keypadЀ ]x}mpuÃÓæf?ð* !"ç@ð%-./kAð4:,N0;Bð9<sð&i#$=Cr2j1žðg”•ÊË>ð`lótarget-module@e000ti,sysc-omap4ti,syscÐàà }revsysc‡+ vàpinmux@40 ti,omap4-padconfpinctrl-singleÐ@8+ 2:ÿtwl6030-wkup-pinsWvsegment@20000simple-pm-bus+„v``    00@@PPpp€€target-module@0ti,sysc kdisabled+ vtarget-module@2000ti,sysc kdisabled+ v target-module@4000ti,sysc kdisabled+ v@target-module@6000ti,sysc kdisabled+0v`p €0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-bush4 Ô5ÛfckÐJJJ }aplaia0+TvJJJJ J (J(0J0segment@0simple-pm-bus+üv 00@@PP``ppÀÀ€€@  00€€   ``ppàà @@PPtarget-module@2000ti,sysc-omap4ti,syscÐ   }revsysc‡+ v scm@0ti,omap4-scm-coresimple-busÐ+ vscm_conf@0sysconÐ+›control-phy@300ti,control-phy-usb2Ð}powerfcontrol-phy@33cti,control-phy-otghsÐ<�}otghs_controletarget-module@4000ti,sysc-omap4ti,syscÐ@}rev+ v@cm1@0ti,omap4-cm1simple-busÐ + v clocks+extalt_clkin_ck• fixed-clock¢extalt_clkin_ckr„DÀpad_clks_src_ck• fixed-clock¢pad_clks_src_ckr·6pad_clks_ck@108•ti,gate-clock ¢pad_clks_ckÔ6ÌÐpad_slimbus_core_clks_ck• fixed-clock¢pad_slimbus_core_clks_ckr·secure_32k_clk_src_ck• fixed-clock¢secure_32k_clk_src_ckr€slimbus_src_clk• fixed-clock¢slimbus_src_clkr·7slimbus_clk@108•ti,gate-clock ¢slimbus_clkÔ7Ì Ðsys_32k_ck• fixed-clock ¢sys_32k_ckr€virt_12000000_ck• fixed-clock¢virt_12000000_ckr· virt_13000000_ck• fixed-clock¢virt_13000000_ckrÆ]@ virt_16800000_ck• fixed-clock¢virt_16800000_ckrYvirt_19200000_ck• fixed-clock¢virt_19200000_ckr$øvirt_26000000_ck• fixed-clock¢virt_26000000_ckrŒº€virt_27000000_ck• fixed-clock¢virt_27000000_ckr›üÀvirt_38400000_ck• fixed-clock¢virt_38400000_ckrIðtie_low_clock_ck• fixed-clock¢tie_low_clock_ckrutmi_phy_clkout_ck• fixed-clock¢utmi_phy_clkout_ckr“‡xclk60mhsp1_ck• fixed-clock¢xclk60mhsp1_ckr“‡`xclk60mhsp2_ck• fixed-clock¢xclk60mhsp2_ckr“‡axclk60motg_ck• fixed-clock¢xclk60motg_ckr“‡dpll_abe_ck@1e0•ti,omap4-dpll-m4xen-clock ¢dpll_abe_ckÔ89Ðàäìè:dpll_abe_x2_ck@1f0•ti,omap4-dpll-x2-clock¢dpll_abe_x2_ckÔ:Ðð;dpll_abe_m2x2_ck@1f0•ti,divider-clock¢dpll_abe_m2x2_ckÔ;î‚Ððµ”<�abe_24m_fclk•fixed-factor-clock ¢abe_24m_fclkÔ<�Ùäabe_clk@108•ti,divider-clock¢abe_clkÔ<�îЫdpll_abe_m3x2_ck@1f4•ti,divider-clock¢dpll_abe_m3x2_ckÔ;î‚Ðôµ”=core_hsd_byp_clk_mux_ck@12c• ti,mux-clock¢core_hsd_byp_clk_mux_ckÔ=ÌÐ,>dpll_core_ck@120•ti,omap4-dpll-core-clock ¢dpll_core_ckÔ>Ð $,(?dpll_core_x2_ck•ti,omap4-dpll-x2-clock¢dpll_core_x2_ckÔ?@dpll_core_m6x2_ck@140•ti,divider-clock¢dpll_core_m6x2_ckÔ@î‚Ð@µ”dpll_core_m2_ck@130•ti,divider-clock¢dpll_core_m2_ckÔ?î‚Ð0µ”Addrphy_ck•fixed-factor-clock ¢ddrphy_ckÔAÙädpll_core_m5x2_ck@13c•ti,divider-clock¢dpll_core_m5x2_ckÔ@î‚Ð<�µ”Bdiv_core_ck@100•ti,divider-clock ¢div_core_ckÔBÐîMdiv_iva_hs_clk@1dc•ti,divider-clock¢div_iva_hs_clkÔBîÐÜ«Fdiv_mpu_hs_clk@19c•ti,divider-clock¢div_mpu_hs_clkÔBîÐœ«Ldpll_core_m4x2_ck@138•ti,divider-clock¢dpll_core_m4x2_ckÔ@î‚Ð8µ”Cdll_clk_div_ck•fixed-factor-clock¢dll_clk_div_ckÔCÙädpll_abe_m2_ck@1f0•ti,divider-clock¢dpll_abe_m2_ckÔ:îÐðµPdpll_core_m3x2_gate_ck@134• ti,composite-no-wait-gate-clock¢dpll_core_m3x2_gate_ckÔ@ÌÐ4Ddpll_core_m3x2_div_ck@134•ti,composite-divider-clock¢dpll_core_m3x2_div_ckÔ@îÐ4µEdpll_core_m3x2_ck•ti,composite-clock¢dpll_core_m3x2_ckÔDEdpll_core_m7x2_ck@144•ti,divider-clock¢dpll_core_m7x2_ckÔ@î‚ÐDµ”iva_hsd_byp_clk_mux_ck@1ac• ti,mux-clock¢iva_hsd_byp_clk_mux_ckÔFÌЬGdpll_iva_ck@1a0•ti,omap4-dpll-clock ¢dpll_iva_ckÔGР¤¬¨œHÁ7€üHdpll_iva_x2_ck•ti,omap4-dpll-x2-clock¢dpll_iva_x2_ckÔHIdpll_iva_m4x2_ck@1b8•ti,divider-clock¢dpll_iva_m4x2_ckÔIî‚иµ”œJÁÀ~Jdpll_iva_m5x2_ck@1bc•ti,divider-clock¢dpll_iva_m5x2_ckÔIî‚мµ”œKÁÜ] Kdpll_mpu_ck@160•ti,omap4-dpll-clock ¢dpll_mpu_ckÔLÐ`dlhdpll_mpu_m2_ck@170•ti,divider-clock¢dpll_mpu_m2_ckÔî‚Ðpµ”per_hs_clk_div_ck•fixed-factor-clock¢per_hs_clk_div_ckÔ=ÙäQusb_hs_clk_div_ck•fixed-factor-clock¢usb_hs_clk_div_ckÔ=ÙäWl3_div_ck@100•ti,divider-clock ¢l3_div_ckÔMÌîÐNl4_div_ck@100•ti,divider-clock ¢l4_div_ckÔNÌîÐlp_clk_div_ck•fixed-factor-clock¢lp_clk_div_ckÔ<�Ùämpu_periphclk•fixed-factor-clock¢mpu_periphclkÔÙäocp_abe_iclk@528•ti,divider-clock ¢ocp_abe_iclk ÔOÌÐ(ùper_abe_24m_fclk•fixed-factor-clock¢per_abe_24m_fclkÔPÙädummy_ck• fixed-clock ¢dummy_ckrclockdomainsmpuss_cm@300 ti,omap4-cm ¢mpuss_cmÐ+ vclk@20 ti,clkctrl¢mpuss_clkctrlÐ •tesla_cm@400 ti,omap4-cm ¢tesla_cmÐ+ vclk@20 ti,clkctrl¢tesla_clkctrlÐ •babe_cm@500 ti,omap4-cm¢abe_cmÐ+ vclk@20 ti,clkctrl ¢abe_clkctrlÐ l•Otarget-module@8000ti,sysc-omap4ti,syscЀ}rev+ v€ cm2@0ti,omap4-cm2simple-busÐ + v clocks+per_hsd_byp_clk_mux_ck@14c• ti,mux-clock¢per_hsd_byp_clk_mux_ckÔQÌÐLRdpll_per_ck@140•ti,omap4-dpll-clock ¢dpll_per_ckÔRÐ@DLHSdpll_per_m2_ck@150•ti,divider-clock¢dpll_per_m2_ckÔSîÐPµ[dpll_per_x2_ck@150•ti,omap4-dpll-x2-clock¢dpll_per_x2_ckÔSÐPTdpll_per_m2x2_ck@150•ti,divider-clock¢dpll_per_m2x2_ckÔTî‚ÐPµ”Zdpll_per_m3x2_gate_ck@154• ti,composite-no-wait-gate-clock¢dpll_per_m3x2_gate_ckÔTÌÐTUdpll_per_m3x2_div_ck@154•ti,composite-divider-clock¢dpll_per_m3x2_div_ckÔTîÐTµVdpll_per_m3x2_ck•ti,composite-clock¢dpll_per_m3x2_ckÔUVdpll_per_m4x2_ck@158•ti,divider-clock¢dpll_per_m4x2_ckÔTî‚ÐXµ”dpll_per_m5x2_ck@15c•ti,divider-clock¢dpll_per_m5x2_ckÔTî‚Ð\µ”dpll_per_m6x2_ck@160•ti,divider-clock¢dpll_per_m6x2_ckÔTî‚Ð`µ”Ydpll_per_m7x2_ck@164•ti,divider-clock¢dpll_per_m7x2_ckÔTî‚Ðdµ”£dpll_usb_ck@180•ti,omap4-dpll-j-type-clock ¢dpll_usb_ckÔWЀ„ŒˆXdpll_usb_clkdcoldo_ck@1b4•ti,fixed-factor-clock¢dpll_usb_clkdcoldo_ckÔXւдã”dpll_usb_m2_ck@190•ti,divider-clock¢dpll_usb_m2_ckÔXî‚Аµ”\ducati_clk_mux_ck@100• ti,mux-clock¢ducati_clk_mux_ckÔMYÐfunc_12m_fclk•fixed-factor-clock¢func_12m_fclkÔZÙäfunc_24m_clk•fixed-factor-clock ¢func_24m_clkÔ[Ùäfunc_24mc_fclk•fixed-factor-clock¢func_24mc_fclkÔZÙäfunc_48m_fclk@108•ti,divider-clock¢func_48m_fclkÔZÐùfunc_48mc_fclk•fixed-factor-clock¢func_48mc_fclkÔZÙäfunc_64m_fclk@108•ti,divider-clock¢func_64m_fclkÔÐùfunc_96m_fclk@108•ti,divider-clock¢func_96m_fclkÔZÐùinit_60m_fclk@104•ti,divider-clock¢init_60m_fclkÔ\Ðù_per_abe_nc_fclk@108•ti,divider-clock¢per_abe_nc_fclkÔPÐîusb_phy_cm_clk32k@640•ti,gate-clock¢usb_phy_cm_clk32kÔÌÐ@gclockdomainsl3_init_clkdmti,clockdomain¢l3_init_clkdmÔXl4_ao_cm@600 ti,omap4-cm ¢l4_ao_cmÐ+ vclk@20 ti,clkctrl¢l4_ao_clkctrlÐ •il3_1_cm@700 ti,omap4-cm¢l3_1_cmÐ+ vclk@20 ti,clkctrl ¢l3_1_clkctrlÐ •l3_2_cm@800 ti,omap4-cm¢l3_2_cmÐ+ vclk@20 ti,clkctrl ¢l3_2_clkctrlÐ •ducati_cm@900 ti,omap4-cm ¢ducati_cmÐ + v clk@20 ti,clkctrl¢ducati_clkctrlÐ •˜l3_dma_cm@a00 ti,omap4-cm ¢l3_dma_cmÐ + v clk@20 ti,clkctrl¢l3_dma_clkctrlÐ •]l3_emif_cm@b00 ti,omap4-cm ¢l3_emif_cmÐ + v clk@20 ti,clkctrl¢l3_emif_clkctrlÐ •™d2d_cm@c00 ti,omap4-cm¢d2d_cmÐ + v clk@20 ti,clkctrl ¢d2d_clkctrlÐ •hl4_cfg_cm@d00 ti,omap4-cm ¢l4_cfg_cmÐ + v clk@20 ti,clkctrl¢l4_cfg_clkctrlÐ •5l3_instr_cm@e00 ti,omap4-cm ¢l3_instr_cmÐ+ vclk@20 ti,clkctrl¢l3_instr_clkctrlÐ $• ivahd_cm@f00 ti,omap4-cm ¢ivahd_cmÐ+ vclk@20 ti,clkctrl¢ivahd_clkctrlÐ •®iss_cm@1000 ti,omap4-cm¢iss_cmÐ+ vclk@20 ti,clkctrl ¢iss_clkctrlÐ •ml3_dss_cm@1100 ti,omap4-cm ¢l3_dss_cmÐ+ vclk@20 ti,clkctrl¢l3_dss_clkctrlÐ •¥l3_gfx_cm@1200 ti,omap4-cm ¢l3_gfx_cmÐ+ vclk@20 ti,clkctrl¢l3_gfx_clkctrlÐ •¢l3_init_cm@1300 ti,omap4-cm ¢l3_init_cmÐ+ vclk@20 ti,clkctrl¢l3_init_clkctrlÐ Ä•^clock@1400 ti,omap4-cm ¢l4_per_cmÐ+ vclock@20 ti,clkctrl¢l4_per_clkctrlÐ D•nclock@1a0 ti,clkctrl¢l4_secure_clkctrlР<�•~target-module@56000ti,sysc-omap2ti,syscÐ``,`(}revsyscsyss&# ñ ‡3 Ô]Ûfck+ v`dma-controller@0ti,omap4430-sdmati,omap-sdmaÐ0]  ÿ target-module@58000ti,sysc-omap2ti,syscЀ€€}revsyscsyss&#ñ‡3 Ô^Ûfck+ v€Phsi@0 ti,omap4-hsiÐ@P}sysgdd Ô^Ûhsi_fck ]G$gdd_mpu+ v@hsi-port@2000ti,omap4-hsi-portÐ (}txrx ]Chsi-port@3000ti,omap4-hsi-portÐ08}txrx ]Dtarget-module@5e000ti,sysc kdisabled+ và target-module@62000ti,sysc-omap2ti,syscÐ   }revsyscsyss& ‡ Ô^HÛfck+ v usbhstll@0 ti,usbhs-tllÐ ]Ntarget-module@64000ti,sysc-omap4ti,syscÐ@@@}revsyscsyss&ñ‡ Ô^8Ûfck+ v@usbhshost@0ti,usbhs-hostÐ+ v Ô_`a3Ûrefclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@800ti,ohci-omap3Ð ]L4ehci@c00 ti,ehci-omapÐ  ]Mtarget-module@66000ti,sysc-omap2ti,syscÐ```}revsyscsyss& ‡ ÔbÛfckhcLcSrstctrl+ v`mmu@0ti,omap4-iommuÐ ]_œsegment@80000simple-pm-bus+v    ° °À ÀÐ Ðà à@@PP``pp` `p pÐ Ðà à    ° °À ÀÐ Ðà àtarget-module@29000ti,sysc kdisabled+ vtarget-module@2b000ti,sysc-omap2ti,syscд´´}revsyscsyss& ñ‡3 Ô^@Ûfck+ v°usb_otg_hs@0ti,omap4-musbÐÿ]\]$mcdmaldtd yusb2-phyƒŽ– Ÿe«º¿2target-module@2d000ti,sysc-omap2ti,syscÐÐÐÐ}revsyscsyss& ‡3 Ô^ÀÛfck+ vÐocp2scp@0ti,omap-ocp2scpÐ+ vusb2phy@80 ti,omap-usb2ЀXŸfÔgÛwkupclkÅdtarget-module@36000ti,sysc-omap2ti,syscÐ```}revsyscsyss&‡3 ÔhÛfck+ v`target-module@4d000ti,sysc-omap2ti,syscÐÐÐÐ}revsyscsyss&‡3 ÔhÛfck+ vÐtarget-module@59000ti,sysc-omap4-srti,syscА8}sysc&‡ ÔiÛfck+ vsmartreflex@0ti,omap4-smartreflex-mpuЀ ]target-module@5b000ti,sysc-omap4-srti,syscа8}sysc&‡ ÔiÛfck+ v°smartreflex@0ti,omap4-smartreflex-ivaЀ ]ftarget-module@5d000ti,sysc-omap4-srti,syscÐÐ8}sysc&‡ ÔiÛfck+ vÐsmartreflex@0ti,omap4-smartreflex-coreЀ ]target-module@60000ti,sysc kdisabled+ vtarget-module@74000ti,sysc-omap4ti,syscÐ@@ }revsysc& ‡ Ô5Ûfck+ v@mailbox@0ti,omap4-mailboxÐ ]ÐÜîmbox-ipu    mbox-dsp   žtarget-module@76000ti,sysc-omap2ti,syscÐ```}revsyscsyss& ‡3 Ô5Ûfck+ v`spinlock@0ti,omap4-hwspinlockÐsegment@100000simple-pm-bus+`v  00€€  °°target-module@0ti,sysc-omap4ti,syscÐ }revsysc‡+ vpinmux@40 ti,omap4-padconfpinctrl-singleÐ@–+ 2:ÿ$default2jkomcpdm-pins(WÆÈÊÌΓuart2-pins WØÚÜÞruart3-pins Wpuart4-pinsWstwl6040-pinsWà`xdmic-pins WÐÒÔÖ’mcbsp1-pins W¾ÀÂĐmcbsp2-pins W¶¸º¼‘mcspi1-pins Wòôöø€dss-hdmi-pinsWZ\^jtpd12s015-pinsW"HX ki2c1-pinsWâäti2c2-pinsWæè}i2c3-pinsWêìqi2c4-pinsWîð‹wl12xx-gpio-pinsW<�¹wl12xx-pins8W:  ˆenet-enable-gpio-pinsW0 ³ks8851-pinsWútwl6030-pinsW^Auomap4_padconf_global@5a0sysconsimple-busРp+ v plpbias_regulator@60ti,pbias-omap4ti,pbias-omapÐ`<�lpbias_mmc_omap4Cpbias_mmc_omap4Rw@j-ÆÀ…target-module@2000ti,sysc kdisabled+ v target-module@8000ti,sysc kdisabled+ v€target-module@a000ti,sysc-omap4ti,syscР  }revsysc& ñ ‡‚ ÔmÛfck+ v segment@180000simple-pm-bus+segment@200000simple-pm-bus+hvà!àð!ð   ° °@ @P P` `p p ! 0!0À ÀÐ Ð!!`!`p!p@!@P!P€!€!""`"`p"p€"€" " °"°À!ÀÐ!Ðtarget-module@4000ti,sysc kdisabled+ v@target-module@6000ti,sysc kdisabled+ v`target-module@a000ti,sysc kdisabled+ v target-module@c000ti,sysc kdisabled+ vÀtarget-module@10000ti,sysc kdisabled+ vtarget-module@12000ti,sysc kdisabled+ v target-module@14000ti,sysc kdisabled+ v@target-module@16000ti,sysc kdisabled+ v`target-module@18000ti,sysc kdisabled+ v€target-module@1c000ti,sysc kdisabled+ vÀtarget-module@1e000ti,sysc kdisabled+ vàtarget-module@20000ti,sysc kdisabled+ vtarget-module@26000ti,sysc kdisabled+ v`target-module@28000ti,sysc kdisabled+ v€target-module@2a000ti,sysc kdisabled+ v segment@280000simple-pm-bus+segment@300000simple-pm-bus+„v042@@2@ `2`p2p€2€23 2  À2À@target-module@0ti,sysc kdisabled+xv@@@ ``pp€€   ÀÀ@interconnect@48000000ti,omap4-l4-persimple-pm-bush Ôn Ûfck0ÐHHHHHH}aplaia0ia1ia2ia3+vH H segment@0simple-pm-bus+äv  00@@PP``ppààððPP``pp€€  °°ÀÀÐÐàà  °°ÀÀÐÐààðð  00 ` ` p p``pp€€``pp€€    € €       ° ° À À Ð Ð à à ð ð  @ @ ` ` € €@ À À Ð Ð à à  0 0 @ @ P P € €       ° °    P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscÐPTX}revsyscsyss&‡3 Ôn0Ûfck+ vserial@0ti,omap4-uartÐ ]JrÜl“Jo$default2ptarget-module@32000ti,sysc-omap2-timerti,syscÐ   }revsyscsyss&' ‡3 ÔnÛfck+ v timer@0ti,omap3430-timerЀÔnÛfcktimer_sys_ck ]&target-module@34000ti,sysc-omap4-timerti,syscÐ@@ }revsysc&‡ Ôn Ûfck+ v@timer@0ti,omap4430-timerЀÔn Ûfcktimer_sys_ck ]'target-module@36000ti,sysc-omap4-timerti,syscÐ`` }revsysc&‡ Ôn(Ûfck+ v`timer@0ti,omap4430-timerЀÔn(Ûfcktimer_sys_ck ](target-module@3e000ti,sysc-omap4-timerti,syscÐàà }revsysc&‡ Ôn0Ûfck+ vàtimer@0ti,omap4430-timerЀÔn0Ûfcktimer_sys_ck ]-§target-module@40000ti,sysc kdisabled+ vtarget-module@55000ti,sysc-omap2ti,syscÐPPQ}revsyscsyss&‡3Ôn@n@ Ûfckdbclk+ vPgpio@0ti,omap4-gpioÐ ]Rb2‚target-module@57000ti,sysc-omap2ti,syscÐppq}revsyscsyss&‡3ÔnHnH Ûfckdbclk+ vpgpio@0ti,omap4-gpioÐ ]Rb2¯target-module@59000ti,sysc-omap2ti,syscА‘}revsyscsyss&‡3ÔnPnP Ûfckdbclk+ vgpio@0ti,omap4-gpioÐ ] Rb2ytarget-module@5b000ti,sysc-omap2ti,syscа°±}revsyscsyss&‡3ÔnXnX Ûfckdbclk+ v°gpio@0ti,omap4-gpioÐ ]!Rb2„target-module@5d000ti,sysc-omap2ti,syscÐÐÐÑ}revsyscsyss&‡3Ôn`n` Ûfckdbclk+ vÐgpio@0ti,omap4-gpioÐ ]"Rb2´target-module@60000ti,sysc-omap2ti,syscА}revsyscsyss&‡3 ÔnÛfck+ vi2c@0 ti,omap4-i2cÐ ]=+$default2qr€tmp105@48 ti,tmp105ÐHbh1780@29 rohm,bh1780Ð)target-module@6a000ti,sysc-omap2ti,syscРP T X}revsyscsyss&‡3 Ôn Ûfck+ v serial@0ti,omap4-uartÐ ]HrÜltarget-module@6c000ti,sysc-omap2ti,syscÐÀPÀTÀX}revsyscsyss&‡3 Ôn(Ûfck+ vÀserial@0ti,omap4-uartÐ ]IrÜl“IoÜ$default2rtarget-module@6e000ti,sysc-omap2ti,syscÐàPàTàX}revsyscsyss&‡3 Ôn8Ûfck+ vàserial@0ti,omap4-uartÐ ]FrÜl“Fo$default2starget-module@70000ti,sysc-omap2ti,syscА}revsyscsyss&‡3 Ôn€Ûfck+ vi2c@0 ti,omap4-i2cÐ ]8+$default2tr€twl@48ÐH ] ti,twl60302$default2uvrtcti,twl4030-rtc] regulator-vaux1ti,twl6030-vaux1RB@j-ÆÀ‡regulator-vaux2ti,twl6030-vaux2RO€j*¹€regulator-vaux3ti,twl6030-vaux3RB@j-ÆÀregulator-vmmcti,twl6030-vmmcRO€j-ÆÀ†regulator-vppti,twl6030-vppRw@j&% regulator-vusimti,twl6030-vusimRO€j,@ regulator-vdacti,twl6030-vdac«regulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio´¦regulator-vusbti,twl6030-vusbwregulator-v1v8ti,twl6030-v1v8´zregulator-v2v1ti,twl6030-v2v1´{usb-comparatorti,twl6030-usb] Èwpwmti,twl6030-pwmÓµpwmledti,twl6030-pwmledÓ¶gpadcti,twl6030-gpadc]Þtwl@4b ti,twl6040•ÐK$default2x ]w ðyz {+|:|”vibraIXg x target-module@72000ti,sysc-omap2ti,syscÐ   }revsyscsyss&‡3 ÔnˆÛfck+ v i2c@0 ti,omap4-i2cÐ ]9+$default2}r€target-module@76000ti,sysc-omap4ti,syscÐ`` }revsysc&‡ ÔnÛfck+ v`target-module@78000ti,sysc-omap2ti,syscЀ€€}revsyscsyss& ‡3 Ôn8Ûfck+ v€elm@0ti,am3352-elmÐ  ] kdisabledtarget-module@86000ti,sysc-omap2-timerti,syscÐ```}revsyscsyss&' ‡3 ÔnÛfck+ v`timer@0ti,omap3430-timerЀÔnÛfcktimer_sys_ck ].§target-module@88000ti,sysc-omap4-timerti,syscЀ€ }revsysc&‡ ÔnÛfck+ v€timer@0ti,omap4430-timerЀÔnÛfcktimer_sys_ck ]/§target-module@90000ti,sysc-omap2ti,syscÐ à ä }revsysc&‡ Ô~ Ûfck+ v rng@0 ti,omap4-rngÐ  ]4target-module@96000ti,sysc-omap2ti,syscÐ `Œ}sysc& ‡ ÔnÀÛfck+ v `mcbsp@0ti,omap4-mcbspÐÿ}mpu ÔnÀÛfck ]$common‰€˜ txrx kdisabledtarget-module@98000ti,sysc-omap4ti,syscÐ € € }revsysc&‡ ÔnÐÛfck+ v €spi@0ti,omap4-mcspiÐ ]A+§@˜#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3$default2€eth@0$default2ks8851µn6Ð ‚]ǃ Ò„ target-module@9a000ti,sysc-omap4ti,syscÐ     }revsysc&‡ ÔnØÛfck+ v  spi@0ti,omap4-mcspiÐ ]B+§ ˜+,-.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,syscÐ À À }revsysc&ñ‡ Ô^Ûfck+ v Àmmc@0ti,omap4-hsmmcÐ ]SÞë˜=>txrx…†target-module@9e000ti,sysc kdisabled+ v àtarget-module@a2000ti,sysc kdisabled+ v target-module@a4000ti,sysc kdisabled+v @ Ptarget-module@a5000ti,sysc-omap2ti,syscÐ P0 P4 P8}revsyscsyss&‡3 Ô~Ûfck+ v Pdes@0 ti,omap4-desР ]R˜uttxrxtarget-module@a8000ti,sysc kdisabled+ v €@target-module@ad000ti,sysc-omap4ti,syscÐ Ð Ð }revsysc&ñ‡ ÔnÛfck+ v Ðmmc@0ti,omap4-hsmmcÐ ]^ë˜MNtxrx kdisabledtarget-module@b0000ti,sysc kdisabled+ v target-module@b2000ti,sysc-omap2ti,syscÐ   }revsyscsyss&3n ÔnhÛfck+ v 1w@0 ti,omap3-1wÐ ]:target-module@b4000ti,sysc-omap4ti,syscÐ @ @ }revsysc&ñ‡ Ô^Ûfck+ v @mmc@0ti,omap4-hsmmcÐ ]Vë˜/0txrx‡%target-module@b8000ti,sysc-omap4ti,syscÐ € € }revsysc&‡ ÔnàÛfck+ v €spi@0ti,omap4-mcspiÐ ][+§˜tx0rx0target-module@ba000ti,sysc-omap4ti,syscÐ     }revsysc&‡ ÔnèÛfck+ v  spi@0ti,omap4-mcspiÐ ]0+§˜FGtx0rx0target-module@d1000ti,sysc-omap4ti,syscÐ   }revsysc&ñ‡ ÔnÛfck+ v mmc@0ti,omap4-hsmmcÐ ]`ë˜9:txrx kdisabledtarget-module@d5000ti,sysc-omap4ti,syscÐ P P }revsysc&ñ‡ Ôn@Ûfck+ v Pmmc@0ti,omap4-hsmmcÐ ];ë˜;<�txrx$default2ˆ‰(6+wlcore@2 ti,wl1281Ð Š]IŒº€]Œº€segment@200000simple-pm-bus+v55target-module@150000ti,sysc-omap2ti,syscА}revsyscsyss&‡3 Ôn˜Ûfck+ vi2c@0 ti,omap4-i2cÐ ]>+$default2‹r€hmc5843@1ehoneywell,hmc5843Ðtarget-module@48210000ti,sysc-omap4-simpleti,syschŒ ԍÛfck+ vH!mpu ti,omap4-mpurŽinterconnect@40100000ti,omap4-l4-abesimple-pm-busÐ@@}laaph+v@IIsegment@0simple-pm-bus+0v  00@@PP``pp€€  °°ààðð  00€€  °°ÀÀÐÐààðð      IIIII I I0I0I@I@IPIPI`I`IpIpI€I€III I I°I°IàIàIðIðIIIII I I0I0I€I€III I I°I°IÀIÀIÐIÐIàIàIðIðIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,syscÐ Œ}sysc& ‡ ÔO(Ûfck+v I I mcbsp@0ti,omap4-mcbspÐÿI ÿ}mpudma ÔO(Ûfck ]$common‰€˜!"txrxkokay$default2target-module@24000ti,sysc-omap2ti,syscÐ@Œ}sysc& ‡ ÔO0Ûfck+v@I@I@mcbsp@0ti,omap4-mcbspÐÿI@ÿ}mpudma ÔO0Ûfck ]$common‰€˜txrxkokay$default2‘target-module@26000ti,sysc-omap2ti,syscÐ`Œ}sysc& ‡ ÔO8Ûfck+v`I`I`mcbsp@0ti,omap4-mcbspÐÿI`ÿ}mpudma ÔO8Ûfck ]$common‰€˜txrx kdisabledtarget-module@28000ti,sysc-mcaspti,syscЀ€ }revsysc ‡ ÔO Ûfck+0v€I€I€  I I mcasp@0ti,omap4-mcasp-audioÐ I }mpudat ]m$tx˜tx ÔO Ûfckw kdisabledtarget-module@2e000ti,sysc-omap4ti,syscÐàà }revsysc&‡ ÔOÛfck+vàIàIàdmic@0ti,omap4-dmicÐIà}mpudma ]r˜Cup_linkkokay$default2’¸target-module@30000ti,sysc-omap2ti,syscÐ}revsyscsyss&"‡3 ÔOhÛfck+vIIwdt@0ti,omap4-wdtti,omap3-wdtЀ ]Ptarget-module@32000ti,sysc-omap4ti,syscÐ   }revsysc&‡ ÔOÛfck+v I I kokay$default2“mcpdm@0ti,omap4-mcpdmÐI }mpudma ]p˜ABup_linkdn_linkÔ”Ûpdmclk·target-module@38000ti,sysc-omap4-timerti,syscЀ€ }revsysc&‡ ÔOHÛfck+v€I€I€timer@0ti,omap4430-timerЀI€€ÔOH•Ûfcktimer_sys_ck ])Štarget-module@3a000ti,sysc-omap4-timerti,syscР  }revsysc&‡ ÔOPÛfck+v I I timer@0ti,omap4430-timerЀI €ÔOP•Ûfcktimer_sys_ck ]*Štarget-module@3c000ti,sysc-omap4-timerti,syscÐÀÀ }revsysc&‡ ÔOXÛfck+vÀIÀIÀtimer@0ti,omap4430-timerЀIÀ€ÔOX•Ûfcktimer_sys_ck ]+Štarget-module@3e000ti,sysc-omap4-timerti,syscÐàà }revsysc&‡ ÔO`Ûfck+vàIàIàtimer@0ti,omap4430-timerЀIà€ÔO`•Ûfcktimer_sys_ck ],§Štarget-module@80000ti,sysc kdisabled+vIItarget-module@a0000ti,sysc kdisabled+v I I target-module@c0000ti,sysc kdisabled+v I I target-module@f1000ti,sysc-omap4ti,syscÐ }revsyscñ ‡ ÔOÛfck+vIItarget-module@50000000ti,sysc-omap2ti,syscÐPPP}revsyscsyss ‡3— ÔÛfck+vPP@gpmc@50000000ti,omap4430-gpmcÐP+ ]˜rxtxª¶ÔNÛfck2Rbtarget-module@52000000ti,sysc-omap4ti,syscÐRR }revsysc&ñ‡‚h– ÔmÛfck+ vRtarget-module@54000000ti,sysc-omap4-simpleti,sysch— ÔÛfck+ vTpmuarm,cortex-a9-pmutarget-module@55082000ti,sysc-omap2ti,syscÐU U U }revsyscsyss ‡& Ô˜ÛfckL4Srstctrl vU +mmu@0ti,omap4-iommuÐ ]d_ÈŸtarget-module@4012c000ti,sysc-omap4ti,syscÐ@À@À }revsysc&‡ ÔO@Ûfck+v@ÀIÀIÀtarget-module@4e000000ti,sysc-omap2ti,syscÐNN }revsysc ‡ vN+dmm@0 ti,omap4-dmmÐ ]qtarget-module@4c000000ti,sysc-omap4-simpleti,syscÐL}rev Ô™Ûfck‚+ vLemif@0 ti,emif-4dÐ ]nÞçþ&/štarget-module@4d000000ti,sysc-omap4-simpleti,syscÐM}rev Ô™Ûfck‚+ vMemif@0 ti,emif-4dÐ ]oÞçþ&/šdsp ti,omap4-dsp =›HœLc ÔbOomap4-dsp-fw.xe64T]ž kdisabledipu@55020000 ti,omap4-ipuÐU}l2ramHŸL44 Ô˜Oomap4-ipu-fw.xem3]  kdisabledtarget-module@4b501000ti,sysc-omap2ti,syscÐKP€KP„KPˆ}revsyscsyss&‡3 Ô~Ûfck+ vKPaes@0 ti,omap4-aesР ]U˜ontxrxtarget-module@4b701000ti,sysc-omap2ti,syscÐKp€Kp„Kpˆ}revsyscsyss&‡3 Ô~Ûfck+ vKpaes@0 ti,omap4-aesР ]@˜rqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscÐKKK}revsyscsyss& ‡3 Ô~(Ûfck+ vKsham@0ti,omap4-shamÐ ]3˜wrxregulator-abb-mpu ti,abb-v2Cabb_mpu+d€Ô}2ŽkokayÐJ0{ÐJ0`}base-addressint-addressxž£èO€èû1Èregulator-abb-iva ti,abb-v2Cabb_iva+d€Ô}2Ž kdisabledÐJ0{ØJ0`}base-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscÐVþVþ }revsyscñ‡h¡ Ô¢Ûfck+ vVœ¢£ÁO€¬£gpu@0#ti,omap4430-gpuimg,powervr-sgx540Ð ]target-module@58000000ti,sysc-omap2ti,syscÐXX }revsyss3h¤0Ô¥¥ ¥ ¥ Ûfckhdmi_clksys_clktv_clk+ vXdss@0 ti,omap4-dssЀkokay Ô¥Ûfck+ vtarget-module@1000ti,sysc-omap2ti,syscÐ}revsyscsyss ‡ ñ&3Ô¥¥  Ûfcksys_clk+ vdispc@0ti,omap4-dispcÐ ] Ô¥Ûfcktarget-module@2000ti,sysc-omap2ti,syscÐ   }revsyscsyss ‡&3Ô¥¥  Ûfcksys_clk+ v encoder@0Ð kdisabledÔ¥NÛfckicktarget-module@3000ti,sysc-omap2ti,syscÐ0}rev Ô¥ Ûsys_clk+ v0encoder@0ti,omap4-vencÐ kdisabled Ô¥ Ûfcktarget-module@4000ti,sysc-omap2ti,syscÐ@@@}revsyscsyss ‡&3+ v@encoder@0 ti,omap4-dsiÐ@ }protophypll ]5kokayÔ¥¥  Ûfcksys_clk+Ǧportendpointª§º¨panel@0tpo,taalpanel-dsi-cmÐÀlcd0 Òyportendpointª¨§target-module@5000ti,sysc-omap2ti,syscÐPPP}revsyscsyss ‡&3+ vPencoder@0 ti,omap4-dsiÐ@ }protophypll ]TkokayÔ¥¥  Ûfcksys_clk+Ǧportendpointª©ºªpanel@0tpo,taalpanel-dsi-cmÐÀlcd1 Òyportendpointªª©target-module@6000ti,sysc-omap4ti,syscÐ`` }revsysc‡&Ô¥ ¥ Ûfckdss_clk+ v` encoder@0ti,omap4-hdmi Ð}wppllphycore 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¢µw5” §led-10Àomap4:green:chrg ¢¶w5” §ÿbacklightpwm-backlight ¢µw5”8 ¶ (2<�FPZdnx È soundti,abe-twl6040 áSDP4430 ê üIð · ¸ ”{ %Headset StereophoneHSOLHeadset StereophoneHSOREarphone SpkEPExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRVibratorVIBRALVibratorVIBRARHSMICHeadset MicHeadset MicHeadset Mic BiasMAINMICMain Handset MicMain Handset MicMain Mic BiasSUBMICSub Handset MicSub Handset MicMain Mic BiasAFMLLine InAFMRLine InDMicDigital MicDigital MicDigital Mic1 Biaswl12xx_vmmc$default2¹regulator-fixedCvwl1271Rw@jw@ ü‚ ‘p‰encoder ti,tpd12s015$Ø‚‚ ‚ports+port@0Ðendpointªº¬port@1Ðendpointª»¼connectorhdmi-connectorÀhdmiºcportendpointª¼» compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0display1display2device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentskeypad,num-rowskeypad,num-columnslinux,keymaplinux,input-no-autorepeat#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedresetsreset-names#iommu-cellsusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highvddvibl-supplyvddvibr-supplyti,vibldrv-resti,vibrdrv-resti,viblmotor-resti,vibrmotor-resti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyvdd-supplyreset-gpiosti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequencysramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_inforemote-endpointlaneslabelvdda-supply#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedregulator-boot-onstartup-delay-uspwmsmax-brightnessbrightness-levelsdefault-brightness-levelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,dmicti,twl6040ti,audio-routing