Ð
þí…8@(EEgumstix,omap3-overo-tobiduogumstix,omap3-overoti,omap3430ti,omap3+"7OMAP35xx Gumstix Overo on TobiDuochosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8scpuƒŠcpu–“सÇpmu@54000000arm,cortex-a8-pmuT€ÏÚdebugsssocti,omap-inframpu
ti,omap3-mpuÚmpuiva
ti,iva2.2Úivadsp
ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bushÏ
+äÚl3_mainl4@48000000ti,omap3-l4-coresimple-bus+äHscm@2000ti,omap3-scmsimple-bus +ä pinmux@30 ti,omap3-padconfpinctrl-single08+ëú >ÿ[defaultiÇæuart2-pins s<�>@BÇåi2c1-pinssŠŒÇèmmc1-pins0sÇómmc2-pins0s(*,.02Çõw3cbw003c-pinss„lÇhsusb2-pins@s¤¦¨ª¬®ŽÇtwl4030-pinss°AÇéi2c3-pinss’”Çïuart3-pinssnpÇçscm_conf@270sysconsimple-busp0+äp0Çpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap°‡pbias_mmc_omap2430Žpbias_mmc_omap2430w@µ-ÆÀÇòclocks+clock@68
ti,clkselhÍ+clock-mcbsp5-mux-fck@4Íti,composite-mux-clockÚmcbsp5_mux_fckƒÇ
clock-mcbsp3-mux-fck@0Íti,composite-mux-clockÚmcbsp3_mux_fckƒÇclock-mcbsp4-mux-fck@2Íti,composite-mux-clockÚmcbsp4_mux_fckƒÇmcbsp5_fckÍti,composite-clockƒ
Çýclock@4
ti,clkselÍ+clock-mcbsp1-mux-fck@2Íti,composite-mux-clockÚmcbsp1_mux_fckƒÇclock-mcbsp2-mux-fck@6Íti,composite-mux-clockÚmcbsp2_mux_fckƒÇmcbsp1_fckÍti,composite-clockƒÇømcbsp2_fckÍti,composite-clockƒ
Çúmcbsp3_fckÍti,composite-clockƒÇûmcbsp4_fckÍti,composite-clockƒÇüclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single
\+ëú >ÿtwl4030-vpins-pins sÇêtarget-module@480a6000ti,sysc-omap2ti,syscH
`DH
`HH
`Lírevsyscsyss÷ƒŠick+äH
` aes1@0
ti,omap3-aesPÏ
$txrxtarget-module@480c5000ti,sysc-omap2ti,syscHPDHPHHPLírevsyscsyss÷ƒŠick+äHP aes2@0
ti,omap3-aesPÏAB$txrxprm@48306000
ti,omap3-prmH0`@Ïclocks+virt_16_8m_ckÍfixed-clock.YÇosc_sys_ck@d40Í
ti,mux-clockƒ
@Çsys_ck@1270Íti,divider-clockƒ>KpVÇ!sys_clkout1@d70Íti,gate-clockƒ
p>dpll3_x2_ckÍfixed-factor-clockƒmxdpll3_m2x2_ckÍfixed-factor-clockƒmxÇ dpll4_x2_ckÍfixed-factor-clockƒmxcorex2_fckÍfixed-factor-clockƒ mxÇ"wkup_l4_ickÍfixed-factor-clockƒ!mxÇacorex2_d3_fckÍfixed-factor-clockƒ"mxljcorex2_d5_fckÍfixed-factor-clockƒ"mxÇŠclockdomainscm@48004000ti,omap3-cmH@@clocks+dummy_apb_pclkÍfixed-clock.omap_32k_fckÍfixed-clock.€ÇGvirt_12m_ckÍfixed-clock.·Çvirt_13m_ckÍfixed-clock.Æ]@Çvirt_19200000_ckÍfixed-clock.$øÇvirt_26000000_ckÍfixed-clock.Œº€Çvirt_38_4m_ckÍfixed-clock.IðÇdpll4_ck@d00Íti,omap3-dpll-per-clockƒ!!
D
0Çdpll4_m2_ck@d48Íti,divider-clockƒK?
HVÇ#dpll4_m2x2_mul_ckÍfixed-factor-clockƒ#mxÇ$dpll4_m2x2_ck@d00Íti,gate-clockƒ$>
‚Ç%omap_96m_alwon_fckÍfixed-factor-clockƒ%mxÇ1dpll3_ck@d00Íti,omap3-dpll-core-clockƒ!!
@
0Çclock@1140
ti,clksel@Í+clock-dpll3-m3@16Íti,divider-clockÚdpll3_m3_ckƒKVÇ+clock-dpll4-m6@24Íti,divider-clockÚdpll4_m6_ckƒK?VÇ=clock-emu-src-mux@0Í
ti,mux-clockÚemu_src_mux_ckƒ!&'(Çuclock-pclk-fck@8Íti,divider-clock Úpclk_fckƒ)KVclock-pclkx2-fck@6Íti,divider-clockÚpclkx2_fckƒ)KVclock-atclk-fck@4Íti,divider-clock
Úatclk_fckƒ)KVclock-traceclk-src-fck@2Í
ti,mux-clockÚtraceclk_src_fckƒ!&'(Ç*clock-traceclk-fck@11Íti,divider-clock
Útraceclk_fckƒ*KVdpll3_m3x2_mul_ckÍfixed-factor-clockƒ+mxÇ,dpll3_m3x2_ck@d00Íti,gate-clockƒ,>
‚Ç-emu_core_alwon_ckÍfixed-factor-clockƒ-mxÇ&sys_altclkÍfixed-clock.Ç4mcbsp_clksÍfixed-clock.Çcore_ckÍfixed-factor-clockƒmxÇ.dpll1_fck@940Íti,divider-clockƒ.>K @VÇ/dpll1_ck@904Íti,omap3-dpll-clockƒ!/ $ @ 4Çdpll1_x2_ckÍfixed-factor-clockƒmxÇ0dpll1_x2m2_ck@944Íti,divider-clockƒ0K DVÇDcm_96m_fckÍfixed-factor-clockƒ1mxÇ2clock@d40
ti,clksel
@Í+clock-dpll3-m2@27Íti,divider-clockÚdpll3_m2_ckƒKVÇclock-omap-96m-fck@6Í
ti,mux-clock
Úomap_96m_fckƒ2!ÇXclock-omap-54m-fck@5Í
ti,mux-clock
Úomap_54m_fckƒ34Ç@clock-omap-48m-fck@3Í
ti,mux-clock
Úomap_48m_fckƒ54Ç8clock@e40
ti,clksel@Í+clock-dpll4-m3@8Íti,divider-clockÚdpll4_m3_ckƒK VÇ6clock-dpll4-m4@0Íti,divider-clockÚdpll4_m4_ckƒKVÇ9dpll4_m3x2_mul_ckÍfixed-factor-clockƒ6mxÇ7dpll4_m3x2_ck@d00Íti,gate-clockƒ7>
‚Ç3cm_96m_d2_fckÍfixed-factor-clockƒ2mxÇ5omap_12m_fckÍfixed-factor-clockƒ8mxÇYdpll4_m4x2_mul_ckÍti,fixed-factor-clockƒ9˜¦³Ç:dpll4_m4x2_ck@d00Íti,gate-clockƒ:>
‚³Ç]dpll4_m5_ck@f40Íti,divider-clockƒK?@VÇ;dpll4_m5x2_mul_ckÍti,fixed-factor-clockƒ;˜¦³Ç<�dpll4_m5x2_ck@d00Íti,gate-clockƒ<�>
‚³Çydpll4_m6x2_mul_ckÍfixed-factor-clockƒ=mxÇ>dpll4_m6x2_ck@d00Íti,gate-clockƒ>>
‚Ç?emu_per_alwon_ckÍfixed-factor-clockƒ?mxÇ'clock@d70
ti,clksel
pÍ+clock-clkout2-src-gate@7Í ti,composite-no-wait-gate-clockÚclkout2_src_gate_ckƒ.ÇBclock-clkout2-src-mux@0Íti,composite-mux-clockÚclkout2_src_mux_ckƒ.!2@ÇCclock-sys-clkout2@3Íti,divider-clockÚsys_clkout2ƒAK@Æclkout2_src_ckÍti,composite-clockƒBCÇAmpu_ckÍfixed-factor-clockƒDmxÇEarm_fck@924Íti,divider-clockƒE $Kemu_mpu_alwon_ckÍfixed-factor-clockƒEmxÇ(clock@a40
ti,clksel
@Í+clock-l3-ick@0Íti,divider-clockÚl3_ickƒ.KVÇFclock-l4-ick@2Íti,divider-clockÚl4_ickƒFKVÇHclock-gpt10-mux-fck@6Íti,composite-mux-clockÚgpt10_mux_fckƒG!ÇUclock-gpt11-mux-fck@7Íti,composite-mux-clockÚgpt11_mux_fckƒG!ÇWclock-ssi-ssr-div-fck-3430es2@8Íti,composite-divider-clockÚssi_ssr_div_fck_3430es2ƒ"$ÜÇ~clock@c40
ti,clksel@Í+clock-rm-ick@1Íti,divider-clockÚrm_ickƒHKVclock-gpt1-mux-fck@0Íti,composite-mux-clock
Úgpt1_mux_fckƒG!Ç`clock-usim-mux-fck@3Íti,composite-mux-clock
Úusim_mux_fck(ƒ!IJKLMNOPQVÇ‚clock@a00
ti,clksel
Í+clock-gpt10-gate-fck@11Íti,composite-gate-clockÚgpt10_gate_fckƒ!ÇTclock-gpt11-gate-fck@12Íti,composite-gate-clockÚgpt11_gate_fckƒ!ÇVclock-mmchs2-fck@25Íti,wait-gate-clockÚmmchs2_fckƒÇ·clock-mmchs1-fck@24Íti,wait-gate-clockÚmmchs1_fckƒÇ¸clock-i2c3-fck@17Íti,wait-gate-clock Úi2c3_fckƒÇ¹clock-i2c2-fck@16Íti,wait-gate-clock Úi2c2_fckƒÇºclock-i2c1-fck@15Íti,wait-gate-clock Úi2c1_fckƒÇ»clock-mcbsp5-gate-fck@10
Íti,composite-gate-clockÚmcbsp5_gate_fckƒÇ clock-mcbsp1-gate-fck@9 Íti,composite-gate-clockÚmcbsp1_gate_fckƒÇclock-mcspi4-fck@21Íti,wait-gate-clockÚmcspi4_fckƒRǼclock-mcspi3-fck@20Íti,wait-gate-clockÚmcspi3_fckƒRǽclock-mcspi2-fck@19Íti,wait-gate-clockÚmcspi2_fckƒRǾclock-mcspi1-fck@18Íti,wait-gate-clockÚmcspi1_fckƒRÇ¿clock-uart2-fck@14Íti,wait-gate-clock
Úuart2_fckƒRÇÀclock-uart1-fck@13
Íti,wait-gate-clock
Úuart1_fckƒRÇÁclock-hdq-fck@22Íti,wait-gate-clockÚhdq_fckƒSÇÂclock-modem-fck@31Íti,omap3-interface-clock
Úmodem_fckƒ!ÇÞclock-mspro-fck@23Íti,wait-gate-clock
Úmspro_fckƒclock-ssi-ssr-gate-fck-3430es2@0Í ti,composite-no-wait-gate-clockÚssi_ssr_gate_fck_3430es2ƒ"Ç}clock-mmchs3-fck@30Íti,wait-gate-clockÚmmchs3_fckƒÇÚgpt10_fckÍti,composite-clockƒTUgpt11_fckÍti,composite-clockƒVWcore_96m_fckÍfixed-factor-clockƒXmxÇcore_48m_fckÍfixed-factor-clockƒ8mxÇRcore_12m_fckÍfixed-factor-clockƒYmxÇScore_l3_ickÍfixed-factor-clockƒFmxÇZclock@a10
ti,clksel
Í+clock-sdrc-ick@1Íti,wait-gate-clock Úsdrc_ickƒZÇclock-mmchs2-ick@25Íti,omap3-interface-clockÚmmchs2_ickƒ[ÇÃclock-mmchs1-ick@24Íti,omap3-interface-clockÚmmchs1_ickƒ[ÇÄclock-hdq-ick@22Íti,omap3-interface-clockÚhdq_ickƒ[ÇÅclock-mcspi4-ick@21Íti,omap3-interface-clockÚmcspi4_ickƒ[ÇÆclock-mcspi3-ick@20Íti,omap3-interface-clockÚmcspi3_ickƒ[ÇÇclock-mcspi2-ick@19Íti,omap3-interface-clockÚmcspi2_ickƒ[ÇÈclock-mcspi1-ick@18Íti,omap3-interface-clockÚmcspi1_ickƒ[ÇÉclock-i2c3-ick@17Íti,omap3-interface-clock Úi2c3_ickƒ[ÇÊclock-i2c2-ick@16Íti,omap3-interface-clock Úi2c2_ickƒ[ÇËclock-i2c1-ick@15Íti,omap3-interface-clock Úi2c1_ickƒ[ÇÌclock-uart2-ick@14Íti,omap3-interface-clock
Úuart2_ickƒ[ÇÍclock-uart1-ick@13
Íti,omap3-interface-clock
Úuart1_ickƒ[ÇÎclock-gpt11-ick@12Íti,omap3-interface-clock
Úgpt11_ickƒ[ÇÏclock-gpt10-ick@11Íti,omap3-interface-clock
Úgpt10_ickƒ[ÇÐclock-mcbsp5-ick@10
Íti,omap3-interface-clockÚmcbsp5_ickƒ[ÇÑclock-mcbsp1-ick@9 Íti,omap3-interface-clockÚmcbsp1_ickƒ[ÇÒclock-omapctrl-ick@6Íti,omap3-interface-clock
Úomapctrl_ickƒ[ÇÓclock-aes2-ick@28Íti,omap3-interface-clock Úaes2_ickƒ[Çclock-sha12-ick@27Íti,omap3-interface-clock
Úsha12_ickƒ[ÇÔclock-icr-ick@29Íti,omap3-interface-clockÚicr_ickƒ[clock-des2-ick@26Íti,omap3-interface-clock Údes2_ickƒ[clock-mspro-ick@23Íti,omap3-interface-clock
Úmspro_ickƒ[clock-mailboxes-ick@7Íti,omap3-interface-clockÚmailboxes_ickƒ[clock-sad2d-ick@3Íti,omap3-interface-clock
Úsad2d_ickƒFÇßclock-hsotgusb-ick-3430es2@4Í"ti,omap3-hsotgusb-interface-clockÚhsotgusb_ick_3430es2ƒZÇŽclock-ssi-ick-3430es2@0Íti,omap3-ssi-interface-clockÚssi_ick_3430es2ƒ\Ç clock-mmchs3-ick@30Íti,omap3-interface-clockÚmmchs3_ickƒ[ÇÙgpmc_fckÍfixed-factor-clockƒZmxcore_l4_ickÍfixed-factor-clockƒHmxÇ[clock@e00
ti,clkselÍ+clock-dss-tv-fckÍti,gate-clockÚdss_tv_fckƒ@>Dzclock-dss-96m-fckÍti,gate-clockÚdss_96m_fckƒX>dzclock-dss2-alwon-fckÍti,gate-clockÚdss2_alwon_fckƒ!>Ç´clock-dss1-alwon-fck-3430es2@0Íti,dss-gate-clockÚdss1_alwon_fck_3430es2ƒ]³Çµdummy_ckÍfixed-clock.clock@c00
ti,clkselÍ+clock-gpt1-gate-fck@0Íti,composite-gate-clockÚgpt1_gate_fckƒ!Ç_clock-gpio1-dbck@3Íti,gate-clockÚgpio1_dbckƒ^Ç©clock-wdt2-fck@5Íti,wait-gate-clock Úwdt2_fckƒ^Ǫclock-sr1-fck@6Íti,wait-gate-clockÚsr1_fckƒ!Ç
clock-sr2-fck@7Íti,wait-gate-clockÚsr2_fckƒ!Çclock-usim-gate-fck@9 Íti,composite-gate-clockÚusim_gate_fckƒXÇgpt1_fckÍti,composite-clockƒ_`Çþwkup_32k_fckÍfixed-factor-clockƒGmxÇ^clock@c10
ti,clkselÍ+clock-wdt2-ick@5Íti,omap3-interface-clock Úwdt2_ickƒaÇ«clock-wdt1-ick@4Íti,omap3-interface-clock Úwdt1_ickƒaǬclock-gpio1-ick@3Íti,omap3-interface-clock
Úgpio1_ickƒaÇclock-omap-32ksync-ick@2Íti,omap3-interface-clockÚomap_32ksync_ickƒaÇ®clock-gpt12-ick@1Íti,omap3-interface-clock
Úgpt12_ickƒaǯclock-gpt1-ick@0Íti,omap3-interface-clock Úgpt1_ickƒaÇ°clock-usim-ick@9 Íti,omap3-interface-clock Úusim_ickƒaDZper_96m_fckÍfixed-factor-clockƒ1mxÇper_48m_fckÍfixed-factor-clockƒ8mxÇbclock@1000
ti,clkselÍ+clock-uart3-fck@11Íti,wait-gate-clock
Úuart3_fckƒbÇclock-gpt2-gate-fck@3Íti,composite-gate-clockÚgpt2_gate_fckƒ!Çdclock-gpt3-gate-fck@4Íti,composite-gate-clockÚgpt3_gate_fckƒ!Çfclock-gpt4-gate-fck@5Íti,composite-gate-clockÚgpt4_gate_fckƒ!Çhclock-gpt5-gate-fck@6Íti,composite-gate-clockÚgpt5_gate_fckƒ!Çjclock-gpt6-gate-fck@7Íti,composite-gate-clockÚgpt6_gate_fckƒ!Çlclock-gpt7-gate-fck@8Íti,composite-gate-clockÚgpt7_gate_fckƒ!Çnclock-gpt8-gate-fck@9 Íti,composite-gate-clockÚgpt8_gate_fckƒ!Çpclock-gpt9-gate-fck@10
Íti,composite-gate-clockÚgpt9_gate_fckƒ!Çrclock-gpio6-dbck@17Íti,gate-clockÚgpio6_dbckƒcÇclock-gpio5-dbck@16Íti,gate-clockÚgpio5_dbckƒcÇ‘clock-gpio4-dbck@15Íti,gate-clockÚgpio4_dbckƒcÇ’clock-gpio3-dbck@14Íti,gate-clockÚgpio3_dbckƒcÇ“clock-gpio2-dbck@13
Íti,gate-clockÚgpio2_dbckƒcÇ”clock-wdt3-fck@12Íti,wait-gate-clock Úwdt3_fckƒcÇ•clock-mcbsp2-gate-fck@0Íti,composite-gate-clockÚmcbsp2_gate_fckƒÇ
clock-mcbsp3-gate-fck@1Íti,composite-gate-clockÚmcbsp3_gate_fckƒÇclock-mcbsp4-gate-fck@2Íti,composite-gate-clockÚmcbsp4_gate_fckƒÇclock@1040
ti,clksel@Í+clock-gpt2-mux-fck@0Íti,composite-mux-clock
Úgpt2_mux_fckƒG!Çeclock-gpt3-mux-fck@1Íti,composite-mux-clock
Úgpt3_mux_fckƒG!Çgclock-gpt4-mux-fck@2Íti,composite-mux-clock
Úgpt4_mux_fckƒG!Çiclock-gpt5-mux-fck@3Íti,composite-mux-clock
Úgpt5_mux_fckƒG!Çkclock-gpt6-mux-fck@4Íti,composite-mux-clock
Úgpt6_mux_fckƒG!Çmclock-gpt7-mux-fck@5Íti,composite-mux-clock
Úgpt7_mux_fckƒG!Çoclock-gpt8-mux-fck@6Íti,composite-mux-clock
Úgpt8_mux_fckƒG!Çqclock-gpt9-mux-fck@7Íti,composite-mux-clock
Úgpt9_mux_fckƒG!Çsgpt2_fckÍti,composite-clockƒdeÇÿgpt3_fckÍti,composite-clockƒfggpt4_fckÍti,composite-clockƒhigpt5_fckÍti,composite-clockƒjkgpt6_fckÍti,composite-clockƒlmgpt7_fckÍti,composite-clockƒnogpt8_fckÍti,composite-clockƒpqgpt9_fckÍti,composite-clockƒrsper_32k_alwon_fckÍfixed-factor-clockƒGmxÇcper_l4_ickÍfixed-factor-clockƒHmxÇtclock@1010
ti,clkselÍ+clock-gpio6-ick@17Íti,omap3-interface-clock
Úgpio6_ickƒtÇ–clock-gpio5-ick@16Íti,omap3-interface-clock
Úgpio5_ickƒtÇ—clock-gpio4-ick@15Íti,omap3-interface-clock
Úgpio4_ickƒtǘclock-gpio3-ick@14Íti,omap3-interface-clock
Úgpio3_ickƒtÇ™clock-gpio2-ick@13
Íti,omap3-interface-clock
Úgpio2_ickƒtÇšclock-wdt3-ick@12Íti,omap3-interface-clock Úwdt3_ickƒtÇ›clock-uart3-ick@11Íti,omap3-interface-clock
Úuart3_ickƒtÇœclock-uart4-ick@18Íti,omap3-interface-clock
Úuart4_ickƒtÇclock-gpt9-ick@10
Íti,omap3-interface-clock Úgpt9_ickƒtÇžclock-gpt8-ick@9 Íti,omap3-interface-clock Úgpt8_ickƒtÇŸclock-gpt7-ick@8Íti,omap3-interface-clock Úgpt7_ickƒtÇ clock-gpt6-ick@7Íti,omap3-interface-clock Úgpt6_ickƒtÇ¡clock-gpt5-ick@6Íti,omap3-interface-clock Úgpt5_ickƒtÇ¢clock-gpt4-ick@5Íti,omap3-interface-clock Úgpt4_ickƒtÇ£clock-gpt3-ick@4Íti,omap3-interface-clock Úgpt3_ickƒtǤclock-gpt2-ick@3Íti,omap3-interface-clock Úgpt2_ickƒtÇ¥clock-mcbsp2-ick@0Íti,omap3-interface-clockÚmcbsp2_ickƒtǦclock-mcbsp3-ick@1Íti,omap3-interface-clockÚmcbsp3_ickƒtǧclock-mcbsp4-ick@2Íti,omap3-interface-clockÚmcbsp4_ickƒtǨemu_src_ckÍti,clkdm-gate-clockƒuÇ)secure_32k_fckÍfixed-clock.€Çvgpt12_fckÍfixed-factor-clockƒvmxÇwdt1_fckÍfixed-factor-clockƒvmxsecurity_l4_ick2Ífixed-factor-clockƒHmxÇwclock@a14
ti,clksel
Í+clock-aes1-ick@3Íti,omap3-interface-clock Úaes1_ickƒwÇclock-rng-ick@2Íti,omap3-interface-clockÚrng_ickƒwÇùclock-sha11-ick@1Íti,omap3-interface-clock
Úsha11_ickƒwclock-des1-ick@0Íti,omap3-interface-clock Údes1_ickƒwclock-pka-ick@4Íti,omap3-interface-clockÚpka_ickƒxclock@f00
ti,clkselÍ+clock-cam-mclk@0Íti,gate-clock Úcam_mclkƒy³clock-csi2-96m-fck@1Íti,gate-clock
Úcsi2_96m_fckƒÇÜcam_ick@f10Í!ti,omap3-no-wait-interface-clockƒH>ÇÛsecurity_l3_ickÍfixed-factor-clockƒFmxÇxssi_l4_ickÍfixed-factor-clockƒHmxÇ\sr_l4_ickÍfixed-factor-clockƒHmxdpll2_fck@40Íti,divider-clockƒ.>K@VÇzdpll2_ck@4Íti,omap3-dpll-clockƒ!z$@4èúÇ{dpll2_m2_ck@44Íti,divider-clockƒ{KDVÇ|iva2_ck@0Íti,wait-gate-clockƒ|>ÇÝclock@a18
ti,clksel
Í+clock-mad2d-ick@3Íti,omap3-interface-clock
Úmad2d_ickƒFÇàclock-usbtll-ick@2Íti,omap3-interface-clockÚusbtll_ickƒ[ÇØssi_ssr_fck_3430es2Íti,composite-clockƒ}~Çssi_sst_fck_3430es2Ífixed-factor-clockƒmxÇsys_d2_ckÍfixed-factor-clockƒ!mxÇIomap_96m_d2_fckÍfixed-factor-clockƒXmxÇJomap_96m_d4_fckÍfixed-factor-clockƒXmxÇKomap_96m_d8_fckÍfixed-factor-clockƒXmxÇLomap_96m_d10_fckÍfixed-factor-clockƒXmx
ÇMdpll5_m2_d4_ckÍfixed-factor-clockƒ€mxÇNdpll5_m2_d8_ckÍfixed-factor-clockƒ€mxÇOdpll5_m2_d16_ckÍfixed-factor-clockƒ€mxÇPdpll5_m2_d20_ckÍfixed-factor-clockƒ€mxÇQusim_fckÍti,composite-clockƒ‚dpll5_ck@d04Íti,omap3-dpll-clockƒ!!
$
L
4èúǃdpll5_m2_ck@d50Íti,divider-clockƒƒK
PVÇ€sgx_gate_fck@b00Íti,composite-gate-clockƒ.>Ç‹core_d3_ckÍfixed-factor-clockƒ.mxÇ„core_d4_ckÍfixed-factor-clockƒ.mxÇ…core_d6_ckÍfixed-factor-clockƒ.mxdžomap_192m_alwon_fckÍfixed-factor-clockƒ%mxLJcore_d2_ckÍfixed-factor-clockƒ.mxLjsgx_mux_fck@b40Íti,composite-mux-clock ƒ„…†2‡ˆ‰Š@ÇŒsgx_fckÍti,composite-clockƒ‹ŒÇsgx_ick@b10Íti,wait-gate-clockƒF>Çácpefuse_fck@a08Íti,gate-clockƒ!
>ÇÕts_fck@a08Íti,gate-clockƒG
>ÇÖusbtll_fck@a08Íti,wait-gate-clockƒ€
>Ç×dss_ick_3430es2@e10Íti,omap3-dss-interface-clockƒH>Ƕusbhost_120m_fck@1400Íti,gate-clockƒ€>Çâusbhost_48m_fck@1400Íti,dss-gate-clockƒ8>Çãusbhost_ick@1410Íti,omap3-dss-interface-clockƒH>Çäclockdomainscore_l3_clkdmti,clockdomainƒŽdpll3_clkdmti,clockdomainƒdpll1_clkdmti,clockdomainƒper_clkdmti,clockdomainhƒ‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨emu_clkdmti,clockdomainƒ)dpll4_clkdmti,clockdomainƒwkup_clkdmti,clockdomain$ƒ©ª«¬®¯°±dss_clkdmti,clockdomainƒ²³´µ¶core_l4_clkdmti,clockdomain”ƒ·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚcam_clkdmti,clockdomainƒÛÜiva2_clkdmti,clockdomainƒÝdpll2_clkdmti,clockdomainƒ{d2d_clkdmti,clockdomainƒÞßàdpll5_clkdmti,clockdomainƒƒsgx_clkdmti,clockdomainƒáusbhost_clkdmti,clockdomainƒâãätarget-module@48320000ti,sysc-omap2ti,syscH2H2 írevsyscƒ^®Šfckick+äH2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcúH Çtarget-module@48056000ti,sysc-omap2ti,syscH`H`,H`(írevsyscsyss÷##ƒZŠick+äH`dma-controller@0ti,omap3430-sdmati,omap-sdmaÏ
1<� I`Çgpio@48310000ti,omap3-gpioH1ÏÚgpio1VhxúÇgpio@49050000ti,omap3-gpioIÏÚgpio2hxúÇgpio@49052000ti,omap3-gpioI ÏÚgpio3hxúÇgpio@49054000ti,omap3-gpioI@Ï Úgpio4hxúgpio@49056000ti,omap3-gpioI`Ï!Úgpio5hxúgpio@49058000ti,omap3-gpioI€Ï"Úgpio6hxúÇserial@4806a000ti,omap3-uartH „H12$txrxÚuart1.Ülserial@4806c000ti,omap3-uartHÀ„I34$txrxÚuart2.Ül[defaultiåserial@49020000ti,omap3-uartI„Jæn56$txrxÚuart3.Ül[defaultiçi2c@48070000
ti,omap3-i2cH€Ï8+Úi2c1[defaultiè.'¬@twl@48HÏti,twl4030ú[defaultiéêaudioti,twl4030-audiocodecrtcti,twl4030-rtcÏbciti,twl4030-bciÏ ˜ë¦ì²vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 'Àµ regulator-vdacti,twl4030-vdacw@µw@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:µ0°Çôregulator-vmmc2ti,twl4030-vmmc2:µ0°regulator-vusb1v5ti,twl4030-vusb1v5Çíregulator-vusb1v8ti,twl4030-vusb1v8Çîregulator-vusb3v1ti,twl4030-vusb3v1Çëregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@µw@regulator-vsimti,twl4030-vsimw@µ-ÆÀgpioti,twl4030-gpiohxúÃtwl4030-usbti,twl4030-usbÏ
ÏíÝîëëùÇpwmti,twl4030-pwm
pwmledti,twl4030-pwmled
Çpwrbuttonti,twl4030-pwrbuttonÏkeypadti,twl4030-keypadÏ(madcti,twl4030-madcÏ;Çìi2c@48072000
ti,omap3-i2cH €Ï9+Úi2c2 Mdisabledi2c@48060000
ti,omap3-i2cH€Ï=+Úi2c3[defaultiï.† eeprom@51atmel,24c01QTlis33de@1dst,lis33dest,lis3lv02d]ðhñvˆš¬
¾
Ð
âðþ
+:IXxgxvŒ…&”&£î Mdisabledmailbox@48094000ti,omap3-mailboxÚmailboxH @ϲ¾Ðmbox-dspâíspi@48098000ti,omap2-mcspiH €ÏA+Úmcspi1ø@#$%&'()* $tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH ÏB+Úmcspi2ø +,-.$tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH€Ï[+Úmcspi3ø $tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH Ï0+Úmcspi4øFG$tx0rx01w@480b2000ti,omap3-1wH Ï:Úhdq1wmmc@4809c000ti,omap3-hsmmcH ÀÏSÚmmc1=>$txrxò[defaultió ô,mmc@480b4000ti,omap3-hsmmcH@ÏVÚmmc2/0$txrx[defaultiõ ö6÷,CPmmc@480ad000ti,omap3-hsmmcH
ÐÏ^Úmmc3MN$txrx Mdisabledmmu@480bd400^ti,omap2-iommuHÔ€ÏÚmmu_ispkÇmmu@5d000000^ti,omap2-iommu]€ÏÚmmu_iva Mdisabledwdt@48314000
ti,omap3-wdtH1@€
Úwd_timer2mcbsp@48074000ti,omap3-mcbspH@ÿímpuÏ;<�
{commontxrx‹€Úmcbsp1 $txrxƒøŠfck Mdisabledtarget-module@480a0000ti,sysc-omap2ti,syscH
<�H
@H
Dírevsyscsyss÷ƒùŠick+äH
rng@0
ti,omap2-rng Ï4mcbsp@49022000ti,omap3-mcbspI ÿI€ÿ
ímpusidetoneÏ>?{commontxrxsidetone‹Úmcbsp2mcbsp2_sidetone!"$txrxƒú¦ŠfckickMokayÇmcbsp@49024000ti,omap3-mcbspI@ÿI ÿ
ímpusidetoneÏYZ{commontxrxsidetone‹€Úmcbsp3mcbsp3_sidetone$txrxƒû§Šfckick Mdisabledmcbsp@49026000ti,omap3-mcbspI`ÿímpuÏ67
{commontxrx‹€Úmcbsp4$txrxƒüŠfckš Mdisabledmcbsp@48096000ti,omap3-mcbspH `ÿímpuÏQR
{commontxrx‹€Úmcbsp5$txrxƒýŠfck Mdisabledsham@480c3000ti,omap3-shamÚshamH0dÏ1E$rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1€H1€H1€írevsyscsyss÷'ƒþ°Šfckick+äH1€«¿timer@0ti,omap3430-timer€ƒþŠfckÏ%ÊÙþéGtarget-module@49032000ti,sysc-omap2-timerti,syscI I I írevsyscsyss÷'ƒÿ¥Šfckick+äI timer@0ti,omap3430-timerÏ&timer@49034000ti,omap3430-timerI@Ï'Útimer3timer@49036000ti,omap3430-timerI`Ï(Útimer4timer@49038000ti,omap3430-timerI€Ï)Útimer5timer@4903a000ti,omap3430-timerI Ï*Útimer6timer@4903c000ti,omap3430-timerIÀÏ+Útimer7timer@4903e000ti,omap3430-timerIàÏ,Útimer8
timer@49040000ti,omap3430-timerIÏ-Útimer9
timer@48086000ti,omap3430-timerH`Ï.Útimer10
timer@48088000ti,omap3430-timerH€Ï/Útimer11
target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@írevsyscsyss÷'ƒ¯Šfckick+äH0@timer@0ti,omap3430-timerÏ_Êusbhstll@48062000
ti,usbhs-tllH ÏNÚusb_tll_hsusbhshost@48064000ti,usbhs-hostH@Úusb_host_hs+ä *ehci-phyohci@48064400ti,ohci-omap3HDÏL5ehci@48064800
ti,ehci-omapHHÏMMgpmc@6e000000ti,omap3430-gpmcÚgpmcnÐÏ$rxtxR^+úhx0ä0+,Çnand@0,0ti,omap2-nandpmicron,mt29c4g96mazÏŽ bch8°ÁÏ,á,ó",((76F@URfRw(‰+partition@0¡SPLpartition@80000¡U-Bootpartition@1c0000¡Environment$partition@280000¡Kernel(€partition@780000¡Filesystem¨ethernet@gpmcsmsc,lan9221smsc,lan9115§²ÁÏ*á$óÄ7*Ò($U<�f6F$àú ‰w* + E _ o } ŠÿÏethernet@4,0smsc,lan9221smsc,lan9115§²ÁÏ*á$óÄ7*Ò($U<�f6F$àú ‰w* + E _ o } ŠÿÏtarget-module@480ab000ti,sysc-omap2ti,syscH
´H
´H
´írevsyscsyss÷#Šfck+äH
°ƒŽusb@0ti,omap3-musbÏ\]{mcdma « ³ ¼ ËM Óusb2-phyý Ý2dss@48050000
ti,omap3-dssH Mdisabled Údss_coreƒµŠfck+ädispc@48050400ti,omap3-dispcHÏ
Údss_dispcƒµŠfckencoder@4804fc00
ti,omap3-dsiHüHþ@Hÿ íprotophypllÏ Mdisabled Údss_dsi1ƒµ´Šfcksys_clk+encoder@48050800ti,omap3-rfbiH Mdisabled Údss_rfbiƒµ¶Šfckickencoder@48050c00ti,omap3-vencH Mdisabled Údss_vencƒ²Šfckssi-controller@48058000
ti,omap3-ssiÚssiMokayH€HísysgddÏG{gdd_mpu+äƒ Šssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portH H¨ítxrxÏCDssi-port@4805b000ti,omap3-ssi-portH°H¸ítxrxÏEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%Ø$+ëú >ÿ[defaulti
hsusb2-2-pins0s "Ç
w3cbw003c-2-pinssÇisp@480bc000
ti,omap3-ispHÀüHØ|Ï ã‡l êÍports+bandgap@48002524H%$ti,omap34xx-bandgap öÇtarget-module@480cb000ti,sysc-omap3430-srti,syscÚsmartreflex_coreH°$ísysc÷ƒŠfck+äH°smartreflex@0ti,omap3-smartreflex-coreÏtarget-module@480c9000ti,sysc-omap3430-srti,syscÚsmartreflex_mpu_ivaH$ísysc÷ƒ
Šfck+äHsmartreflex@480c9000ti,omap3-smartreflex-mpu-ivaÏtarget-module@50000000ti,sysc-omap2ti,syscPírevƒáŠfckick+äPgpu@0#ti,omap3430-gpuimg,powervr-sgx530Ïopp-tableoperating-points-v2-ti-cpu‡Çopp-125000000
sY@
à˜à˜à˜
!ÿÿÿÿopp-250000000
æ²€
g8g8g8
!ÿÿÿÿ
2opp-500000000
Íe
O€O€O€
!ÿÿÿÿopp-550000000
ÈU€
txtxtx
!ÿÿÿÿopp-600000000
#ÃF
™p™p™p
!ÿÿÿÿopp-720000000
*êT
™p™p™p
!ÿÿÿÿ
>thermal-zonescpu-thermal
Iú
_è
mN
ztripscpu_alert
Š8€
–ÐzpassiveÇcpu_crit
Š_
–Ð zcriticalcooling-mapsmap0
¡
¦ÿÿÿÿÿÿÿÿmemory@0smemoryled-controller pwm-ledsled-1¡overo:blue:COM
µw5”
º
Émmc0soundti,omap-twl4030
ßovero
èhsusb2_power_regregulator-fixedŽhsusb2_vbusLK@µLK@
ñ
öpÇhsusb2-phy-pinsusb-nop-xceiv&Çregulator-w3cbw003c-npoweronregulator-fixedŽregulator-w3cbw003c-npoweron2Z µ2Z
ñÇöregulator-w3cbw003c-wifi-nreset[defaultiregulator-fixed Žregulator-w3cbw003c-wifi-nreset2Z µ2Z
ñ
ö'Ç÷lis33-3v3-regregulator-fixedŽlis33-3v3-reg2Z µ2Z Çñlis33-1v8-regregulator-fixedŽlis33-1v8-regw@µw@Çðregulator-vddvarioregulator-fixed Žvddvario1Çregulator-vdd33aregulator-fixedŽvdd33a1Ç compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespoweriommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicepwmsmax-brightnesslinux,default-triggerti,modelti,mcbspgpiostartup-delay-usenable-active-highreset-gpiosvcc-supplyregulator-always-on