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þíë8 (
K h/isee,omap3-igep0030-rev-gti,omap3630ti,omap3+*7IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8‡cpu“—žcpuª“à¸Ì×æpmu@54000000arm,cortex-a8-pmu“T€îùdebugsssocti,omap-inframpu
ti,omap3-mpuùmpuiva
ti,iva2.2ùivadsp
ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus“hî
+ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+Hscm@2000ti,omap3-scmsimple-bus“ + pinmux@30 ti,omap3-padconfpinctrl-single“08+
*?]ÿzdefaultˆgpmc-pins’Žæuart1-pins’RLæçuart3-pins’npæêmcbsp2-pins ’æþmmc1-pins0’æômmc2-pins0’(*,.02æøi2c1-pins’ŠŒæëi2c3-pins’’”æòtwl4030-pins’°Aæìhsusb2-pins0’¤¦¨ª¬®æuart2-pins ’<�>@Bæèlbep5clwmc-pins’46:æùleds-pins’Žæscm_conf@270sysconsimple-bus“p0+p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap“°¦pbias_mmc_omap2430pbias_mmc_omap2430¼w@Ô-ÆÀæóclocks+clock@68
ti,clksel“hì+clock-mcbsp5-mux-fck@4“ìti,composite-mux-clockùmcbsp5_mux_fck—æclock-mcbsp3-mux-fck@0“ìti,composite-mux-clockùmcbsp3_mux_fck— æclock-mcbsp4-mux-fck@2“ìti,composite-mux-clockùmcbsp4_mux_fck— æmcbsp5_fckìti,composite-clock—
æclock@4
ti,clksel“ì+clock-mcbsp1-mux-fck@2“ìti,composite-mux-clockùmcbsp1_mux_fck—æ
clock-mcbsp2-mux-fck@6“ìti,composite-mux-clockùmcbsp2_mux_fck— æmcbsp1_fckìti,composite-clock—
æûmcbsp2_fckìti,composite-clock—æýmcbsp3_fckìti,composite-clock—æÿmcbsp4_fckìti,composite-clock—æclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single“
\+
*?]ÿtwl4030-vpins-pins ’æítarget-module@480a6000ti,sysc-omap2ti,sysc“H
`DH
`HH
`Lrevsyscsyss#1—žick+H
` aes1@0
ti,omap3-aes“Pî>
Ctxrxtarget-module@480c5000ti,sysc-omap2ti,sysc“HPDHPHHPLrevsyscsyss#1—žick+HP aes2@0
ti,omap3-aes“Pî>ABCtxrxprm@48306000
ti,omap3-prm“H0`@îclocks+virt_16_8m_ckìfixed-clockMYæosc_sys_ck@d40ì
ti,mux-clock—“
@æsys_ck@1270ìti,divider-clock—]j“puæ"sys_clkout1@d70ìti,gate-clock—“
p]dpll3_x2_ckìfixed-factor-clock—Œ—dpll3_m2x2_ckìfixed-factor-clock—Œ—æ!dpll4_x2_ckìfixed-factor-clock— Œ—corex2_fckìfixed-factor-clock—!Œ—æ#wkup_l4_ickìfixed-factor-clock—"Œ—æbcorex2_d3_fckìfixed-factor-clock—#Œ—æŠcorex2_d5_fckìfixed-factor-clock—#Œ—æ‹clockdomainscm@48004000ti,omap3-cm“H@@clocks+dummy_apb_pclkìfixed-clockMomap_32k_fckìfixed-clockM€æHvirt_12m_ckìfixed-clockM·ævirt_13m_ckìfixed-clockMÆ]@ævirt_19200000_ckìfixed-clockM$øævirt_26000000_ckìfixed-clockMŒº€ævirt_38_4m_ckìfixed-clockMIðædpll4_ck@d00ìti,omap3-dpll-per-j-type-clock—""“
D
0æ dpll4_m2_ck@d48ìti,divider-clock— j?“
Huæ$dpll4_m2x2_mul_ckìfixed-factor-clock—$Œ—æ%dpll4_m2x2_ck@d00ìti,hsdiv-gate-clock—%]“
¡æ&omap_96m_alwon_fckìfixed-factor-clock—&Œ—æ2dpll3_ck@d00ìti,omap3-dpll-core-clock—""“
@
0æclock@1140
ti,clksel“@ì+clock-dpll3-m3@16“ìti,divider-clockùdpll3_m3_ck—juæ,clock-dpll4-m6@24“ìti,divider-clockùdpll4_m6_ck— j?uæ>clock-emu-src-mux@0“ì
ti,mux-clockùemu_src_mux_ck—"'()ævclock-pclk-fck@8“ìti,divider-clock ùpclk_fck—*juclock-pclkx2-fck@6“ìti,divider-clockùpclkx2_fck—*juclock-atclk-fck@4“ìti,divider-clock
ùatclk_fck—*juclock-traceclk-src-fck@2“ì
ti,mux-clockùtraceclk_src_fck—"'()æ+clock-traceclk-fck@11“ìti,divider-clock
ùtraceclk_fck—+judpll3_m3x2_mul_ckìfixed-factor-clock—,Œ—æ-dpll3_m3x2_ck@d00ìti,hsdiv-gate-clock—-]“
¡æ.emu_core_alwon_ckìfixed-factor-clock—.Œ—æ'sys_altclkìfixed-clockMæ5mcbsp_clksìfixed-clockMæcore_ckìfixed-factor-clock—Œ—æ/dpll1_fck@940ìti,divider-clock—/]j“ @uæ0dpll1_ck@904ìti,omap3-dpll-clock—"0“ $ @ 4ædpll1_x2_ckìfixed-factor-clock—Œ—æ1dpll1_x2m2_ck@944ìti,divider-clock—1j“ DuæEcm_96m_fckìfixed-factor-clock—2Œ—æ3clock@d40
ti,clksel“
@ì+clock-dpll3-m2@27“ìti,divider-clockùdpll3_m2_ck—juæclock-omap-96m-fck@6“ì
ti,mux-clock
ùomap_96m_fck—3"æYclock-omap-54m-fck@5“ì
ti,mux-clock
ùomap_54m_fck—45æAclock-omap-48m-fck@3“ì
ti,mux-clock
ùomap_48m_fck—65æ9clock@e40
ti,clksel“@ì+clock-dpll4-m3@8“ìti,divider-clockùdpll4_m3_ck— j uæ7clock-dpll4-m4@0“ìti,divider-clockùdpll4_m4_ck— juæ:dpll4_m3x2_mul_ckìfixed-factor-clock—7Œ—æ8dpll4_m3x2_ck@d00ìti,hsdiv-gate-clock—8]“
¡æ4cm_96m_d2_fckìfixed-factor-clock—3Œ—æ6omap_12m_fckìfixed-factor-clock—9Œ—æZdpll4_m4x2_mul_ckìti,fixed-factor-clock—:·ÅÒæ;dpll4_m4x2_ck@d00ìti,gate-clock—;]“
¡Òæ^dpll4_m5_ck@f40ìti,divider-clock— j?“@uæ<�dpll4_m5x2_mul_ckìti,fixed-factor-clock—<�·ÅÒæ=dpll4_m5x2_ck@d00ìti,hsdiv-gate-clock—=]“
¡Òæzdpll4_m6x2_mul_ckìfixed-factor-clock—>Œ—æ?dpll4_m6x2_ck@d00ìti,hsdiv-gate-clock—?]“
¡æ@emu_per_alwon_ckìfixed-factor-clock—@Œ—æ(clock@d70
ti,clksel“
pì+clock-clkout2-src-gate@7“ì ti,composite-no-wait-gate-clockùclkout2_src_gate_ck—/æCclock-clkout2-src-mux@0“ìti,composite-mux-clockùclkout2_src_mux_ck—/"3AæDclock-sys-clkout2@3“ìti,divider-clockùsys_clkout2—Bj@åclkout2_src_ckìti,composite-clock—CDæBmpu_ckìfixed-factor-clock—EŒ—æFarm_fck@924ìti,divider-clock—F“ $jemu_mpu_alwon_ckìfixed-factor-clock—FŒ—æ)clock@a40
ti,clksel“
@ì+clock-l3-ick@0“ìti,divider-clockùl3_ick—/juæGclock-l4-ick@2“ìti,divider-clockùl4_ick—GjuæIclock-gpt10-mux-fck@6“ìti,composite-mux-clockùgpt10_mux_fck—H"æVclock-gpt11-mux-fck@7“ìti,composite-mux-clockùgpt11_mux_fck—H"æXclock-ssi-ssr-div-fck-3430es2@8“ìti,composite-divider-clockùssi_ssr_div_fck_3430es2—#$ûæclock@c40
ti,clksel“@ì+clock-rm-ick@1“ìti,divider-clockùrm_ick—Ijuclock-gpt1-mux-fck@0“ìti,composite-mux-clock
ùgpt1_mux_fck—H"æaclock-usim-mux-fck@3“ìti,composite-mux-clock
ùusim_mux_fck(—"JKLMNOPQRuæƒclock@a00
ti,clksel“
ì+clock-gpt10-gate-fck@11“ìti,composite-gate-clockùgpt10_gate_fck—"æUclock-gpt11-gate-fck@12“ìti,composite-gate-clockùgpt11_gate_fck—"æWclock-mmchs2-fck@25“ìti,wait-gate-clockùmmchs2_fck—æ¹clock-mmchs1-fck@24“ìti,wait-gate-clockùmmchs1_fck—æºclock-i2c3-fck@17“ìti,wait-gate-clock ùi2c3_fck—æ»clock-i2c2-fck@16“ìti,wait-gate-clock ùi2c2_fck—æ¼clock-i2c1-fck@15“ìti,wait-gate-clock ùi2c1_fck—æ½clock-mcbsp5-gate-fck@10“
ìti,composite-gate-clockùmcbsp5_gate_fck—æ
clock-mcbsp1-gate-fck@9“ ìti,composite-gate-clockùmcbsp1_gate_fck—æclock-mcspi4-fck@21“ìti,wait-gate-clockùmcspi4_fck—Sæ¾clock-mcspi3-fck@20“ìti,wait-gate-clockùmcspi3_fck—Sæ¿clock-mcspi2-fck@19“ìti,wait-gate-clockùmcspi2_fck—SæÀclock-mcspi1-fck@18“ìti,wait-gate-clockùmcspi1_fck—SæÁclock-uart2-fck@14“ìti,wait-gate-clock
ùuart2_fck—SæÂclock-uart1-fck@13“
ìti,wait-gate-clock
ùuart1_fck—SæÃclock-hdq-fck@22“ìti,wait-gate-clockùhdq_fck—TæÄclock-modem-fck@31“ìti,omap3-interface-clock
ùmodem_fck—"æàclock-mspro-fck@23“ìti,wait-gate-clock
ùmspro_fck—clock-ssi-ssr-gate-fck-3430es2@0“ì ti,composite-no-wait-gate-clockùssi_ssr_gate_fck_3430es2—#æ~clock-mmchs3-fck@30“ìti,wait-gate-clockùmmchs3_fck—æÜgpt10_fckìti,composite-clock—UVgpt11_fckìti,composite-clock—WXcore_96m_fckìfixed-factor-clock—YŒ—æcore_48m_fckìfixed-factor-clock—9Œ—æScore_12m_fckìfixed-factor-clock—ZŒ—æTcore_l3_ickìfixed-factor-clock—GŒ—æ[clock@a10
ti,clksel“
ì+clock-sdrc-ick@1“ìti,wait-gate-clock ùsdrc_ick—[æŽclock-mmchs2-ick@25“ìti,omap3-interface-clockùmmchs2_ick—\æÅclock-mmchs1-ick@24“ìti,omap3-interface-clockùmmchs1_ick—\æÆclock-hdq-ick@22“ìti,omap3-interface-clockùhdq_ick—\æÇclock-mcspi4-ick@21“ìti,omap3-interface-clockùmcspi4_ick—\æÈclock-mcspi3-ick@20“ìti,omap3-interface-clockùmcspi3_ick—\æÉclock-mcspi2-ick@19“ìti,omap3-interface-clockùmcspi2_ick—\æÊclock-mcspi1-ick@18“ìti,omap3-interface-clockùmcspi1_ick—\æËclock-i2c3-ick@17“ìti,omap3-interface-clock ùi2c3_ick—\æÌclock-i2c2-ick@16“ìti,omap3-interface-clock ùi2c2_ick—\æÍclock-i2c1-ick@15“ìti,omap3-interface-clock ùi2c1_ick—\æÎclock-uart2-ick@14“ìti,omap3-interface-clock
ùuart2_ick—\æÏclock-uart1-ick@13“
ìti,omap3-interface-clock
ùuart1_ick—\æÐclock-gpt11-ick@12“ìti,omap3-interface-clock
ùgpt11_ick—\æÑclock-gpt10-ick@11“ìti,omap3-interface-clock
ùgpt10_ick—\æÒclock-mcbsp5-ick@10“
ìti,omap3-interface-clockùmcbsp5_ick—\æÓclock-mcbsp1-ick@9“ ìti,omap3-interface-clockùmcbsp1_ick—\æÔclock-omapctrl-ick@6“ìti,omap3-interface-clock
ùomapctrl_ick—\æÕclock-aes2-ick@28“ìti,omap3-interface-clock ùaes2_ick—\æclock-sha12-ick@27“ìti,omap3-interface-clock
ùsha12_ick—\æÖclock-icr-ick@29“ìti,omap3-interface-clockùicr_ick—\clock-des2-ick@26“ìti,omap3-interface-clock ùdes2_ick—\clock-mspro-ick@23“ìti,omap3-interface-clock
ùmspro_ick—\clock-mailboxes-ick@7“ìti,omap3-interface-clockùmailboxes_ick—\clock-sad2d-ick@3“ìti,omap3-interface-clock
ùsad2d_ick—Gæáclock-hsotgusb-ick-3430es2@4“ì"ti,omap3-hsotgusb-interface-clockùhsotgusb_ick_3430es2—[æclock-ssi-ick-3430es2@0“ìti,omap3-ssi-interface-clockùssi_ick_3430es2—]æ
clock-mmchs3-ick@30“ìti,omap3-interface-clockùmmchs3_ick—\æÛgpmc_fckìfixed-factor-clock—[Œ—core_l4_ickìfixed-factor-clock—IŒ—æ\clock@e00
ti,clksel“ì+clock-dss-tv-fckìti,gate-clockùdss_tv_fck—A]æ´clock-dss-96m-fckìti,gate-clockùdss_96m_fck—Y]æµclock-dss2-alwon-fckìti,gate-clockùdss2_alwon_fck—"]æ¶clock-dss1-alwon-fck-3430es2@0“ìti,dss-gate-clockùdss1_alwon_fck_3430es2—^Òæ·dummy_ckìfixed-clockMclock@c00
ti,clksel“ì+clock-gpt1-gate-fck@0“ìti,composite-gate-clockùgpt1_gate_fck—"æ`clock-gpio1-dbck@3“ìti,gate-clockùgpio1_dbck—_æ«clock-wdt2-fck@5“ìti,wait-gate-clock ùwdt2_fck—_æ¬clock-sr1-fck@6“ìti,wait-gate-clockùsr1_fck—"æclock-sr2-fck@7“ìti,wait-gate-clockùsr2_fck—"æ
clock-usim-gate-fck@9“ ìti,composite-gate-clockùusim_gate_fck—Yæ‚gpt1_fckìti,composite-clock—`aæwkup_32k_fckìfixed-factor-clock—HŒ—æ_clock@c10
ti,clksel“ì+clock-wdt2-ick@5“ìti,omap3-interface-clock ùwdt2_ick—bæclock-wdt1-ick@4“ìti,omap3-interface-clock ùwdt1_ick—bæ®clock-gpio1-ick@3“ìti,omap3-interface-clock
ùgpio1_ick—bæ¯clock-omap-32ksync-ick@2“ìti,omap3-interface-clockùomap_32ksync_ick—bæ°clock-gpt12-ick@1“ìti,omap3-interface-clock
ùgpt12_ick—bæ±clock-gpt1-ick@0“ìti,omap3-interface-clock ùgpt1_ick—bæ²clock-usim-ick@9“ ìti,omap3-interface-clock ùusim_ick—bæ³per_96m_fckìfixed-factor-clock—2Œ—æ per_48m_fckìfixed-factor-clock—9Œ—æcclock@1000
ti,clksel“ì+clock-uart3-fck@11“ìti,wait-gate-clock
ùuart3_fck—cæclock-gpt2-gate-fck@3“ìti,composite-gate-clockùgpt2_gate_fck—"æeclock-gpt3-gate-fck@4“ìti,composite-gate-clockùgpt3_gate_fck—"ægclock-gpt4-gate-fck@5“ìti,composite-gate-clockùgpt4_gate_fck—"æiclock-gpt5-gate-fck@6“ìti,composite-gate-clockùgpt5_gate_fck—"ækclock-gpt6-gate-fck@7“ìti,composite-gate-clockùgpt6_gate_fck—"æmclock-gpt7-gate-fck@8“ìti,composite-gate-clockùgpt7_gate_fck—"æoclock-gpt8-gate-fck@9“ ìti,composite-gate-clockùgpt8_gate_fck—"æqclock-gpt9-gate-fck@10“
ìti,composite-gate-clockùgpt9_gate_fck—"æsclock-gpio6-dbck@17“ìti,gate-clockùgpio6_dbck—dæ‘clock-gpio5-dbck@16“ìti,gate-clockùgpio5_dbck—dæ’clock-gpio4-dbck@15“ìti,gate-clockùgpio4_dbck—dæ“clock-gpio3-dbck@14“ìti,gate-clockùgpio3_dbck—dæ”clock-gpio2-dbck@13“
ìti,gate-clockùgpio2_dbck—dæ•clock-wdt3-fck@12“ìti,wait-gate-clock ùwdt3_fck—dæ–clock-mcbsp2-gate-fck@0“ìti,composite-gate-clockùmcbsp2_gate_fck—æclock-mcbsp3-gate-fck@1“ìti,composite-gate-clockùmcbsp3_gate_fck—æclock-mcbsp4-gate-fck@2“ìti,composite-gate-clockùmcbsp4_gate_fck—æclock-uart4-fck@18“ìti,wait-gate-clock
ùuart4_fck—cæªclock@1040
ti,clksel“@ì+clock-gpt2-mux-fck@0“ìti,composite-mux-clock
ùgpt2_mux_fck—H"æfclock-gpt3-mux-fck@1“ìti,composite-mux-clock
ùgpt3_mux_fck—H"æhclock-gpt4-mux-fck@2“ìti,composite-mux-clock
ùgpt4_mux_fck—H"æjclock-gpt5-mux-fck@3“ìti,composite-mux-clock
ùgpt5_mux_fck—H"ælclock-gpt6-mux-fck@4“ìti,composite-mux-clock
ùgpt6_mux_fck—H"ænclock-gpt7-mux-fck@5“ìti,composite-mux-clock
ùgpt7_mux_fck—H"æpclock-gpt8-mux-fck@6“ìti,composite-mux-clock
ùgpt8_mux_fck—H"ærclock-gpt9-mux-fck@7“ìti,composite-mux-clock
ùgpt9_mux_fck—H"ætgpt2_fckìti,composite-clock—efægpt3_fckìti,composite-clock—ghgpt4_fckìti,composite-clock—ijgpt5_fckìti,composite-clock—klgpt6_fckìti,composite-clock—mngpt7_fckìti,composite-clock—opgpt8_fckìti,composite-clock—qrgpt9_fckìti,composite-clock—stper_32k_alwon_fckìfixed-factor-clock—HŒ—ædper_l4_ickìfixed-factor-clock—IŒ—æuclock@1010
ti,clksel“ì+clock-gpio6-ick@17“ìti,omap3-interface-clock
ùgpio6_ick—uæ—clock-gpio5-ick@16“ìti,omap3-interface-clock
ùgpio5_ick—uæ˜clock-gpio4-ick@15“ìti,omap3-interface-clock
ùgpio4_ick—uæ™clock-gpio3-ick@14“ìti,omap3-interface-clock
ùgpio3_ick—uæšclock-gpio2-ick@13“
ìti,omap3-interface-clock
ùgpio2_ick—uæ›clock-wdt3-ick@12“ìti,omap3-interface-clock ùwdt3_ick—uæœclock-uart3-ick@11“ìti,omap3-interface-clock
ùuart3_ick—uæclock-uart4-ick@18“ìti,omap3-interface-clock
ùuart4_ick—uæžclock-gpt9-ick@10“
ìti,omap3-interface-clock ùgpt9_ick—uæŸclock-gpt8-ick@9“ ìti,omap3-interface-clock ùgpt8_ick—uæ clock-gpt7-ick@8“ìti,omap3-interface-clock ùgpt7_ick—uæ¡clock-gpt6-ick@7“ìti,omap3-interface-clock ùgpt6_ick—uæ¢clock-gpt5-ick@6“ìti,omap3-interface-clock ùgpt5_ick—uæ£clock-gpt4-ick@5“ìti,omap3-interface-clock ùgpt4_ick—uæ¤clock-gpt3-ick@4“ìti,omap3-interface-clock ùgpt3_ick—uæ¥clock-gpt2-ick@3“ìti,omap3-interface-clock ùgpt2_ick—uæ¦clock-mcbsp2-ick@0“ìti,omap3-interface-clockùmcbsp2_ick—uæ§clock-mcbsp3-ick@1“ìti,omap3-interface-clockùmcbsp3_ick—uæ¨clock-mcbsp4-ick@2“ìti,omap3-interface-clockùmcbsp4_ick—uæ©emu_src_ckìti,clkdm-gate-clock—væ*secure_32k_fckìfixed-clockM€æwgpt12_fckìfixed-factor-clock—wŒ—æwdt1_fckìfixed-factor-clock—wŒ—security_l4_ick2ìfixed-factor-clock—IŒ—æxclock@a14
ti,clksel“
ì+clock-aes1-ick@3“ìti,omap3-interface-clock ùaes1_ick—xæclock-rng-ick@2“ìti,omap3-interface-clockùrng_ick—xæüclock-sha11-ick@1“ìti,omap3-interface-clock
ùsha11_ick—xclock-des1-ick@0“ìti,omap3-interface-clock ùdes1_ick—xclock-pka-ick@4“ìti,omap3-interface-clockùpka_ick—yclock@f00
ti,clksel“ì+clock-cam-mclk@0“ìti,gate-clock ùcam_mclk—zÒclock-csi2-96m-fck@1“ìti,gate-clock
ùcsi2_96m_fck—æÞcam_ick@f10ì!ti,omap3-no-wait-interface-clock—I“]æÝsecurity_l3_ickìfixed-factor-clock—GŒ—æyssi_l4_ickìfixed-factor-clock—IŒ—æ]sr_l4_ickìfixed-factor-clock—IŒ—dpll2_fck@40ìti,divider-clock—/]j“@uæ{dpll2_ck@4ìti,omap3-dpll-clock—"{“$@4!æ|dpll2_m2_ck@44ìti,divider-clock—|j“Duæ}iva2_ck@0ìti,wait-gate-clock—}“]æßclock@a18
ti,clksel“
ì5+clock-mad2d-ick@3“ìti,omap3-interface-clock
ùmad2d_ick—Gæâclock-usbtll-ick@2“ìti,omap3-interface-clockùusbtll_ick—\æÚssi_ssr_fck_3430es2ìti,composite-clock—~æ€ssi_sst_fck_3430es2ìfixed-factor-clock—€Œ—æ sys_d2_ckìfixed-factor-clock—"Œ—æJomap_96m_d2_fckìfixed-factor-clock—YŒ—æKomap_96m_d4_fckìfixed-factor-clock—YŒ—æLomap_96m_d8_fckìfixed-factor-clock—YŒ—æMomap_96m_d10_fckìfixed-factor-clock—YŒ—
æNdpll5_m2_d4_ckìfixed-factor-clock—Œ—æOdpll5_m2_d8_ckìfixed-factor-clock—Œ—æPdpll5_m2_d16_ckìfixed-factor-clock—Œ—æQdpll5_m2_d20_ckìfixed-factor-clock—Œ—æRusim_fckìti,composite-clock—‚ƒdpll5_ck@d04ìti,omap3-dpll-clock—""“
$
L
4æ„dpll5_m2_ck@d50ìti,divider-clock—„j“
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P[ h`ægpio@48310000ti,omap3-gpio“H1îùgpio1u‡—*ægpio@49050000ti,omap3-gpio“Iîùgpio2‡—*ægpio@49052000ti,omap3-gpio“I îùgpio3‡—*gpio@49054000ti,omap3-gpio“I@î ùgpio4‡—*gpio@49056000ti,omap3-gpio“I`î!ùgpio5‡—*æégpio@49058000ti,omap3-gpio“I€î"ùgpio6‡—*æserial@4806a000ti,omap3-uart“H £H>12Ctxrxùuart1MÜlzdefaultˆçserial@4806c000ti,omap3-uart“HÀ£I>34Ctxrxùuart2MÜlzdefaultˆèbluetooth
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