Ð þí˜8ˆ( P)isee,omap3-igep0020ti,omap3630ti,omap3 +!7IGEPv2 Rev. C (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8‡cpu“—žcpuª“à¸Ì×æpmu@54000000arm,cortex-a8-pmu“T€îùdebugsssocti,omap-inframpu ti,omap3-mpuùmpuiva ti,iva2.2ùivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus“hî +ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus“ +  pinmux@30 ti,omap3-padconfpinctrl-single“08+ *?]ÿzdefaultˆgpmc-pins’Žæ uart1-pins’RLæèuart3-pins’npæêmcbsp2-pins ’ æmmc1-pins0’æômmc2-pins0’(*,.02æúi2c1-pins’ŠŒæëi2c3-pins’’”æòtwl4030-pins’°Aæìtfp410-pins’–ædss-dpi-pinsà’¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚæuart2-pins ’DFHJæésmsc9221-pins’¢æ lbee1usjyc-pins’68:æûscm_conf@270sysconsimple-bus“p0+ p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap“°¦pbias_mmc_omap2430­pbias_mmc_omap2430¼w@Ô-ÆÀæóclocks+clock@68 ti,clksel“hì+clock-mcbsp5-mux-fck@4“ìti,composite-mux-clockùmcbsp5_mux_fck— æ clock-mcbsp3-mux-fck@0“ìti,composite-mux-clockùmcbsp3_mux_fck— æclock-mcbsp4-mux-fck@2“ìti,composite-mux-clockùmcbsp4_mux_fck— æmcbsp5_fckìti,composite-clock— æclock@4 ti,clksel“ì+clock-mcbsp1-mux-fck@2“ìti,composite-mux-clockùmcbsp1_mux_fck— æclock-mcbsp2-mux-fck@6“ìti,composite-mux-clockùmcbsp2_mux_fck— æmcbsp1_fckìti,composite-clock— æþmcbsp2_fckìti,composite-clock—æmcbsp3_fckìti,composite-clock—æmcbsp4_fckìti,composite-clock—æclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single“ \+ *?]ÿtwl4030-vpins-pins ’æítarget-module@480a6000ti,sysc-omap2ti,sysc“H `DH `HH `L revsyscsyss #1—žick+ H ` aes1@0 ti,omap3-aes“Pî>  Ctxrxtarget-module@480c5000ti,sysc-omap2ti,sysc“H PDH PHH PL revsyscsyss #1—žick+ H P aes2@0 ti,omap3-aes“Pî>ABCtxrxprm@48306000 ti,omap3-prm“H0`@î clocks+virt_16_8m_ckì fixed-clockMYæosc_sys_ck@d40ì ti,mux-clock—“ @æsys_ck@1270ìti,divider-clock—]j“puæ#sys_clkout1@d70ìti,gate-clock—“ p]dpll3_x2_ckìfixed-factor-clock—Œ—dpll3_m2x2_ckìfixed-factor-clock— Œ—æ"dpll4_x2_ckìfixed-factor-clock—!Œ—corex2_fckìfixed-factor-clock—"Œ—æ$wkup_l4_ickìfixed-factor-clock—#Œ—æccorex2_d3_fckìfixed-factor-clock—$Œ—æ‹corex2_d5_fckìfixed-factor-clock—$Œ—æŒclockdomainscm@48004000 ti,omap3-cm“H@@clocks+dummy_apb_pclkì fixed-clockMomap_32k_fckì fixed-clockM€æIvirt_12m_ckì fixed-clockM·ævirt_13m_ckì fixed-clockMÆ]@ævirt_19200000_ckì fixed-clockM$øævirt_26000000_ckì fixed-clockMŒº€ævirt_38_4m_ckì fixed-clockMIðædpll4_ck@d00ìti,omap3-dpll-per-j-type-clock—##“ D 0æ!dpll4_m2_ck@d48ìti,divider-clock—!j?“ Huæ%dpll4_m2x2_mul_ckìfixed-factor-clock—%Œ—æ&dpll4_m2x2_ck@d00ìti,hsdiv-gate-clock—&]“ ¡æ'omap_96m_alwon_fckìfixed-factor-clock—'Œ—æ3dpll3_ck@d00ìti,omap3-dpll-core-clock—##“ @ 0æclock@1140 ti,clksel“@ì+clock-dpll3-m3@16“ìti,divider-clock ùdpll3_m3_ck—juæ-clock-dpll4-m6@24“ìti,divider-clock ùdpll4_m6_ck—!j?uæ?clock-emu-src-mux@0“ì ti,mux-clockùemu_src_mux_ck—#()*æwclock-pclk-fck@8“ìti,divider-clock ùpclk_fck—+juclock-pclkx2-fck@6“ìti,divider-clock ùpclkx2_fck—+juclock-atclk-fck@4“ìti,divider-clock ùatclk_fck—+juclock-traceclk-src-fck@2“ì ti,mux-clockùtraceclk_src_fck—#()*æ,clock-traceclk-fck@11“ ìti,divider-clock ùtraceclk_fck—,judpll3_m3x2_mul_ckìfixed-factor-clock—-Œ—æ.dpll3_m3x2_ck@d00ìti,hsdiv-gate-clock—.] “ ¡æ/emu_core_alwon_ckìfixed-factor-clock—/Œ—æ(sys_altclkì fixed-clockMæ6mcbsp_clksì fixed-clockMæ core_ckìfixed-factor-clock— Œ—æ0dpll1_fck@940ìti,divider-clock—0]j“ @uæ1dpll1_ck@904ìti,omap3-dpll-clock—#1“  $ @ 4ædpll1_x2_ckìfixed-factor-clock—Œ—æ2dpll1_x2m2_ck@944ìti,divider-clock—2j“ DuæFcm_96m_fckìfixed-factor-clock—3Œ—æ4clock@d40 ti,clksel“ @ì+clock-dpll3-m2@27“ìti,divider-clock ùdpll3_m2_ck—juæ clock-omap-96m-fck@6“ì ti,mux-clock ùomap_96m_fck—4#æZclock-omap-54m-fck@5“ì ti,mux-clock ùomap_54m_fck—56æBclock-omap-48m-fck@3“ì ti,mux-clock ùomap_48m_fck—76æ:clock@e40 ti,clksel“@ì+clock-dpll4-m3@8“ìti,divider-clock ùdpll4_m3_ck—!j uæ8clock-dpll4-m4@0“ìti,divider-clock ùdpll4_m4_ck—!juæ;dpll4_m3x2_mul_ckìfixed-factor-clock—8Œ—æ9dpll4_m3x2_ck@d00ìti,hsdiv-gate-clock—9]“ ¡æ5cm_96m_d2_fckìfixed-factor-clock—4Œ—æ7omap_12m_fckìfixed-factor-clock—:Œ—æ[dpll4_m4x2_mul_ckìti,fixed-factor-clock—;·ÅÒæ<�dpll4_m4x2_ck@d00ìti,gate-clock—<�]“ ¡Òæ_dpll4_m5_ck@f40ìti,divider-clock—!j?“@uæ=dpll4_m5x2_mul_ckìti,fixed-factor-clock—=·ÅÒæ>dpll4_m5x2_ck@d00ìti,hsdiv-gate-clock—>]“ ¡Òæ{dpll4_m6x2_mul_ckìfixed-factor-clock—?Œ—æ@dpll4_m6x2_ck@d00ìti,hsdiv-gate-clock—@]“ ¡æAemu_per_alwon_ckìfixed-factor-clock—AŒ—æ)clock@d70 ti,clksel“ pì+clock-clkout2-src-gate@7“ì ti,composite-no-wait-gate-clockùclkout2_src_gate_ck—0æDclock-clkout2-src-mux@0“ìti,composite-mux-clockùclkout2_src_mux_ck—0#4BæEclock-sys-clkout2@3“ìti,divider-clock ùsys_clkout2—Cj@åclkout2_src_ckìti,composite-clock—DEæCmpu_ckìfixed-factor-clock—FŒ—æGarm_fck@924ìti,divider-clock—G“ $jemu_mpu_alwon_ckìfixed-factor-clock—GŒ—æ*clock@a40 ti,clksel“ @ì+clock-l3-ick@0“ìti,divider-clockùl3_ick—0juæHclock-l4-ick@2“ìti,divider-clockùl4_ick—HjuæJclock-gpt10-mux-fck@6“ìti,composite-mux-clockùgpt10_mux_fck—I#æWclock-gpt11-mux-fck@7“ìti,composite-mux-clockùgpt11_mux_fck—I#æYclock-ssi-ssr-div-fck-3430es2@8“ìti,composite-divider-clockùssi_ssr_div_fck_3430es2—$$ûæ€clock@c40 ti,clksel“ @ì+clock-rm-ick@1“ìti,divider-clockùrm_ick—Jjuclock-gpt1-mux-fck@0“ìti,composite-mux-clock ùgpt1_mux_fck—I#æbclock-usim-mux-fck@3“ìti,composite-mux-clock ùusim_mux_fck(—#KLMNOPQRSuæ„clock@a00 ti,clksel“ ì+clock-gpt10-gate-fck@11“ ìti,composite-gate-clockùgpt10_gate_fck—#æVclock-gpt11-gate-fck@12“ ìti,composite-gate-clockùgpt11_gate_fck—#æXclock-mmchs2-fck@25“ìti,wait-gate-clock ùmmchs2_fck—æºclock-mmchs1-fck@24“ìti,wait-gate-clock ùmmchs1_fck—æ»clock-i2c3-fck@17“ìti,wait-gate-clock ùi2c3_fck—æ¼clock-i2c2-fck@16“ìti,wait-gate-clock ùi2c2_fck—æ½clock-i2c1-fck@15“ìti,wait-gate-clock ùi2c1_fck—æ¾clock-mcbsp5-gate-fck@10“ ìti,composite-gate-clockùmcbsp5_gate_fck— æ clock-mcbsp1-gate-fck@9“ ìti,composite-gate-clockùmcbsp1_gate_fck— æ clock-mcspi4-fck@21“ìti,wait-gate-clock ùmcspi4_fck—Tæ¿clock-mcspi3-fck@20“ìti,wait-gate-clock ùmcspi3_fck—TæÀclock-mcspi2-fck@19“ìti,wait-gate-clock ùmcspi2_fck—TæÁclock-mcspi1-fck@18“ìti,wait-gate-clock ùmcspi1_fck—TæÂclock-uart2-fck@14“ìti,wait-gate-clock ùuart2_fck—TæÃclock-uart1-fck@13“ ìti,wait-gate-clock ùuart1_fck—TæÄclock-hdq-fck@22“ìti,wait-gate-clockùhdq_fck—UæÅclock-modem-fck@31“ìti,omap3-interface-clock ùmodem_fck—#æáclock-mspro-fck@23“ìti,wait-gate-clock ùmspro_fck—clock-ssi-ssr-gate-fck-3430es2@0“ì ti,composite-no-wait-gate-clockùssi_ssr_gate_fck_3430es2—$æclock-mmchs3-fck@30“ìti,wait-gate-clock ùmmchs3_fck—æÝgpt10_fckìti,composite-clock—VWgpt11_fckìti,composite-clock—XYcore_96m_fckìfixed-factor-clock—ZŒ—æcore_48m_fckìfixed-factor-clock—:Œ—æTcore_12m_fckìfixed-factor-clock—[Œ—æUcore_l3_ickìfixed-factor-clock—HŒ—æ\clock@a10 ti,clksel“ ì+clock-sdrc-ick@1“ìti,wait-gate-clock ùsdrc_ick—\æclock-mmchs2-ick@25“ìti,omap3-interface-clock ùmmchs2_ick—]æÆclock-mmchs1-ick@24“ìti,omap3-interface-clock ùmmchs1_ick—]æÇclock-hdq-ick@22“ìti,omap3-interface-clockùhdq_ick—]æÈclock-mcspi4-ick@21“ìti,omap3-interface-clock ùmcspi4_ick—]æÉclock-mcspi3-ick@20“ìti,omap3-interface-clock ùmcspi3_ick—]æÊclock-mcspi2-ick@19“ìti,omap3-interface-clock ùmcspi2_ick—]æËclock-mcspi1-ick@18“ìti,omap3-interface-clock ùmcspi1_ick—]æÌclock-i2c3-ick@17“ìti,omap3-interface-clock ùi2c3_ick—]æÍclock-i2c2-ick@16“ìti,omap3-interface-clock ùi2c2_ick—]æÎclock-i2c1-ick@15“ìti,omap3-interface-clock ùi2c1_ick—]æÏclock-uart2-ick@14“ìti,omap3-interface-clock ùuart2_ick—]æÐclock-uart1-ick@13“ ìti,omap3-interface-clock ùuart1_ick—]æÑclock-gpt11-ick@12“ ìti,omap3-interface-clock ùgpt11_ick—]æÒclock-gpt10-ick@11“ ìti,omap3-interface-clock ùgpt10_ick—]æÓclock-mcbsp5-ick@10“ ìti,omap3-interface-clock ùmcbsp5_ick—]æÔclock-mcbsp1-ick@9“ ìti,omap3-interface-clock ùmcbsp1_ick—]æÕclock-omapctrl-ick@6“ìti,omap3-interface-clock ùomapctrl_ick—]æÖclock-aes2-ick@28“ìti,omap3-interface-clock ùaes2_ick—]æclock-sha12-ick@27“ìti,omap3-interface-clock ùsha12_ick—]æ×clock-icr-ick@29“ìti,omap3-interface-clockùicr_ick—]clock-des2-ick@26“ìti,omap3-interface-clock ùdes2_ick—]clock-mspro-ick@23“ìti,omap3-interface-clock ùmspro_ick—]clock-mailboxes-ick@7“ìti,omap3-interface-clockùmailboxes_ick—]clock-sad2d-ick@3“ìti,omap3-interface-clock ùsad2d_ick—Hæâclock-hsotgusb-ick-3430es2@4“ì"ti,omap3-hsotgusb-interface-clockùhsotgusb_ick_3430es2—\æclock-ssi-ick-3430es2@0“ìti,omap3-ssi-interface-clockùssi_ick_3430es2—^æclock-mmchs3-ick@30“ìti,omap3-interface-clock ùmmchs3_ick—]æÜgpmc_fckìfixed-factor-clock—\Œ—core_l4_ickìfixed-factor-clock—JŒ—æ]clock@e00 ti,clksel“ì+clock-dss-tv-fckìti,gate-clock ùdss_tv_fck—B]æµclock-dss-96m-fckìti,gate-clock ùdss_96m_fck—Z]æ¶clock-dss2-alwon-fckìti,gate-clockùdss2_alwon_fck—#]æ·clock-dss1-alwon-fck-3430es2@0“ìti,dss-gate-clockùdss1_alwon_fck_3430es2—_Òæ¸dummy_ckì fixed-clockMclock@c00 ti,clksel“ ì+clock-gpt1-gate-fck@0“ìti,composite-gate-clockùgpt1_gate_fck—#æaclock-gpio1-dbck@3“ìti,gate-clock ùgpio1_dbck—`æ¬clock-wdt2-fck@5“ìti,wait-gate-clock ùwdt2_fck—`æ­clock-sr1-fck@6“ìti,wait-gate-clockùsr1_fck—#æclock-sr2-fck@7“ìti,wait-gate-clockùsr2_fck—#æclock-usim-gate-fck@9“ ìti,composite-gate-clockùusim_gate_fck—Zæƒgpt1_fckìti,composite-clock—abæwkup_32k_fckìfixed-factor-clock—IŒ—æ`clock@c10 ti,clksel“ ì+clock-wdt2-ick@5“ìti,omap3-interface-clock ùwdt2_ick—cæ®clock-wdt1-ick@4“ìti,omap3-interface-clock ùwdt1_ick—cæ¯clock-gpio1-ick@3“ìti,omap3-interface-clock ùgpio1_ick—cæ°clock-omap-32ksync-ick@2“ìti,omap3-interface-clockùomap_32ksync_ick—cæ±clock-gpt12-ick@1“ìti,omap3-interface-clock ùgpt12_ick—cæ²clock-gpt1-ick@0“ìti,omap3-interface-clock ùgpt1_ick—cæ³clock-usim-ick@9“ ìti,omap3-interface-clock ùusim_ick—cæ´per_96m_fckìfixed-factor-clock—3Œ—æ per_48m_fckìfixed-factor-clock—:Œ—ædclock@1000 ti,clksel“ì+clock-uart3-fck@11“ ìti,wait-gate-clock ùuart3_fck—dæ‘clock-gpt2-gate-fck@3“ìti,composite-gate-clockùgpt2_gate_fck—#æfclock-gpt3-gate-fck@4“ìti,composite-gate-clockùgpt3_gate_fck—#æhclock-gpt4-gate-fck@5“ìti,composite-gate-clockùgpt4_gate_fck—#æjclock-gpt5-gate-fck@6“ìti,composite-gate-clockùgpt5_gate_fck—#ælclock-gpt6-gate-fck@7“ìti,composite-gate-clockùgpt6_gate_fck—#ænclock-gpt7-gate-fck@8“ìti,composite-gate-clockùgpt7_gate_fck—#æpclock-gpt8-gate-fck@9“ ìti,composite-gate-clockùgpt8_gate_fck—#ærclock-gpt9-gate-fck@10“ ìti,composite-gate-clockùgpt9_gate_fck—#ætclock-gpio6-dbck@17“ìti,gate-clock ùgpio6_dbck—eæ’clock-gpio5-dbck@16“ìti,gate-clock ùgpio5_dbck—eæ“clock-gpio4-dbck@15“ìti,gate-clock ùgpio4_dbck—eæ”clock-gpio3-dbck@14“ìti,gate-clock ùgpio3_dbck—eæ•clock-gpio2-dbck@13“ ìti,gate-clock ùgpio2_dbck—eæ–clock-wdt3-fck@12“ ìti,wait-gate-clock ùwdt3_fck—eæ—clock-mcbsp2-gate-fck@0“ìti,composite-gate-clockùmcbsp2_gate_fck— æclock-mcbsp3-gate-fck@1“ìti,composite-gate-clockùmcbsp3_gate_fck— æclock-mcbsp4-gate-fck@2“ìti,composite-gate-clockùmcbsp4_gate_fck— æclock-uart4-fck@18“ìti,wait-gate-clock ùuart4_fck—dæ«clock@1040 ti,clksel“@ì+clock-gpt2-mux-fck@0“ìti,composite-mux-clock ùgpt2_mux_fck—I#ægclock-gpt3-mux-fck@1“ìti,composite-mux-clock ùgpt3_mux_fck—I#æiclock-gpt4-mux-fck@2“ìti,composite-mux-clock ùgpt4_mux_fck—I#ækclock-gpt5-mux-fck@3“ìti,composite-mux-clock ùgpt5_mux_fck—I#æmclock-gpt6-mux-fck@4“ìti,composite-mux-clock ùgpt6_mux_fck—I#æoclock-gpt7-mux-fck@5“ìti,composite-mux-clock ùgpt7_mux_fck—I#æqclock-gpt8-mux-fck@6“ìti,composite-mux-clock ùgpt8_mux_fck—I#æsclock-gpt9-mux-fck@7“ìti,composite-mux-clock ùgpt9_mux_fck—I#æugpt2_fckìti,composite-clock—fgægpt3_fckìti,composite-clock—higpt4_fckìti,composite-clock—jkgpt5_fckìti,composite-clock—lmgpt6_fckìti,composite-clock—nogpt7_fckìti,composite-clock—pqgpt8_fckìti,composite-clock—rsgpt9_fckìti,composite-clock—tuper_32k_alwon_fckìfixed-factor-clock—IŒ—æeper_l4_ickìfixed-factor-clock—JŒ—ævclock@1010 ti,clksel“ì+clock-gpio6-ick@17“ìti,omap3-interface-clock ùgpio6_ick—væ˜clock-gpio5-ick@16“ìti,omap3-interface-clock ùgpio5_ick—væ™clock-gpio4-ick@15“ìti,omap3-interface-clock ùgpio4_ick—væšclock-gpio3-ick@14“ìti,omap3-interface-clock ùgpio3_ick—væ›clock-gpio2-ick@13“ ìti,omap3-interface-clock ùgpio2_ick—væœclock-wdt3-ick@12“ ìti,omap3-interface-clock ùwdt3_ick—væclock-uart3-ick@11“ ìti,omap3-interface-clock ùuart3_ick—væžclock-uart4-ick@18“ìti,omap3-interface-clock ùuart4_ick—væŸclock-gpt9-ick@10“ ìti,omap3-interface-clock ùgpt9_ick—væ clock-gpt8-ick@9“ ìti,omap3-interface-clock ùgpt8_ick—væ¡clock-gpt7-ick@8“ìti,omap3-interface-clock ùgpt7_ick—væ¢clock-gpt6-ick@7“ìti,omap3-interface-clock ùgpt6_ick—væ£clock-gpt5-ick@6“ìti,omap3-interface-clock ùgpt5_ick—væ¤clock-gpt4-ick@5“ìti,omap3-interface-clock ùgpt4_ick—væ¥clock-gpt3-ick@4“ìti,omap3-interface-clock ùgpt3_ick—væ¦clock-gpt2-ick@3“ìti,omap3-interface-clock ùgpt2_ick—væ§clock-mcbsp2-ick@0“ìti,omap3-interface-clock ùmcbsp2_ick—væ¨clock-mcbsp3-ick@1“ìti,omap3-interface-clock ùmcbsp3_ick—væ©clock-mcbsp4-ick@2“ìti,omap3-interface-clock ùmcbsp4_ick—væªemu_src_ckìti,clkdm-gate-clock—wæ+secure_32k_fckì fixed-clockM€æxgpt12_fckìfixed-factor-clock—xŒ—æwdt1_fckìfixed-factor-clock—xŒ—security_l4_ick2ìfixed-factor-clock—JŒ—æyclock@a14 ti,clksel“ ì+clock-aes1-ick@3“ìti,omap3-interface-clock ùaes1_ick—yæclock-rng-ick@2“ìti,omap3-interface-clockùrng_ick—yæÿclock-sha11-ick@1“ìti,omap3-interface-clock ùsha11_ick—yclock-des1-ick@0“ìti,omap3-interface-clock ùdes1_ick—yclock-pka-ick@4“ìti,omap3-interface-clockùpka_ick—zclock@f00 ti,clksel“ì+clock-cam-mclk@0“ìti,gate-clock ùcam_mclk—{Òclock-csi2-96m-fck@1“ìti,gate-clock ùcsi2_96m_fck—æßcam_ick@f10ì!ti,omap3-no-wait-interface-clock—J“]æÞsecurity_l3_ickìfixed-factor-clock—HŒ—æzssi_l4_ickìfixed-factor-clock—JŒ—æ^sr_l4_ickìfixed-factor-clock—JŒ—dpll2_fck@40ìti,divider-clock—0]j“@uæ|dpll2_ck@4ìti,omap3-dpll-clock—#|“$@4!æ}dpll2_m2_ck@44ìti,divider-clock—}j“Duæ~iva2_ck@0ìti,wait-gate-clock—~“]æàclock@a18 ti,clksel“ ì5+clock-mad2d-ick@3“ìti,omap3-interface-clock ùmad2d_ick—Hæãclock-usbtll-ick@2“ìti,omap3-interface-clock ùusbtll_ick—]æÛssi_ssr_fck_3430es2ìti,composite-clock—€æssi_sst_fck_3430es2ìfixed-factor-clock—Œ—æsys_d2_ckìfixed-factor-clock—#Œ—æKomap_96m_d2_fckìfixed-factor-clock—ZŒ—æLomap_96m_d4_fckìfixed-factor-clock—ZŒ—æMomap_96m_d8_fckìfixed-factor-clock—ZŒ—æNomap_96m_d10_fckìfixed-factor-clock—ZŒ— æOdpll5_m2_d4_ckìfixed-factor-clock—‚Œ—æPdpll5_m2_d8_ckìfixed-factor-clock—‚Œ—æQdpll5_m2_d16_ckìfixed-factor-clock—‚Œ—æRdpll5_m2_d20_ckìfixed-factor-clock—‚Œ—æSusim_fckìti,composite-clock—ƒ„dpll5_ck@d04ìti,omap3-dpll-clock—##“  $ L 4æ…dpll5_m2_ck@d50ìti,divider-clock—…j“ Puæ‚sgx_gate_fck@b00ìti,composite-gate-clock—0]“ æcore_d3_ckìfixed-factor-clock—0Œ—æ†core_d4_ckìfixed-factor-clock—0Œ—æ‡core_d6_ckìfixed-factor-clock—0Œ—æˆomap_192m_alwon_fckìfixed-factor-clock—'Œ—æ‰core_d2_ckìfixed-factor-clock—0Œ—æŠsgx_mux_fck@b40ìti,composite-mux-clock —†‡ˆ4‰Š‹Œ“ @æŽsgx_fckìti,composite-clock—Žæsgx_ick@b10ìti,wait-gate-clock—H“ ]æäcpefuse_fck@a08ìti,gate-clock—#“ ]æØts_fck@a08ìti,gate-clock—I“ ]æÙusbtll_fck@a08ìti,wait-gate-clock—‚“ ]æÚdss_ick_3430es2@e10ìti,omap3-dss-interface-clock—J“]æ¹usbhost_120m_fck@1400ìti,gate-clock—‚“]æåusbhost_48m_fck@1400ìti,dss-gate-clock—:“]ææusbhost_ick@1410ìti,omap3-dss-interface-clock—J“]æçclockdomainscore_l3_clkdmti,clockdomain—dpll3_clkdmti,clockdomain—dpll1_clkdmti,clockdomain—per_clkdmti,clockdomainl—‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨©ª«emu_clkdmti,clockdomain—+dpll4_clkdmti,clockdomain—!wkup_clkdmti,clockdomain$—¬­®¯°±²³´dss_clkdmti,clockdomain—µ¶·¸¹core_l4_clkdmti,clockdomain”—º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚÛÜÝcam_clkdmti,clockdomain—Þßiva2_clkdmti,clockdomain—àdpll2_clkdmti,clockdomain—}d2d_clkdmti,clockdomain —áâãdpll5_clkdmti,clockdomain—…sgx_clkdmti,clockdomain—äusbhost_clkdmti,clockdomain —åæçtarget-module@48320000ti,sysc-omap2ti,sysc“H2H2  revsysc#—`±žfckick+ H2counter@0ti,omap-counter32k“ interrupt-controller@48200000ti,omap3-intc*“H ætarget-module@48056000ti,sysc-omap2ti,sysc“H`H`,H`( revsyscsyss# B #1—\žick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma“î P[ 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=N  Jtripscpu_alert Z8€ fÐŽpassiveæcpu_crit Z_ fÐ Žcriticalcooling-mapsmap0 q vÿÿÿÿÿÿÿÿmemory@80000000‡memory“€ soundti,omap-twl4030 …igep2 Žregulator-vdd33regulator-fixed­vdd33 —regulator-vddvarioregulator-fixed ­vddvario —æ regulator-vdd33aregulator-fixed­vdd33a —æ ledszdefaultˆ gpio-ledsboot «omap3:green:boot ù ±onuser0 «omap3:red:user0 ù ±offuser1 «omap3:red:user1 ù ±offuser2 «omap3:green:user1 øhsusb1_power_regregulator-fixed ­hsusb1_vbus¼2Z Ô2Z  ¿ø Äpæhsusb1_phyusb-nop-xceiv Õù á!æencoder ti,tfp410 ì ports+port@0“endpoint Bæport@1“endpoint Bæ!connectordvi-connector «dvi ü  portendpoint B!æfixedregulator-mmcsdioregulator-fixed­vmmcsdio_fixed¼2Z Ô2Z æümmc2_pwrseqmmc-pwrseq-simple Õ" " æý compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpioswp-gpiosmmc-pwrseqnon-removablestatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mcbspregulator-always-onlabeldefault-stategpiostartup-delay-usreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus