Ð
þíU-8NX(ÕN ,Hardkernel ODROID-C1%2hardkernel,odroid-c1amlogic,meson8biio-hwmon
2iio-hwmon=soc2simple-busIbus@c11000002simple-busPÁ IÁ system-controller@4000,2amlogic,meson-hhi-sysctrlsimple-mfdsysconP@T
clock-controller2amlogic,meson8b-clkc\
cxtalddr_pllo|Tpower-controller2amlogic,meson8b-pwrc‰X°BCKO†‡‰
…F·dblkpic_dchdmi_apbhdmi_systemvencivencpvdacvenclviuvencrdma\¾cvpuþÓ
ÛG‰T audio-controller@5400 2amlogic,aiu-meson8bamlogic,aiuèùAIUPT¬02
i2sspdif &disabledH\&(PÑ,'QÔÕ\cpclki2s_pclki2s_aoclki2s_mclki2s_mixerspdif_pclkspdif_aoclkspdif_mclkspdif_mclk_sel°assist@7c002amlogic,meson-mx-assistsysconP|rng@81002amlogic,meson-rngP\ccoreserial@84c02amlogic,meson8b-uartP„À-€ &disabled\
cxtalpclkbaudserial@84dc2amlogic,meson8b-uartP„ÜK &disabled\0
cxtalpclkbaudi2c@85002amlogic,meson6-i2cP… &disabled\pwm@85502amlogic,meson8b-pwmP…P7 &disabledpwm@86502amlogic,meson8b-pwmP†P7&okayB Ldefault\cclkin0clkin1T2adc@8680,2amlogic,meson8b-saradcamlogic,meson-saradcP†€4ZI&okay\cclkincorel
€Œtemperature_calibTserial@87002amlogic,meson8b-uartP‡] &disabled\D
cxtalpclkbaudi2c@87c02amlogic,meson6-i2cP‡À € &disabled\phy@880032amlogic,meson8b-usb2-phyamlogic,meson-mx-usb2-phy©Pˆ &disabled\72cusb_generalusb°"Tphy@882032amlogic,meson8b-usb2-phyamlogic,meson-mx-usb2-phy©Pˆ &okay\73cusb_generalusb°"Tmmc@8c20+2amlogic,meson8b-sdioamlogic,meson-mx-sdioPŒ &okay\
ccoreclkinB
Ldefaultslot@1 2mmc-slotP&okay´¾ÆØéô5ý spi@8c802amlogic,meson6-spifcPŒ€€ &disabledmmc@8e00*2amlogic,meson8-sdhcamlogic,meson-mx-sdhcPŽBN&okay$\!cclkin0clkin1clkin2clkin3pclkBLdefault´õáéÆ$¾3ý interrupt-controller@988022amlogic,meson8b-gpio-intcamlogic,meson-gpio-intcP˜€>S d@ABCDEFG&okayT$watchdog@99002amlogic,meson8b-wdtP™timer@99402amlogic,meson6-timerP™@0
\
cxtalpclkreset-controller@44042amlogic,meson8b-resetPDœ|Tanalog-top@81a8"2amlogic,meson8b-analog-topsysconP¨pwm@86c02amlogic,meson8b-pwmP†À7 &disabledclock-measure@87582amlogic,meson8b-clk-measureP‡Xpinctrl@98802amlogic,meson8b-cbus-pinctrlP˜€ITbanks@80b0 P€°(€è €08muxpullpull-enablegpio‰™¥SÕ±J2 Header Pin 35J2 Header Pin 36J2 Header Pin 32J2 Header Pin 31J2 Header Pin 29J2 Header Pin 18J2 Header Pin 22J2 Header Pin 16J2 Header Pin 23J2 Header Pin 21J2 Header Pin 19J2 Header Pin 33J2 Header Pin 8J2 Header Pin 10J2 Header Pin 15J2 Header Pin 13J2 Header Pin 24J2 Header Pin 26Revision (upper)Revision (lower)J2 Header Pin 7J2 Header Pin 12J2 Header Pin 11TFLASH_VDD_ENVCCK_PWM (PWM_C)I2CA_SDAI2CA_SCLI2CB_SDAI2CB_SCLVDDEE_PWM (PWM_D)HDMI_HPDHDMI_I2C_SDAHDMI_I2C_SCLETH_PHY_INTRETH_PHY_NRSTETH_TXD1ETH_TXD0ETH_TXD3ETH_TXD2ETH_RGMII_TX_CLKSD_DATA1 (SDB_D1)SD_DATA0 (SDB_D0)SD_CLKSD_CMDSD_DATA3 (SDB_D3)SD_DATA2 (SDB_D2)SD_CDN (SD_DET_N)SDC_D0 (EMMC)SDC_D1 (EMMC)SDC_D2 (EMMC)SDC_D3 (EMMC)SDC_D4 (EMMC)SDC_D5 (EMMC)SDC_D6 (EMMC)SDC_D7 (EMMC)SDC_CLK (EMMC)SDC_RSTn (EMMC)SDC_CMD (EMMC)BOOT_SELETH_RXD1ETH_RXD0ETH_RX_DVRGMII_RX_CLKETH_RXD3ETH_RXD2ETH_TXENETH_PHY_REF_CLK_25MOUTETH_MDCETH_MDIOTeth-rgmiiT!mux–Áeth_tx_clketh_tx_eneth_txd1_0eth_txd0_0eth_rx_clketh_rx_dveth_rxd1eth_rxd0eth_mdio_eneth_mdceth_ref_clketh_txd2eth_txd3eth_rxd3eth_rxd2 ÈethernetÑeth-rmiimux[Áeth_tx_eneth_txd1_0eth_txd0_0eth_rx_clketh_rx_dveth_rxd1eth_rxd0eth_mdio_eneth_mdc ÈethernetÑi2c-amuxÁi2c_sda_ai2c_sck_aÈi2c_aÑsd-bT
mux2Ásd_d0_bsd_d1_bsd_d2_bsd_d3_bsd_clk_bsd_cmd_bÈsd_bÑsdxc-cTmux6Ásdxc_d0_csdxc_d13_csdxc_d47_csdxc_clk_csdxc_cmd_cÈsdxc_cÞpwm-c1TmuxÁpwm_c1Èpwm_cÑpwm-dT muxÁpwm_dÈpwm_dÑuart-b0muxÁuart_tx_b0uart_rx_b0Èuart_bÑuart-b0-cts-rtsmuxÁuart_cts_b0uart_rts_b0Èuart_bÑcache-controller@c42000002arm,pl310-cachePÄ ëù&À8FUi}T%bus@c43000002simple-busPÄ0IÄ0interrupt-controller@10002arm,cortex-a9-gicP>STscu@02arm,cortex-a5-scuPtimer@2002arm,cortex-a5-global-timerP \~ &disabledtimer@6002arm,cortex-a5-twd-timerP
\~bus@c81000002simple-busPÈIÈremoteproc@1c/2amlogic,meson8b-ao-arcamlogic,meson-mx-ao-arcP8
remapcpu &disabled£³°M\Yir-receiver@4802amlogic,meson6-irP€ &okayBLdefaultserial@4c0+2amlogic,meson8b-uartamlogic,meson-ao-uartPÀZ&okay\
cxtalpclkbaudBLdefaulti2c@5002amlogic,meson6-i2cP \ &disabled\
rtc@7402amlogic,meson8b-rtcP@H &disabled°Š\¸pmu@e02amlogic,meson8b-pmusysconPàTpinctrl@842amlogic,meson8b-aobus-pinctrlP„ITao-bank@14P,$muxpullgpio‰™¥¥±UART TXUART RXTF_3V3N_1V8_ENUSB_HUB_RST_NUSB_OTG_PWRENJ7 Header Pin 2IR_INJ7 Header Pin 4J7 Header Pin 6J7 Header Pin 5J7 Header Pin 7HDMI_CECSYS_LEDTi2s-am-clk-outmuxÁi2s_am_clk_outÈi2sÑi2s-ao-clk-outmuxÁi2s_ao_clk_outÈi2sÑi2s-lr-clk-outmuxÁi2s_lr_clk_outÈi2sÑi2s-out-ch01muxÁi2s_out_01Èi2sÑspdif-out-1muxÁspdif_out_1Èspdif_1Ñuart_ao_aTmuxÁuart_tx_ao_auart_rx_ao_aÈuart_aoÑremoteTmux
Áremote_inputÈremoteÑusb@c90400002amlogic,meson8b-usbsnps,dwc2PÉÃ Èusb2-phyÒáôóÀ€€€host &disabled\Acotgusb@c90c00002amlogic,meson8b-usbsnps,dwc2PÉÃ Èusb2-phyhost&okay\@cotghub@12usb5e3,610P¸
ethernet@c941000022amlogic,meson8b-dwmacsnps,dwmac-3.70asnps,dwmacPÉAÁ@macirq&okay \$__*cstmmacethclkin0clkin1timing-adjustment#°+
·stmmaceth1 B!Ldefault?" Jrgmii-id€#Œmac-addressmdio2snps,dwmac-mdioethernet-phy@0PS'c8€u)$T"sram@d9000000
2mmio-sramPÙIÙao-arc-sram@02amlogic,meson8b-ao-arc-sramP€Tsmp-sram@1ff802amlogic,meson8b-smp-sramPÿ€bootrom@d9040000 2amlogic,meson-mx-bootromsysconPÙbus@da0000002simple-busPÚ`IÚ`nvmem@02amlogic,meson8b-efuseP \:ccorecalib@1f4PôTmac@1b4P´T#system-controller@40002amlogic,meson8b-secbus2sysconP@ Tthermal-sensor2generic-adc-thermal†=œsensor-channelT,xtal-clk2fixed-clockn6½xtaloTcpuscpu@200Ðcpu2arm,cortex-a5Ü%Píamlogic,meson8b-smp°û&\'T(cpu@201Ðcpu2arm,cortex-a5Ü%Píamlogic,meson8b-smp°û&\T)cpu@202Ðcpu2arm,cortex-a5Ü%Píamlogic,meson8b-smp°û&\T*cpu@203Ðcpu2arm,cortex-a5Ü%Píamlogic,meson8b-smp°û&\T+opp-table2operating-points-v2)T&opp-960000004¸Ø;
`opp-1920000004q°;
`opp-3120000004˜¾;
`opp-4080000004Q–;
`opp-5040000004
n;
`opp-6000000004#ÃF;
`opp-7200000004*êT;
`opp-81600000040£,;
» opp-10080000004<Ü;e opp-12000000004G†Œ;e opp-13200000004Nš;e opp-14880000004X±;e opp-15360000004[€;e opp-table-gpu2operating-points-v2T0opp-25500000042ýÀ;Èàopp-3642857144¶;Èàopp-4250000004Tü@;Èàopp-5100000004eû€;Èàopp-6375000004%ÿz`;ÈàIpmu2arm,cortex-a5-pmu0‰Š™šT()*+reserved-memoryIhwrom@0P gthermal-zonessocnú„è’,cooling-mapsmap0¢-<�§(ÿÿÿÿÿÿÿÿ)ÿÿÿÿÿÿÿÿ*ÿÿÿÿÿÿÿÿ+ÿÿÿÿÿÿÿÿ.ÿÿÿÿÿÿÿÿmap1¢/<�§(ÿÿÿÿÿÿÿÿ)ÿÿÿÿÿÿÿÿ*ÿÿÿÿÿÿÿÿ+ÿÿÿÿÿÿÿÿ.ÿÿÿÿÿÿÿÿtripssoc-passive¶8€ÂÐ×passiveT-soc-hot¶_ÂÐ×hotT/soc-critical¶°ÂÐ ×criticalbus@c80000002simple-busPÈ€IÈ€clock-controller@4002amlogic,meson8b-ddr-clkcP \cxtaloTbus@60002simple-busP`I`video-lut@48&2amlogic,meson8b-canvasamlogic,canvasPHbus@d00000002simple-busPÐ IÐ gpu@c0000"2amlogic,meson8b-maliarm,mali-450P` ¡¢£¤¥¦§&gpgpmmupppmupp0ppmmu0pp1ppmmu1°N\
cbuscoreû0Í1T.aliasesÙ/soc/bus@c8100000/serial@4c0"á/soc/bus@c1100000/mmc@8c20/slot@1æ/soc/bus@c1100000/mmc@8e00chosenëserial0:115200n8memoryÐmemoryP@@emmc-pwrseq2mmc-pwrseq-emmcu?Tleds
2gpio-ledsled-blue÷c1:blue:alive÷
ýheartbeatoffregulator-p5v02regulator-fixed!P5V00LK@HLK@Tregulator-tflash_vdd2regulator-fixed!TFLASH_VDD02Z H2Z `kTgpio-regulator-tf_io2regulator-gpio!TF_IO0w@H2Z `÷~„2Z w@Trtc32k-xtal-clk2fixed-clock€½RTC32KoTregulator-vcc-1v82regulator-fixed!VCC1V80w@Hw@`Tregulator-vcc-3v32regulator-fixed!VCC3V302Z H2Z `Tregulator-vcck2pwm-regulator!VCCK0
`He ‹–2/º›[¯ÁT'regulator-vddc-ddr2regulator-fixed !DDR_VDDC0ã`Hã``regulator-vddee2pwm-regulator!VDDEE0
`He ‹–2/º›[¯ÁT1regulator-vdd-rtc2regulator-fixed!VDD_RTC0
» H
» `T #address-cells#size-cellsinterrupt-parentmodelcompatibleio-channelsrangesregphandleclocksclock-names#clock-cells#reset-cells#power-domain-cellsamlogic,ao-sysctrlresetsreset-namesassigned-clocksassigned-clock-rates#sound-dai-cellssound-name-prefixinterruptsinterrupt-namesstatusfifo-size#pwm-cellspinctrl-0pinctrl-names#io-channel-cellsamlogic,hhi-sysctrlnvmem-cellsnvmem-cell-namesvref-supply#phy-cellsbus-widthno-sdiocap-mmc-highspeedcap-sd-highspeeddisable-wpcd-gpiosvmmc-supplyvqmmc-supplymax-frequencymmc-hs200-1_8vmmc-pwrseqinterrupt-controller#interrupt-cellsamlogic,channel-interruptsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namesgroupsfunctionbias-disablebias-pull-upcache-unifiedcache-levelarm,data-latencyarm,tag-latencyarm,filter-rangesprefetch-dataprefetch-instrarm,prefetch-offsetarm,double-linefillarm,prefetch-droparm,shared-overrideamlogic,secbus2sramvdd-supplyphysphy-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modereset-gpiorx-fifo-depthtx-fifo-depthpower-domainsphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiospool#thermal-sensor-cellsio-channel-namesclock-frequencyclock-output-namesdevice_typenext-level-cacheenable-methodoperating-points-v2#cooling-cellscpu-supplyopp-sharedopp-hzopp-microvoltturbo-modeinterrupt-affinityno-mappolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresismali-supplyserial0mmc0mmc1stdout-pathlabellinux,default-triggerdefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highgpios-statespwm-supplypwmspwm-dutycycle-rangeregulator-boot-onregulator-always-on