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&tclkpclká;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiþ°áF:—’&spiclkapb_pclkC--Htxrxã p¨©ªzdefault+ @disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiþ±áG:˜“&spiclkapb_pclkC--Htxrxã p«¬­zdefault+ @disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiþ²áH:™”&spiclkapb_pclkCššHtxrxãp®¯zdefault+@okayA™Q ëÂpmic@0rockchip,rk806êB@ °ázdefaultp±²³´ü , , ,, 8, D, P, \, h, t, €, µ š, §¶ ´¶ Á, Í Ýdvs1-null-pins égpio_pwrctrl1 îpin_fun0'²dvs2-null-pins égpio_pwrctrl2 îpin_fun0'³dvs3-null-pins égpio_pwrctrl3 îpin_fun0'´regulatorsdcdc-reg1ÈÚdpò~ð 0Ô ¥vdd_gpu_s0 ÷regulator-state-mem*dcdc-reg2´ÈÚdpò~ð 0Ô¥vdd_cpu_lit_s0'regulator-state-mem*dcdc-reg3´ÈÚ L¸ò q° 0Ô ¥vdd_log_s0regulator-state-mem*  q°dcdc-reg4´ÈÚdpò~ð 0Ô ¥vdd_vdenc_s0regulator-state-mem*dcdc-reg5´ÈÚ L¸ò »  0Ô ¥vdd_ddr_s0regulator-state-mem*  øPdcdc-reg6´È ¥vdd2_ddr_s3regulator-state-mem /dcdc-reg7´ÈÚ„€ò„€ 0Ô¥vdd_2v0_pldo_s3'µregulator-state-mem / „€dcdc-reg8´ÈÚ2Z ò2Z  ¥vcc_3v3_s3'öregulator-state-mem / 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Htxrxp»zdefault\R@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartþ¶áN:³¡&baudclkapb_pclkC- - Htxrxp¼zdefault\R @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartþ·áO:·¢&baudclkapb_pclkCš š Htxrxp½zdefault\R @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartþ¸áP:»£&baudclkapb_pclkCš š Htxrxp¾zdefault\R @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartþ¹áQ:¿¤&baudclkapb_pclkCš šHtxrxp¿zdefault\R @disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartþºáR:Ã¥&baudclkapb_pclkCggHtxrxpÀzdefault\R @disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartþ»áS:Ǧ&baudclkapb_pclkCg g HtxrxpÁzdefault\R @disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼áT:˧&baudclkapb_pclkCg g HtxrxpÂzdefault\R @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkpÃzdefaulti @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkpÄzdefaulti @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ :LK &pwmpclkpÅzdefaulti @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0:LK &pwmpclkpÆzdefaulti @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkpÇzdefaulti @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkpÈzdefaulti @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ :ON &pwmpclkpÉzdefaulti @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0:ON &pwmpclkpÊzdefaulti @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkpËzdefaulti @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkpÌzdefaulti @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ :RQ &pwmpclkpÍzdefaulti @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0:RQ &pwmpclkpÎzdefaulti @disabledthermal-zonespackage-thermal G ] kÏtripspackage-crit {Á8 ‡ criticalbigcore0-thermal Gd ] kÏtripsbigcore0-alert {L ‡Ðpassive'Ðbigcore0-crit {Á8 ‡ criticalcooling-mapsmap0 ’Ð —ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal Gd ] kÏtripsbigcore2-alert {L ‡Ðpassive'Ñbigcore2-crit {Á8 ‡ criticalcooling-mapsmap0 ’Ñ —ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal Gd ] kÏtripslittlecore-alert {L ‡Ðpassive'Òlittlecore-crit {Á8 ‡ criticalcooling-mapsmap0 ’Ò0 —ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal G ] kÏtripscenter-crit {Á8 ‡ criticalgpu-thermal Gd ] kÏtripsgpu-alert {L ‡Ðpassive'Ógpu-crit {Á8 ‡ criticalcooling-mapsmap0 ’Ó —Ôÿÿÿÿÿÿÿÿnpu-thermal G ] kÏtripsnpu-crit {Á8 ‡ criticaltsadc@fec00000rockchip,rk3588-tsadcþÀá:ž&tsadcapb_pclkAžQ„€gVWAtsadc-apbtsadc ¦ÔÀ ½ ÔpÕ ïÖ zgpiootpout ù@okay'Ïadc@fec10000rockchip,rk3588-saradcþÁᎠ:‘&saradcapb_pclkgU Asaradc-apb@okay !×'ði2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ:ˆ€ &i2cpclkáCpØzdefault+@okayì @rtc@51haoyu,hym8563QÇühym8563zdefaultpÙ °á -i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ:‰ &i2cpclkáDpÚzdefault+ @disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ:Š‚ &i2cpclkáEpÛzdefault+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËáJ:›–&spiclkapb_pclkCg gHtxrxã pÜÝÞzdefault+ @disabledefuse@fecc0000rockchip,rk3588-otpþÌ :Œ‹&otpapb_pclkphyarbg§¦¨ Aotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c ;npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ áZ[Á:p &apb_pclkØ'gphy@fed60000rockchip,rk3588-hdptx-phyþÖ : T&refapbM8g#cde!""Aphyapbinitcmnlaneroplllcpllcß @disabledphy@fed80000rockchip,rk3588-usbdp-phyþØM:¡lVà&refclkimmortalpclkutmi(g   Ainitcmnlanepcs_apbpma_apb @á Sâ dã zä @disabled'#phy@fee00000rockchip,rk3588-naneng-combphyþà:¨vW &refapbpipeA¨QõáMg<�CAphyapb Š* œå@okay'nphy@fee20000rockchip,rk3588-naneng-combphyþâ:ªxW &refapbpipeAªQõáMg>EAphyapb Š* œæ@okay'(sram@ff001000 mmio-sramÿðÿð+pinctrlrockchip,rk3588-pinctrlcç+'ègpio@fd8a0000rockchip,gpio-bankýŠá:qr Í ²è  Ý'°gpio@fec20000rockchip,gpio-bankþÂá:st Í ²è  Ý'kgpio@fec30000rockchip,gpio-bankþÃá:uv Í ²è@  Ýgpio@fec40000rockchip,gpio-bankþÄá:wx Í ²è`  Ý'ogpio@fec50000rockchip,gpio-bankþÅá:yz Í ²è€  Ý'÷pcfg-pull-up ¾'ípcfg-pull-down Ë'ëpcfg-pull-none Ú'épcfg-pull-none-drv-level-2 Ú ç'ïpcfg-pull-up-drv-level-1 ¾ ç'îpcfg-pull-up-drv-level-2 ¾ ç'êpcfg-pull-none-smt Ú ö'ìauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout é'emmc-bus8€ êêêêêêêê'‚emmc-clk ê'ƒemmc-cmd ê'„emmc-data-strobe ë'…eth1fspigmac1gmac1-miim éé'tgmac1-rx-bus20 éé é'vgmac1-tx-bus20  é é é'ugmac1-rgmii-clk éé'wgmac1-rgmii-bus@ éééé'xgpuhdmii2c0i2c0m2-xfer ìì'+i2c1i2c1m0-xfer ì ì'£i2c2i2c2m0-xfer  ì ì'¤i2c3i2c3m0-xfer  ì ì'¥i2c4i2c4m0-xfer  ì ì'¦i2c5i2c5m0-xfer  ì ì'§i2c6i2c6m0-xfer  ì ì'Øi2c7i2c7m0-xfer  ì ì'Úi2c8i2c8m0-xfer  ì ì'Ûi2s0i2s0-lrck é'†i2s0-sclk é'‡i2s0-sdi0 é'ˆi2s0-sdi1 é'‰i2s0-sdi2 é'Ši2s0-sdi3 é'‹i2s0-sdo0 é'Œi2s0-sdo1 é'i2s0-sdo2 é'Ži2s0-sdo3 é'i2s1i2s1m0-lrck é'i2s1m0-sclk é'‘i2s1m0-sdi0 é'’i2s1m0-sdi1 é'“i2s1m0-sdi2 é'”i2s1m0-sdi3 é'•i2s1m0-sdo0  é'–i2s1m0-sdo1  é'—i2s1m0-sdo2  é'˜i2s1m0-sdo3  é'™i2s2i2s2m1-lrck é'›i2s2m1-sclk  é'œi2s2m1-sdi  é'i2s2m1-sdo  é'ži2s3i2s3-lrck é'Ÿi2s3-sclk é' i2s3-sdi é'¡i2s3-sdo é'¢jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp íéééééé'±pmupwm0pwm0m0-pins é'/pwm1pwm1m0-pins é'0pwm2pwm2m0-pins é'1pwm3pwm3m0-pins é'2pwm4pwm4m0-pins  é'Ãpwm5pwm5m0-pins é'Äpwm6pwm6m0-pins  é'Åpwm7pwm7m0-pins  é'Æpwm8pwm8m0-pins  é'Çpwm9pwm9m0-pins  é'Èpwm10pwm10m0-pins  é'Épwm11pwm11m0-pins  é'Êpwm12pwm12m0-pins  é'Ëpwm13pwm13m0-pins  é'Ìpwm14pwm14m0-pins  é'Ípwm15pwm15m0-pins  é'Îrefclksatasata0sata1sata2sdiosdiom1-pins` éééééé'€sdmmcsdmmc-bus4@ êêêê'}sdmmc-clk ê'zsdmmc-cmd ê'{sdmmc-det í'|sd-s0-pwr  í'øspdif0spdif1spi0spi0m0-pins0 îîî'ªspi0m0-cs0 î'¨spi0m0-cs1 î'©spi1spi1m1-pins0 îîî'­spi1m1-cs0 î'«spi1m1-cs1 î'¬spi2spi2m2-pins0 î îî'¯spi2m2-cs0 î'®spi3spi3m1-pins0 î îî'¹spi3m1-cs0 î'·spi3m1-cs1 î'¸spi4spi4m0-pins0 îîî'Þspi4m0-cs0 î'Üspi4m0-cs1 î'Ýtsadctsadc-shut é'Öuart0uart0m1-xfer í í'.uart1uart1m1-xfer  í í'ºuart2uart2m0-xfer  í í'»uart3uart3m1-xfer  í í'¼uart4uart4m1-xfer  í í'½uart5uart5m1-xfer  í í'¾uart6uart6m1-xfer  í í'¿uart7uart7m1-xfer  í í'Àuart8uart8m1-xfer  í í'Áuart9uart9m1-xfer  í í'Âvopbt656gpio-functsadc-gpio-func é'Õgpio-keykey1-pin í'ñgpio-ledssys-led-pin é'òwan-led-pin é'ólan1-led-pin é'ôlan2-led-pin é'õhym8563rtc-int í'Ùusbtypec5v-pwren é'ùvcc5v0-host20-en  é'ûrtl8211frtl8211f-rst é'yopp-table-cluster0operating-points-v2 ' opp-1008000000 $<Ü + L¸ L¸~ð 9œ@opp-1200000000 $G†Œ + ß4 ß4~ð 9œ@opp-1416000000 $Tfr + ¢„ ¢„~ð 9œ@ Jopp-1608000000 $_Ø" + øP øP~ð 9œ@opp-1800000000 $kIÒ +~ð~ð~ð 9œ@opp-table-cluster1operating-points-v2 'opp-1200000000 $G†Œ + L¸ L¸B@ 9œ@opp-1416000000 $Tfr +  B@ 9œ@opp-1608000000 $_Ø" + ¢„ ¢„B@ 9œ@opp-1800000000 $kIÒ + øP øPB@ 9œ@opp-2016000000 $x)¸ +HHB@ 9œ@opp-2208000000 $ƒ›h +llB@ 9œ@opp-2400000000 $  +B@B@B@ 9œ@opp-table-cluster2operating-points-v2 'opp-1200000000 $G†Œ + L¸ L¸B@ 9œ@opp-1416000000 $Tfr +  B@ 9œ@opp-1608000000 $_Ø" + ¢„ ¢„B@ 9œ@opp-1800000000 $kIÒ + øP øPB@ 9œ@opp-2016000000 $x)¸ +HHB@ 9œ@opp-2208000000 $ƒ›h +llB@ 9œ@opp-2400000000 $  +B@B@B@ 9œ@opp-tableoperating-points-v2'!opp-300000000 $ᣠ+ L¸ L¸ øPopp-400000000 $ׄ + L¸ L¸ øPopp-500000000 $Íe + L¸ L¸ øPopp-600000000 $#ÃF + L¸ L¸ øPopp-700000000 $)¹' + ®` ®` øPopp-800000000 $/¯ + q° q° øPopp-900000000 $5¤é + 5 5 øPopp-1000000000 $;šÊ + øP øP øPchosen Vserial2:1500000n8adc-keys adc-keys bð nbuttons w@ ™dbutton-maskrom §Maskrom ­h ¸gpio-keys gpio-keyszdefaultpñbutton-user §User ­ kk Ò2leds gpio-ledsled-0 §sys_led kk äheartbeatzdefaultpòled-1 §wan_led kkzdefaultpóled-2 §lan1_led kkzdefaultpôled-3 §lan2_led kkzdefaultpõvcc5v0-sys-regulatorregulator-fixed ¥vcc5v0_sys´ÈÚLK@òLK@',vcc-1v1-nldo-s3-regulatorregulator-fixed¥vcc_1v1_nldo_s3´ÈÚÈàòÈà,'¶vcc-3v3-s0-regulatorregulator-fixed´ÈÚ2Z ò2Z  ¥vcc_3v3_s0övcc-3v3-sd-s0-regulatorregulator-fixed ú k÷ zdefaultpø¥vcc_3v3_sd_s0Èò-ÆÀÚ-ÆÀö'~vcc3v3-pcie20-regulatorregulator-fixed¥vcc_3v3_pcie20´ÈÚ2Z ò2Z ö'lvcc5v0-usb-regulatorregulator-fixed ¥vcc5v0_usb´ÈÚLK@òLK@,'úvcc5v0-usb-otg0-regulatorregulator-fixed ú kkzdefaultpù¥vcc5v0_usb_otg0ÚLK@òLK@úvcc5v0-host-20-regulatorregulator-fixed ú k÷ zdefaultpû¥vcc5v0_host_20ÚLK@òLK@ú') compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs200-1_8vrockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltdebounce-intervallinux,default-triggerenable-active-high