Ð þíôÇ8çÌ( ûç”hugsun,x99rockchip,rk3399 +7Hugsun X99 TV BOXaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe310000Ý/mmc@fe320000â/mmc@fe330000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@WøôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä•pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúàûàûà8‚ƒ„…†€(–coremgmtmgmt-stickypipepmpclkaclk §disabledinterrupt-controller¢ äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpm·Å8‚ƒ„…†€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3Ï ídefaultû §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac‰ –stmmaceth §okay+¦;Rinput_jrgmiiídefaultû s ƒ ™'ÃP®(·mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ÀðÑ€ îMœ›biuciuciu-driveciu-sampleΏy–reset§okayÙÐúð€ãð!"ídefault û"#$0+wifi@1brcm,bcm4329-fmac÷ %® 1host-wakeídefaultû&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AÀðÑ€+Í> ë ÎLš››biuciuciu-driveciu-sampleΏz–reset§okayÐðÑ€ÙSðep'ídefaultû()*+} mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® +N> ëÂNð›clk_xinclk_ahbàemmc_cardclockóy, ~phy_arasan¥§okayÙ¶Å"ä˜usb@fe380000 generic-ehci÷þ8®ÈÉ-y.~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ-y.~usb§okayusb@fe3c0000 generic-ehci÷þ<�®ÊË/y0~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË/y0~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®iöƒ›refbus_earlysuspendßhosty12~usb2-phyusb3-phy çutmi_wideð)Bc§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ®n‚÷„›refbus_earlysuspendßhosty34~usb2-phyusb3-phy çutmi_wideð)Bc§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® +r¡>õá ë ru¡o›core-clkpclkspdifgrfy56 HJý–spdifdptxapbcore… §disabledportsport+endpoint@0÷–7ä¨endpoint@1÷–8ä¢interrupt-controller@fee00000 arm,gic-v3 +ˆ¢P÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-its¦µ÷þâäppi-partitionsinterrupt-partition-0Àäinterrupt-partition-1Àäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>ÉPe›saradcapb_pclkÔ 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W-ÆÀSWITCH_REG1 ·vcc3v3_s3 ( <�regulator-state-mem ?SWITCH_REG2 ·vcc3v3_s0 ( <�regulator-state-mem ?i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=+ > ë  ›i2cpclk®8ídefaultû‹+§okayçXþ(typec-portc@22 fcs,fusb302÷" ‰®ídefaultûŒ s§okayi2c@ff3e0000rockchip,rk3399-i2c÷ÿ>+ > ë  ›i2cpclk®:ídefaultûŽ+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB ídefaultû §disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB ídefaultû §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  ídefaultû‘§okayäÉpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 ídefaultû’ §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk Š“iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface ‘ä“video-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore Š” iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface  ‘ä”iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface ‘ §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclkjgi –coreaxiahb!efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® ž ©Ó ›apb_pclkä^dma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® ž ©Ô ›apb_pclkäMclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu•›xin24mó À+>(Jñäclock-controller@ff760000rockchip,rk3399-cru÷ÿv•›xin24mó Àˆ+ÀÀ@ÂÁBÉÂCãÞxíD>#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+äio-domains"rockchip,rk3399-io-voltage-domain§okay Í9 Ú9 ç– ÷'mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf  §disabledäªusb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä-host-port ® 1linestate§okay_ä.otg-port 0®ghj1otg-bvalidotg-idlinestate§okayä1usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä/host-port ® 1linestate§okay_—ä0otg-port 0®lmo1otg-bvalidotg-idlinestate§okayä3phy@f780rockchip,rk3399-emmc-phy÷÷€$˜›emmcclk 2 §okayä,pcie-phyrockchip,rk3399-pcie-phyŠ›refclk ‡–phy §disabledäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-ref+~>úð€•”L–uphyuphy-pipeuphy-tcphy§okaydp-port ä5usb3-port ä2phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-ref+€>úð€ œM–uphyuphy-pipeuphy-tcphy§okaydp-port ä6usb3-port ä4watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®B…^Štx ›mclkhclkU×ídefaultû™…§okayi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆ®'…^^Štxrx›i2s_clki2s_hclkVÔíbclk_onbclk_offûš›…§okay # >i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(…^^Štxrx›i2s_clki2s_hclkWÕídefaultûœ…§okay # >i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)…^^Štxrx›i2s_clki2s_hclkXÖ…§okayä­vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ ÿ ®w+ÛÛ>ׄõáÛµÛ›aclk_vopdclk_vophclk_vop Š –axiahbdclk §disabledport+äendpoint@0÷–žä´endpoint@1÷–Ÿä¹endpoint@2÷– ä²endpoint@3÷–¡ä¶endpoint@4÷–¢ä8iommu@ff8f3f00rockchip,iommu÷ÿ?®wÛÛ ›aclkiface ‘ §disabledävop@ff900000rockchip,rk3399-vop-big ÷ÿ ÿ ®v+ÙÙ>ׄõáÙ´Ù›aclk_vopdclk_vophclk_vop Š£ –axiahbdclk§okayport+äendpoint@0÷–¤ä¸endpoint@1÷–¥ä³endpoint@2÷–¦ä±endpoint@3÷–§äµendpoint@4÷–¨ä7iommu@ff903f00rockchip,iommu÷ÿ?®vÙÙ ›aclkiface ‘§okayä£isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk Š©yª~dphy §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface ‘ Xä©isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk Š«y¬~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface ‘ Xä«hdmi-soundsimple-audio-card si2s Œ ¦hdmi-sound§okaysimple-audio-card,cpu ½­simple-audio-card,codec ½®hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ” ®(tqpo›iahbisfrcecgrfref…§okay ǯídefaultû°ä®ports+port@0÷+endpoint@0÷–±ä¦endpoint@1÷–²ä port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrfû–apb+ §disabledports+port@0÷+endpoint@0÷–³ä¥endpoint@1÷–´äžport@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrfü–apb+  §disabledä¬ports+port@0÷+endpoint@0÷–µä§endpoint@1÷–¶ä¡port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfídefaultû·–dp §disabledports+port@0÷+endpoint@0÷–¸ä¤endpoint@1÷–¹äŸport@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayź Ó»ägpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr® ß ï¢ ä%gpio@ff730000rockchip,gpio-bank÷ÿs® ß ï¢ ä‰gpio@ff780000rockchip,gpio-bank÷ÿxP® ß ï¢ äDgpio@ff788000rockchip,gpio-bank÷ÿx€Q® ß ï¢ ä gpio@ff790000rockchip,gpio-bank÷ÿyR® ß ï¢ äÄpcfg-pull-up ûäÀpcfg-pull-down äÁpcfg-pull-none ä¼pcfg-pull-none-12ma  $ ä¿pcfg-pull-none-13ma  $ ä½pcfg-pull-none-18ma  $pcfg-pull-none-20ma  $pcfg-pull-up-2ma û $pcfg-pull-up-8ma û $pcfg-pull-up-18ma û $pcfg-pull-up-20ma û $pcfg-pull-down-4ma  $pcfg-pull-down-8ma  $pcfg-pull-down-12ma  $ pcfg-pull-down-18ma  $pcfg-pull-down-20ma  $pcfg-output-high 3pcfg-output-low ?ä¾pcfg-input-enable Jpcfg-input-pull-up J ûpcfg-input-pull-down J clockclk-32k W¼cifcif-clkin W ¼cif-clkouta W ¼edpedp-hpd W¼ä·gmacrgmii-pinsð W½¼ ¼ ½ ¼ ¼¼¼¼½½¼¼½½ärmii-pins  W ¼ ½ ¼ ¼ ¼¼¼¼½½rgmii-sleep-pins W¾i2c0i2c0-xfer W¼¼ä…i2c1i2c1-xfer W¼¼ä:i2c2i2c2-xfer W¿¿ä;i2c3i2c3-xfer W¼¼ä<�i2c4i2c4-xfer W ¼ ¼ä‹i2c5i2c5-xfer W ¼ ¼ä=i2c6i2c6-xfer W ¼ ¼ä>i2c7i2c7-xfer W¼¼ä?i2c8i2c8-xfer W¼¼äŽi2s0i2s0-2ch-bus` W¼¼¼¼¼¼i2s0-2ch-bus-bclk-off` W¼¼¼¼¼¼i2s0-8ch-bus W¼¼¼¼¼¼¼¼¼äši2s0-8ch-bus-bclk-off W¼¼¼¼¼¼¼¼¼ä›i2s1i2s1-2ch-busP W¼¼¼¼¼äœi2s1-2ch-bus-bclk-offP W¼¼¼¼¼sdio0sdio0-bus1 WÀsdio0-bus4@ WÀÀÀÀä"sdio0-cmd WÀä#sdio0-clk W¼ä$sdio0-cd WÀsdio0-pwr WÀsdio0-bkpwr WÀsdio0-wp WÀsdio0-int WÀsdmmcsdmmc-bus1 WÀsdmmc-bus4@ WÀ À À Àä+sdmmc-clk W ¼ä(sdmmc-cmd W Àä)sdmmc-cd WÀä*sdmmc-wp WÀsuspendap-pwroff W¼ddrio-pwroff W¼spdifspdif-bus W¼spdif-bus-1 W¼ä™spi0spi0-clk WÀäNspi0-cs0 WÀäQspi0-cs1 WÀspi0-tx WÀäOspi0-rx WÀäPspi1spi1-clk W ÀäRspi1-cs0 W ÀäUspi1-rx WÀäTspi1-tx WÀäSspi2spi2-clk W ÀäVspi2-cs0 W ÀäYspi2-rx W ÀäXspi2-tx W ÀäWspi3spi3-clk WÀä€spi3-cs0 WÀäƒspi3-rx WÀä‚spi3-tx WÀäspi4spi4-clk WÀäZspi4-cs0 WÀä]spi4-rx WÀä\spi4-tx WÀä[spi5spi5-clk WÀä_spi5-cs0 WÀäbspi5-rx WÀäaspi5-tx WÀä`testclktest-clkout0 W¼test-clkout1 W¼test-clkout2 W¼tsadcotp-pin W¼ähotp-out W¼äiuart0uart0-xfer WÀ¼ä@uart0-cts W¼äBuart0-rts W¼äAuart1uart1-xfer W À ¼äJuart2auart2a-xfer WÀ ¼uart2buart2b-xfer WÀ¼uart2cuart2c-xfer WÀ¼äKuart3uart3-xfer WÀ¼äLuart3-cts W¼uart3-rts W¼uart4uart4-xfer WÀ¼ä„uarthdcpuarthdcp-xfer WÀ¼pwm0pwm0-pin W¼äpwm0-pin-pull-down WÁvop0-pwm-pin W¼vop1-pwm-pin W¼pwm1pwm1-pin W¼äpwm1-pin-pull-down WÁpwm2pwm2-pin W¼pwm2-pin-pull-down WÁä‘pwm3apwm3a-pin W¼ä’pwm3bpwm3b-pin W¼hdmihdmi-i2c-xfer W¼¼hdmi-cec W¼ä°pciepci-clkreqn-cpm W¼pci-clkreqnb-cpm W¼äfusb30xfusb0-int WÀäŒirir-rx W¼äÂledspower-led-pin W¼äÃpmicpmic-int-l WÀäŠvsel1-pin WÁä†vsel2-pin WÁäˆsdiobt-host-wake-l W¼äFbt-reg-on-h W ¼äEbt-wake-l W¼äGwifi-reg_on-h W ¼äÊwifiwifi-host-wake-l W¼ä&usb-typecvcc5v0_typec_en WÀäÇusb2host-vbus-drv W¼äÆopp-table-0operating-points-v2 eä opp00 pQ– w –¨ –¨Ð …œ@opp01 p#ÃF w –¨ –¨Ðopp02 p0£, w øP øPÐopp03 p<Ü wHHÐopp04 pG†Œ wB@B@Ðopp05 pTfr w*ˆ*ˆÐopp-table-1operating-points-v2 eäopp00 pQ– w –¨ –¨Ð …œ@opp01 p#ÃF w –¨ –¨Ðopp02 p0£, w –¨ –¨Ðopp03 p<Ü w Yø YøÐopp04 pG†Œ w~ð~ðÐopp05 pTfr w£è£èÐopp06 p_Ø" wÈàÈàÐopp07 pkIÒ wO€O€Ðopp-table-2operating-points-v2äºopp00 p ë w –¨ –¨Œ0opp01 p³Ü@ w –¨ –¨Œ0opp02 pׄ w –¨ –¨Œ0opp03 pÍe w Yø YøŒ0opp04 p#ÃF wHHŒ0opp05 p/¯ wÈàÈàŒ0chosen –serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóädc-5vregulator-fixed·dc_5v ( <�ÆLK@ÞLK@äÅir-receivergpio-ir-receiver ;%ídefaultûÂleds gpio-ledsídefaultûÃled-0 ¢blue:power ;Ä ¨on ¶default-onvcc-sysregulator-fixed·vcc_sysÆLK@ÞLK@ ( NÅä‡vcc-phy-regulatorregulator-fixed·vcc_phy ( <�ävcc1v8-s0regulator-fixed ·vcc1v8_s0Æw@Þw@ (ä9vcc3v3-sysregulator-fixed ·vcc3v3_sysÆ2Z Þ2Z  ( N‡äHvcc5v0-host-regulatorregulator-fixed Ì ~ÄídefaultûÆ ·vcc5v0_host (ä—vcc5v0-typec-regulatorregulator-fixed Ì ~‰ídefaultûÇ ·vcc5v0_typec ( NÈävcc5v0-usbregulator-fixed ·vcc5v0_usb ( <�ÆLK@ÞLK@ NÅäÈvdd-logpwm-regulator ßÉa¨ 䇷vdd_logÆ 5Þ\À ( <�sdio-pwrseqmmc-pwrseq-simpleC ›ext_clockídefaultûÊ ï% ä! compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeeddisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendregulator-initial-moderockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathlabeldefault-statelinux,default-triggerenable-active-highpwmspwm-supplyreset-gpios