Ð þíÖ„8Ì( „ËÈ ,prt,mecsbcrockchip,rk35687Protonic MECSBCaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe310000â/mmc@fe2b0000cpus cpu@0çcpu,arm,cortex-a55ó÷þ psci/€<�@N€[€h@z€‡˜£ cpu@100çcpu,arm,cortex-a55óþ psci/€<�@N€[€h@z€‡˜£ cpu@200çcpu,arm,cortex-a55óþ psci/€<�@N€[€h@z€‡˜£ cpu@300çcpu,arm,cortex-a55óþ psci/€<�@N€[€h@z€‡˜£ l3-cache,cache«·1>@P£opp-table-0,operating-points-v2Å£opp-408000000ÐQ– × »  » Œ0åœ@opp-600000000Ð#ÃF × »  » Œ0opp-816000000Ð0£, × »  » Œ0öopp-1104000000ÐAÍ´ × »  » Œ0opp-1416000000ÐTfr × »  » Œ0opp-1608000000Ð_Ø" ×à˜à˜Œ0opp-1800000000ÐkIÒ ×Œ0opp-1992000000Ðv»‚ ׌0Œ0Œ0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc‚ protocol@14ó£opp-table-1,operating-points-v2£@opp-200000000Ð ëÂ× ö8opp-300000000Ðá£× ö8opp-400000000Ðׄ× ö8opp-600000000Ð#ÃF× Àopp-700000000Ð)¹'×~ðopp-800000000Ð/¯×B@hdmi-sound,simple-audio-card&HDMI=i2sV pdisabledsimple-audio-card,codecwsimple-audio-card,cpuw pmu,arm,cortex-a55-pmu0äåæçŒ psci ,arm,psci-1.0smctimer,arm,armv8-timer0   Ÿxin24m ,fixed-clock¶n6Æxin24m£xin32k ,fixed-clock¶€Æxin32kÙãdefaultsram@10f000 ,mmio-sramóð ñðsram@0,arm,scmi-shmemó£sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcióü@÷›œøsatapmaliverxoob _  sata-phy% pdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcióü€÷ ¡¢øsatapmaliverxoob `  sata-phy% pdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3óüÀ@ ©÷¦§¥øref_clksuspend_clkbus_clk3host ;utmi_wide%D”Kpokay  usb2-phyusb3-phydusb@fd000000,rockchip,rk3568-dwc3snps,dwc3óý@ ª÷©ª¨øref_clksuspend_clkbus_clk3host  usb2-phyusb3-phy ;utmi_wide%D•Kpokayinterrupt-controller@fd400000 ,arm,gic-v3 óý@ýF  k€‘ýA›(¦£usb@fd800000 ,generic-ehcióý€ ‚÷½¾¼ usbpokayusb@fd840000 ,generic-ohcióý„ ƒ÷½¾¼ usbpokayusb@fd880000 ,generic-ehcióýˆ …÷¿À¼ usbpokayusb@fd8c0000 ,generic-ohcióýŒ †÷¿À¼ usbpokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdóý£Vio-domains&,rockchip,rk3568-pmu-io-voltage-domainpokayµÃÑßíû %syscon@fdc50000óýÅ ,rockchip,rk3568-pipe-grfsyscon£¢syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdóýÆ£syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconóýÈ££syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconóýÉ£¤syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconóýÊ€£¥syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconóýÊ€€£¦clock-controller@fdd00000,rockchip,rk3568-pmucruóýÐ3£clock-controller@fdd20000,rockchip,rk3568-cruóýÒ÷øxin24m3@ P€G†Œ ëÂe|£i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cóýÔ .÷- øi2cpclkÙãdefault pokayregulator@60 ,fcs,fan53555ó`‰¦vdd_cpuµÉÛ 5óŒ0 ü£regulator-state-mem serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartóýÕ t÷ ,øbaudclkapb_pclk9 Ù!ãdefault>K pdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmóý×÷ 0 øpwmpclkÙ"ãdefaultU pdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmóý×÷ 0 øpwmpclkÙ#ãdefaultUpokay£¼pwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmóý× ÷ 0 øpwmpclkÙ$ãdefaultUpokay£½pwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmóý×0÷ 0 øpwmpclkÙ%ãdefaultU pdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdóýÙpower-controller!,rockchip,rk3568-power-controller` £power-domain@7ó÷t&`power-domain@8ó÷ÌÍ t'()`power-domain@9ó ÷ÚÛÜ t*+,`power-domain@10ó ÷ñòt-./012`power-domain@11ó ÷ít3`power-domain@13÷ó t4`power-domain@14ó÷ t567`power-domain@15ó÷ t89:;<�=>?`gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostóýæ@$()' {jobmmugpu÷øgpubusþ@%pokay‹A£“video-codec@fdea0400,rockchip,rk3568-vpuóýê ‹{vdpu÷îï øaclkhclk—B% iommu@fdea0800,rockchip,rk3568-iommuóýê@ Š øaclkiface÷îï% ž£Brga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rgaóýë€ Z÷óôõøaclkhclksclkD&$% «coreaxiahb% video-codec@fdee0000,rockchip,rk3568-vepuóýî @÷ýþ øaclkhclk—C% iommu@fdee0800,rockchip,rk3568-iommuóýî@ ?÷ýþ øaclkiface% ž£Cmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcóþ@ d ÷ÁÂŽøbiuciuciu-driveciu-sample·ÂðÑ€Dë«reset pdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aóþ {macirqeth_wake_irq@÷†‰‰ÇÃĉÈWøstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refDì «stmmaceth|ÐDàñEFpokay@‰†e‡Å G +rgmii-id4outputãdefaultÙHIJKLMmdio,snps,dwmac-mdio ethernet-phy@2,ethernet-phy-ieee802.3-c22óãdefaultÙNAN Q†  cO £Gstmmac-axi-configoy‰£Drx-queues-config™£Equeue0tx-queues-config¯£Fqueue0vop@fe040000 óþ0þ@Åvopgamma-lut ”(÷ÝÞßàá%øaclkhclkdclk_vp0dclk_vp1dclk_vp2—P% | pdisabled,rockchip,rk3568-vopports £port@0ó port@1ó port@2ó iommu@fe043e00,rockchip,rk3568-iommu óþ>þ? ”÷ÝÞ øaclkifacež%  pdisabled£Pdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsióþ Døpclk÷è dphyQ% «apbD| pdisabledports port@0óport@1ódsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsióþ Eøpclk÷é dphyR% «apbD| pdisabledports port@0óport@1óhdmi@fe0a0000,rockchip,rk3568-dw-hdmióþ  -(÷æç“(Úøiahbisfrcecrefãdefault ÙSTU% >|Ï pdisabled£ports port@0óport@1óqos@fe128000,rockchip,rk3568-qossysconóþ€ £&qos@fe138080,rockchip,rk3568-qossysconóþ€€ £5qos@fe138100,rockchip,rk3568-qossysconóþ £6qos@fe138180,rockchip,rk3568-qossysconóþ€ £7qos@fe148000,rockchip,rk3568-qossysconóþ€ £'qos@fe148080,rockchip,rk3568-qossysconóþ€€ £(qos@fe148100,rockchip,rk3568-qossysconóþ £)qos@fe150000,rockchip,rk3568-qossysconóþ £3qos@fe158000,rockchip,rk3568-qossysconóþ€ £-qos@fe158100,rockchip,rk3568-qossysconóþ £.qos@fe158180,rockchip,rk3568-qossysconóþ€ £/qos@fe158200,rockchip,rk3568-qossysconóþ‚ £0qos@fe158280,rockchip,rk3568-qossysconóþ‚€ £1qos@fe158300,rockchip,rk3568-qossysconóþƒ £2qos@fe180000,rockchip,rk3568-qossysconóþ qos@fe190000,rockchip,rk3568-qossysconóþ £8qos@fe190280,rockchip,rk3568-qossysconóþ€ £<�qos@fe190300,rockchip,rk3568-qossysconóþ £=qos@fe190380,rockchip,rk3568-qossysconóþ€ £>qos@fe190400,rockchip,rk3568-qossysconóþ £?qos@fe198000,rockchip,rk3568-qossysconóþ€ £4qos@fe1a8000,rockchip,rk3568-qossysconóþ€ £*qos@fe1a8080,rockchip,rk3568-qossysconóþ€€ £+qos@fe1a8100,rockchip,rk3568-qossysconóþ £,dfi@fe230000,rockchip,rk3568-dfióþ#  àVpcie@fe260000,rockchip,rk3568-pcie0óÀ@þ&ôÅdbiapbconfig<�KJIHG{syspmcmsglegacyerrí(÷‚ƒ„…$øaclk_mstaclk_slvaclk_dbipclkauxçpci€÷` WWWW)8GV^  pcie-phy%Tñôôô ô à@@D¡«pipe pokayãdefaultÙX cYlegacy-interrupt-controller€k H£Wmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcóþ+@ b ÷°±Š‹øbiuciuciu-driveciu-sample·ÂðÑ€DÔ«resetpokayhr ƒZŒãdefaultÙ[\]^—¤²¾mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcóþ,@ c ÷²³Œøbiuciuciu-driveciu-sample·ÂðÑ€DÖ«reset pdisabledspi@fe300000 ,rockchip,sfcóþ0@ e÷xvøclk_sfchclk_sfcÙ_ãdefault pdisabledmmc@fe310000,rockchip,rk3568-dwcmshcóþ1 @{}P ëÂn6(÷|zy{}øcorebusaxiblocktimerpokayh ëÂËãdefaultÙ`abc²¾Ùèîi2s@fe400000,rockchip,rk3568-i2s-tdmóþ@ 4@=APFÏqFÏq÷?C9ømclk_txmclk_rxhclk9dötxDPQ «tx-mrx-m|Ï pdisabled£ i2s@fe410000,rockchip,rk3568-i2s-tdmóþA 5@EIPFÏqFÏq÷GK:ømclk_txmclk_rxhclk9ddörxtxDRS «tx-mrx-m|ãdefaultÙefghÏpokay£ºi2s@fe420000,rockchip,rk3568-i2s-tdmóþB 6@MPFÏq÷OO;ømclk_txmclk_rxhclk9ddötxrxDT«tx-m|ãdefaultÙijklÏ pdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmóþC 7÷SW<�ømclk_txmclk_rxhclk9ddötxrxDUV «tx-mrx-m|Ï pdisabledpdm@fe440000,rockchip,rk3568-pdmóþD L÷ZYøpdm_clkpdm_hclk9d örxÙmnopqrãdefaultDX«pdm-mÏ pdisabledspdif@fe460000,rockchip,rk3568-spdifóþF f ømclkhclk÷_\9dötxãdefaultÙsÏ pdisableddma-controller@fe530000,arm,pl330arm,primecellóþS@ ÷  øapb_pclk2£ dma-controller@fe550000,arm,pl330arm,primecellóþU@÷  øapb_pclk2£di2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cóþZ /÷HG øi2cpclkÙtãdefault  pdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cóþ[ 0÷JI øi2cpclkÙuãdefault pokayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cóþ\ 1÷LK øi2cpclkÙvãdefault pokayamplifier@4c ,ti,tas2562óLÏ =wwãdefaultÙxL£»i2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cóþ] 2÷NM øi2cpclkÙyãdefault  pdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cóþ^ 3÷PO øi2cpclkÙzãdefault pokaytemperature-sensor@48 ,ti,tmp1075óHrtc@51 ,nxp,pcf85363óQ Ærtcic_32koutwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtóþ` •÷ øtclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spióþa g÷RQøspiclkapb_pclk9  ötxrxãdefault Ù{|}  pdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spióþb h÷TSøspiclkapb_pclk9  ötxrxãdefault Ù~€  pdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spióþc i÷VUøspiclkapb_pclk9  ötxrxãdefault ف‚ƒ  pdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spióþd j÷XWøspiclkapb_pclk9  ötxrxãdefault Ù„…†  pdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartóþe u÷øbaudclkapb_pclk9  Ù‡ãdefault>K pdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartóþf v÷# øbaudclkapb_pclk9  Ùˆãdefault>Kpokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartóþg w÷'$øbaudclkapb_pclk9  Ù‰ãdefault>K pdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartóþh x÷+(øbaudclkapb_pclk9  ÙŠãdefault>K pdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartóþi y÷/,øbaudclkapb_pclk9 Ù‹ãdefault>K pdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartóþj z÷30øbaudclkapb_pclk9 ÙŒãdefault>K pdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartóþk {÷74øbaudclkapb_pclk9  ٍãdefault>K pdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartóþl |÷;8øbaudclkapb_pclk9  ÙŽãdefault>K pdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartóþm }÷?<�øbaudclkapb_pclk9  ُãdefault>K pdisabledthermal-zonescpu-thermal\dr耐tripscpu_alert0pœÐîpassive£‘cpu_alert1$øœÐîpassivecpu_critsœÐ îcriticalcooling-mapsmap0§‘0¬ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal\r耐tripsgpu-thresholdpœÐîpassivegpu-target$øœÐîpassive£’gpu-critsœÐ îcriticalcooling-mapsmap0§’ ¬“ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcóþq s@Pf@ ®`÷øtsadcapb_pclkD‚×|»sãdefaultsleepÙ”Ò•Üpokayò £saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcóþr ]÷øsaradcapb_pclkD€ «saradc-apb $pokay 6pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþn÷ZY øpwmpclkÙ–ãdefaultU pdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþn÷ZY øpwmpclkÙ—ãdefaultU pdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþn ÷ZY øpwmpclkÙ˜ãdefaultU pdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþn0÷ZY øpwmpclkÙ™ãdefaultU pdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþo÷]\ øpwmpclkÙšãdefaultU pdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþo÷]\ øpwmpclkÙ›ãdefaultU pdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþo ÷]\ øpwmpclkÙœãdefaultU pdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþo0÷]\ øpwmpclkٝãdefaultU pdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþp÷`_ øpwmpclkÙžãdefaultU pdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþp÷`_ øpwmpclkÙŸãdefaultU pdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþp ÷`_ øpwmpclkÙ ãdefaultU pdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmóþp0÷`_ øpwmpclkÙ¡ãdefaultU pdisabledphy@fe830000,rockchip,rk3568-naneng-combphyóþƒ÷"} ørefapbpipe@"PõáDÇ B¢ T£ jpokay£phy@fe840000,rockchip,rk3568-naneng-combphyóþ„÷%~ ørefapbpipe@%PõáDÉ B¢ T¤ jpokay£phy@fe870000,rockchip,rk3568-csi-dphyóþ‡÷yøpclk jDº«apb| pdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyóþ… ørefpclk÷z j% «apbD» pdisabled£Qmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyóþ† ørefpclk÷{ j% «apbD¼ pdisabled£Rusb2phy@fe8a0000,rockchip,rk3568-usb2phyóþŠ÷øphyclkÆclk_usbphy0_480m ‡ u¥pokay£host-port jpokay£otg-port jpokay£usb2phy@fe8b0000,rockchip,rk3568-usb2phyóþ‹÷øphyclkÆclk_usbphy1_480m ˆ u¦pokayhost-port jpokay£otg-port jpokay£pinctrl,rockchip,rk3568-pinctrl|àV ñ£§gpio@fdd60000,rockchip,gpio-bankóýÖ !÷.  … •§  ¡k€£Zgpio@fe740000,rockchip,gpio-bankóþt "÷cd … •§  ¡k€£wgpio@fe750000,rockchip,gpio-bankóþu #÷ef … •§@  ¡k€£µgpio@fe760000,rockchip,gpio-bankóþv $÷gh … •§`  ¡k€£Ygpio@fe770000,rockchip,gpio-bankóþw %÷ij … •§€  ¡k€£Opcfg-pull-up ­£ªpcfg-pull-none º£¨pcfg-pull-none-drv-level-1 º Ç£¬pcfg-pull-none-drv-level-2 º Ç£«pcfg-pull-none-drv-level-3 º Ç£¯pcfg-pull-up-drv-level-1 ­ Ç£®pcfg-pull-up-drv-level-2 ­ Ç£©pcfg-pull-none-smt º Ö£­acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 먣cpuebcedpdpemmcemmc-bus8€ ë © ©©©©©©©£`emmc-clk ë©£aemmc-cmd ë©£bemmc-datastrobe 먣ceth0eth1flashfspifspi-pins` 먨¨¨¨¨£_gmac0gmac1gmac1m1-miim 먨£Hgmac1m1-clkinout 먣Lgmac1m1-rx-bus20 먨 ¨£Jgmac1m1-tx-bus20 ë««¨£Igmac1m1-rgmii-clk 먬£Kgmac1m1-rgmii-bus@ 먨««£Mgpuhdmitxhdmitxm0-cec 먣Uhdmitx-scl 먣Shdmitx-sda 먣Ti2c0i2c0-xfer ë ­ ­£i2c1i2c1-xfer ë ­ ­£ti2c2i2c2m0-xfer ë ­­£ui2c3i2c3m0-xfer ë­­£vi2c4i2c4m0-xfer ë ­ ­£yi2c5i2c5m0-xfer ë ­ ­£zi2s1i2s1m0-lrcktx 먣fi2s1m0-sclktx 먣ei2s1m0-sdi0 ë ¨£gi2s1m0-sdo0 먣hi2s2i2s2m0-lrcktx 먣ji2s2m0-sclktx 먣ii2s2m0-sdi 먣ki2s2m0-sdo 먣li2s3ispjtaglcdcmcunpupcie20pcie20m1-pins0 먨¨£Xpcie30x1pcie30x2pcie30x2m1-pins0 먨¨£´pdmpdmm0-clk 먣mpdmm0-clk1 먣npdmm0-sdi0 ë ¨£opdmm0-sdi1 ë ¨£ppdmm0-sdi2 ë ¨£qpdmm0-sdi3 먣rpmicpmupwm0pwm0m0-pins 먣"pwm1pwm1m0-pins 먣#pwm2pwm2m0-pins 먣$pwm3pwm3-pins 먣%pwm4pwm4-pins 먣–pwm5pwm5-pins 먣—pwm6pwm6-pins 먣˜pwm7pwm7-pins 먣™pwm8pwm8m0-pins ë ¨£špwm9pwm9m0-pins ë ¨£›pwm10pwm10m0-pins ë ¨£œpwm11pwm11m0-pins 먣pwm12pwm12m0-pins 먣žpwm13pwm13m0-pins 먣Ÿpwm14pwm14m0-pins 먣 pwm15pwm15m0-pins 먣¡refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ë©©©©£[sdmmc0-clk ë©£\sdmmc0-cmd ë©£]sdmmc0-det 몣^sdmmc1sdmmc2spdifspdifm0-tx 먣sspi0spi0m0-pins0 ë ¨¨¨£}spi0m0-cs0 먣{spi0m0-cs1 먣|spi1spi1m0-pins0 ë ¨¨¨£€spi1m0-cs0 먣~spi1m0-cs1 먣spi2spi2m0-pins0 먨¨£ƒspi2m0-cs0 먣spi2m0-cs1 먣‚spi3spi3m0-pins0 ë ¨¨ ¨£†spi3m0-cs0 먣„spi3m0-cs1 먣…tsadctsadc-shutorg 먣”tsadc-pin 먣•uart0uart0-xfer 몪£!uart1uart1m0-xfer ë ª ª£‡uart2uart2m0-xfer 몪£ˆuart3uart3m0-xfer 몪£‰uart4uart4m0-xfer 몪£Šuart5uart5m0-xfer 몪£‹uart6uart6m0-xfer 몪£Œuart7uart7m0-xfer 몪£uart8uart8m0-xfer 몪£Žuart9uart9m0-xfer 몪£vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2etherneteth-phy1-rst ë ¨£Ntas2562tas2562 몣xsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcióü÷–—˜øsatapmaliverxoob ^  sata-phy% pdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconóýÇ£¹qos@fe190080,rockchip,rk3568-qossysconóþ€ £9qos@fe190100,rockchip,rk3568-qossysconóþ £:qos@fe190200,rockchip,rk3568-qossysconóþ £;syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconóýË€£°phy@fe8c0000,rockchip,rk3568-pcie3-phyóþŒ j÷&'wørefclk_mrefclk_npclkD¾«phy ù°pokay£²pcie@fe270000,rockchip,rk3568-pcie í(÷ˆ‰Š‹Œ$øaclk_mstaclk_slvaclk_dbipclkauxçpci<� Ÿžœ{syspmcmsglegacyerr€÷` ±±±±)8GV^²  pcie-phy%0óÀ@@þ'òTñòòò ò à@@@ÅdbiapbconfigD±«pipe pdisabledlegacy-interrupt-controllerk€ £±pcie@fe280000,rockchip,rk3568-pcie í(÷‘’“$øaclk_mstaclk_slvaclk_dbipclkauxçpci<�¥¤£¢¡{syspmcmsglegacyerr€÷` ³³³³)8GV ^²  pcie-phy%0óÀ€@þ(ðTñððð ð à@€@ÅdbiapbconfigDÁ«pipepokayãdefaultÙ´ cµ legacy-interrupt-controllerk€ ¢£³ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aóþ*{macirqeth_wake_irq@÷‚……¸´µ…¹Wøstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refD× «stmmaceth|жàñ·¸ pdisabledmdio,snps,dwmac-mdio stmmac-axi-configoy‰£¶rx-queues-config™£·queue0tx-queues-config¯£¸queue0phy@fe820000,rockchip,rk3568-naneng-combphyóþ‚÷| ørefapbpipe@PõáDÅ B¢ T¹ jpokay£chosen serial2:1500000n8tas2562-sound,simple-audio-card=i2s&SpeakerVsimple-audio-card,cpuwºsimple-audio-card,codecw»regulator-vdd-gpu,pwm-regulator &¼ˆ¦vdd_gpuÛ ö8óB@µÉ +ú Id£Aregulator-p3v3,regulator-fixed¦p3v3µÉÛ2Z ó2Z £regulator-p1v8,regulator-fixed¦p1v8µÉÛw@ów@£regulator-sd,regulator-gpio ]Z j iZ¦sdcard-gpio-supplyÛw@ó2Z  }w@2Z £regulator-vdd-npu,pwm-regulator &½ˆ¦vdd_npuÛ ö8óB@µÉ +ú Id interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspenddmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-handlephy-modeclock_in_outreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removablemmc-hs200-1_8vno-sdno-sdiodma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsshutdown-gpiosti,imon-slot-nopolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfvpcie3v3-supplystdout-pathpwmsregulator-settling-time-up-uspwm-dutycycle-rangeenable-gpiosenable-active-highstates