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"¹wVÛ ;disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000ø]( "ÀwVâ2fsl,imx8qxp-mufsl,imx6sx-mu0clock-controller@5d4000002fsl,imx8qxp-lpcgø]@h4s¿¿¿¿ih¿pwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clkV¿|clock-controller@5d4100002fsl,imx8qxp-lpcgø]Ah4sÀÀÀÀih¿pwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clkVÀ}clock-controller@5d4200002fsl,imx8qxp-lpcgø]Bh4sÁÁÁÁih¿pwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clkVÁ~clock-controller@5d4300002fsl,imx8qxp-lpcgø]Ch4sÂih¿pwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clkVclock-controller@5d4400002fsl,imx8qxp-lpcgø]Dh4sÃÃÁÃih¿pwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clkVÃclock-controller@5d4500002fsl,imx8qxp-lpcgø]Eh4sÄÄāÄih¿pwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clkVÄclock-controller@5d4600002fsl,imx8qxp-lpcgø]Fh4sÅÅŁÅih¿pwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clkVÅclock-controller@5d4700002fsl,imx8qxp-lpcgø]Gh4sÆÆƁÆih¿pwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clkVÆchosen»/bus@5a000000/serial@5a060000memory@80000000ìmemoryø€@usdhc2-vmmc2regulator-fixed ÇSD1_SPWRÖ-ÆÀî-ÆÀ m lgpio-sbu-mux2nxp,cbdtu02043gpio-sbu-muxdefault«‚ ƒ  +„8portendpointþ…_sound-wm89602fsl,imx-audio-wm8960 ,wm8960-audioK†U‡ aƒmHeadphone JackHP_LHeadphone JackHP_RExt SpkSPK_LPExt SpkSPK_LNExt SpkSPK_RPExt SpkSPK_RNLINPUT1Mic JackMic JackMICB interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3vpu-core0vpu-core1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodestimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsslotclock-indices#mbox-cellsmemory-regionclock-namespinctrl-namespinctrl-0pinctrl-1scl-gpiossda-gpioswlf,shared-lrclkwlf,hp-cfgwlf,gpio-cfggpio-controller#gpio-cellsdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-map#sound-dai-cells#dma-cellsdma-channelsdma-channel-maskassigned-clock-parentsfsl,sai-asynchronousdais#pwm-cellsreset-gpioslabelpower-roledata-rolesource-pdosremote-endpoint#io-channel-cellsfsl,clk-sourcefsl,scu-indexfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dword#index-cellsbus-widthno-sdno-sdionon-removablefsl,tuning-start-tapfsl,tuning-stepvmmc-supplycd-gpioswp-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-sizedr_modeusb-role-switch#phy-cellsgpio-rangesstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highselect-gpiosenable-gpiosorientation-switchaudio-cpuaudio-codechp-det-gpioaudio-routing