Ð þíV8RŒ(vRTapm,mustangapm,xgene-storm +7APM X-Gene Mustang boardcpus+cpu@0=cpu apm,potenzaI Mspin-table[ÿølcpu@1=cpu apm,potenzaI Mspin-table[ÿølcpu@100=cpu apm,potenzaI Mspin-table[ÿølcpu@101=cpu apm,potenzaI Mspin-table[ÿølcpu@200=cpu apm,potenzaI Mspin-table[ÿølcpu@201=cpu apm,potenzaI Mspin-table[ÿølcpu@300=cpu apm,potenzaI Mspin-table[ÿølcpu@301=cpu apm,potenzaI Mspin-table[ÿøll2-cache-0cache}‰—l2-cache-1cache}‰—l2-cache-2cache}‰—l2-cache-3cache}‰—interrupt-controller@78010000arm,cortex-a15-gicŸ°@Ixxx x  Å —refclk fixed-clockÐÝõáírefclk—timerarm,armv8-timer0Åÿ ÿÿÿÝúð€pmuapm,potenza-pmu Å ÿsoc simple-bus+clocks+pcppll@17000100apm,xgene-pcppll-clockÐpcppllIípcppllDsocpll@17000120apm,xgene-socpll-clockÐsocpllI ísocpllD—socplldiv2fixed-factor-clockÐ socplldiv2%0 ísocplldiv2—ahbclk@17000000apm,xgene-device-clockÐI :div-regDdSaíahbclk—sdioclk@1f2ac000apm,xgene-device-clockÐ I*À :csr-regdiv-regozƒ‘DxSaísdioclk—ethclkapm,xgene-device-clockÐethclkI:div-regD8S aíethclk— menetclkapm,xgene-device-clockÐ IÀ:csr-reg ímenetclk—#sge0clk@1f21c000apm,xgene-device-clockÐI!À:csr-regz ‘ísge0clk—&xge0clk@1f61c000apm,xgene-device-clockÐIaÀ:csr-regzíxge0clk—)xge1clk@1f62c000apm,xgene-device-clock disabledÐIbÀ:csr-regzíxge1clk—+sataphy1clk@1f21c000apm,xgene-device-clockÐI!À:csr-reg ísataphy1clk disabledozƒ‘—sataphy1clk@1f22c000apm,xgene-device-clockÐI"À:csr-reg ísataphy2clkokayoz:ƒ‘—sataphy1clk@1f23c000apm,xgene-device-clockÐI#À:csr-reg ísataphy3clkokayoz:ƒ‘—sata01clk@1f21c000apm,xgene-device-clockÐI!À:csr-reg ísata01clkozƒ‘9—sata23clk@1f22c000apm,xgene-device-clockÐI"À:csr-reg ísata23clkozƒ‘9—sata45clk@1f23c000apm,xgene-device-clockÐI#À:csr-reg ísata45clkozƒ‘9— rtcclk@17000000apm,xgene-device-clockÐI :csr-rego zƒ‘írtcclk—"rngpkaclk@17000000apm,xgene-device-clockÐI :csr-rego zƒ‘ írngpkaclk—,pcie0clk@1f2bc000okayapm,xgene-device-clockÐI+À:csr-reg ípcie0clk—pcie1clk@1f2cc000 disabledapm,xgene-device-clockÐI,À:csr-reg ípcie1clk—pcie2clk@1f2dc000 disabledapm,xgene-device-clockÐI-À:csr-reg ípcie2clk—pcie3clk@1f50c000 disabledapm,xgene-device-clockÐIPÀ:csr-reg ípcie3clk—pcie4clk@1f51c000 disabledapm,xgene-device-clockÐIQÀ:csr-reg ípcie4clk—dmaclk@1f27c000apm,xgene-device-clockÐI'À:csr-regídmaclk—-msi@79000000apm,xgene1-msi¤IyÀÅ—system-clk-controller@17000000apm,xgene-scusysconI— reboot@17000014syscon-reboot³ L~csw@7e200000apm,xgene-cswsysconI~ — mcba@7e700000apm,xgene-mcbsysconI~p— mcbb@7e720000apm,xgene-mcbsysconI~r— efuse@1054a000apm,xgene-efusesysconIT  —rb@7e000000apm,xgene-rbsysconI~—edac@78800000apm,xgene-edac+º Å Ñ ÝêIx€$Å !'edacmc@7e800000apm,xgene-edac-mcI~€ôedacmc@7e840000apm,xgene-edac-mcI~„ôedacmc@7e880000apm,xgene-edac-mcI~ˆôedacmc@7e8c0000apm,xgene-edac-mcI~Œôedacpmd@7c000000apm,xgene-edac-pmdI| edacpmd@7c200000apm,xgene-edac-pmdI| edacpmd@7c400000apm,xgene-edac-pmdI|@ edacpmd@7c600000apm,xgene-edac-pmdI|` edacl3@7e600000apm,xgene-edac-l3I~`edacsoc@7e930000apm,xgene-edac-soc-v1I~“pmu@78810000apm,xgene-pmu-v2+º Å Ñ Ix Å"pmul3c@7e610000apm,xgene-pmu-l3cI~apmuiob@7e940000apm,xgene-pmu-iobI~”pmucmcb@7e710000apm,xgene-pmu-mcbI~qpmucmcb@7e730000apm,xgene-pmu-mcbI~spmucmc@7e810000apm,xgene-pmu-mcI~pmucmc@7e850000apm,xgene-pmu-mcI~…pmucmc@7e890000apm,xgene-pmu-mcI~‰pmucmc@7e8d0000apm,xgene-pmu-mcI~pcie@1f2b0000okay=pci$apm,xgene-storm-pcieapm,xgene-pcieŸ+ I+àÐ:csrcfgTà€á€€Cðð8B€€€B€&ÿ0€CÂÃÄÅQ^pcie@1f2c0000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcieŸ+ I,ÐÐ:csrcfgTЀр€CØØ8B€€€B€&ÿ0€CÈÉÊËQ^pcie@1f2d0000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcieŸ+ I-Ð:csrcfgT€‘€€C””8B€€€B€&ÿ0€CÎÏÐÑQ^pcie@1f500000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcieŸ+ IP Ð:csrcfgT €¡€€C°°8B€€€B€&ÿ0€CÔÕÖ×Q^pcie@1f510000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcieŸ+ IQÀÐ :csrcfgTÀ€Á€€CÈÈ8B€€€B€&ÿ0€CÚÛÜÝQ^mailbox@10540000apm,xgene-slimpro-mboxIT i`Å—i2cslimproapm,xgene-slimpro-i2cuhwmonslimproapm,xgene-slimpro-hwmonuserial@1c020000okay ns16550aI|ݘ–€  ÅLserial@1c021000 disabled ns16550aI|ݘ–€  ÅMserial@1c022000 disabled ns16550aI |ݘ–€  ÅNserial@1c023000 disabled ns16550aI0|ݘ–€  ÅOmmc@1c000000arasan,sdhci-4.9aI ÅIQ†clk_xinclk_ahbokaygpio0@1701c000apm,xgene-gpioIÀ@Ÿgpio@1c024000snps,dw-apb-gpioI@+gpio-controller@0snps,dw-apb-gpio-portŸ« Ii2c@10512000 disabled+snps,designware-i2cIQ  ÅDйphy@1f21a000apm,xgene-phyI! Á disabledÌÞ  —phy@1f22a000apm,xgene-phyI" ÁokayÌÞ  —phy@1f23a000apm,xgene-phyI# ÁokayÌÞ  —!sata@1a000000apm,xgene-ahciPI!!Ð!à!p ņQ disabledð õsata-physata@1a400000apm,xgene-ahciPI@""Ð"à"p ŇQokayð õsata-physata@1a800000apm,xgene-ahci@I€##Ð#à ňQokay ð! õsata-phyusb@19000000 disabled snps,dwc3I ʼnQÿhostusb@19800000 disabled snps,dwc3I€ ÅŠQÿhostgpio@17001000apm,xgene-gpio-sbIŸHÅ()*+,- Ÿ°—*rtc@10510000apm,xgene-rtcIQ ÅFÐ"mdio@17020000apm,xgene-mdio-rgmii+IÑ#phy@3I—%phy@4I—'phy@5I—(ethernet@17020000apm,xgene-enetokay0IÑÃ:enet_csrring_csrring_cmd Å<�Q#rgmii-$%mdioapm,xgene-mdio+menetphy@3ethernet-phy-id001c.c915I—$ethernet@1f210000apm,xgene1-sgenetokay0I!Ñ Ã:enet_csrring_csrring_cmdÅ ¡Q&sgmii-'ethernet@1f210030apm,xgene1-sgenetokay0I!0Ñ Ã€:enet_csrring_csrring_cmdŬ­8Qsgmii-(ethernet@1f610000apm,xgene1-xgenetokay0IaÑ`Ã:enet_csrring_csrring_cmd`Å`abcdefg@Q)xgmii H* ethernet@1f620000apm,xgene1-xgenet disabled0IbÑ`À:enet_csrring_csrring_cmdÅlm8Q+xgmiirng@10520000apm,xgene-rngIR ÅA,dma@1f270000apm,xgene-storm-dma=dma@I' @T <�Å‚¸¹º»Q-chosenmemory@100000000=memoryI€gpio-keys gpio-keysbuttonTPOWERZte *Åpoweroff_mbox@10548000$apm,mustang-poweroff-mailboxsysconIT€0—.poweroff@10548010syscon-poweroff³.L~ compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodcpu-release-addrnext-level-cachecache-levelcache-unifiedphandle#interrupt-cellsinterrupt-controllerinterrupts#clock-cellsclock-frequencyclock-output-namesrangesdma-rangesclocksclock-namesclock-multclock-divreg-namesdivider-offsetdivider-widthdivider-shiftcsr-offsetcsr-maskenable-offsetenable-maskstatusmsi-controllerregmapregmap-cswregmap-mcbaregmap-mcbbregmap-efuseregmap-rbmemory-controllerpmd-controllerenable-bit-indexbus-rangeinterrupt-map-maskinterrupt-mapdma-coherentmsi-parent#mbox-cellsmboxesreg-shiftno-1-8-vgpio-controller#gpio-cellssnps,nr-gpiosbus_num#phy-cellsapm,tx-boost-gainapm,tx-eye-tuningphysphy-namesdr_modelocal-mac-addressphy-connection-typephy-handleport-idchannelrxlos-gpioslabellinux,codelinux,input-type