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œmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 ‹X{}h ëÂn6(|zy{}corebusaxiblocktimerzokayç ­ k $ 0i2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ ‹4X=AhFÏqFÏq?C9mclk_txmclk_rxhclkSm ¼txNPQ Åtx-mrx-m” }zokay­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA ‹5XEIhFÏqFÏqGK:mclk_txmclk_rxhclkSmm ¼rxtxNRS Åtx-mrx-m” ídefaultãnopq}zokay Æ­Çi2s@fe420000,rockchip,rk3568-i2s-tdmýþB ‹6XMhFÏqOO;mclk_txmclk_rxhclkSmm ¼txrxNTÅtx-m” ídefaultãrstu} zdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC ‹7SW<�mclk_txmclk_rxhclkSmm ¼txrxNUV Åtx-mrx-m” } zdisabledpdm@fe440000,rockchip,rk3568-pdmýþD ‹LZYpdm_clkpdm_hclkSm  ¼rxãvwxyz{ídefaultNXÅpdm-m} zdisabledspdif@fe460000,rockchip,rk3568-spdifýþF ‹f mclkhclk_\Sm ¼txídefaultã|}zokay­Édma-controller@fe530000,arm,pl330arm,primecellýþS@‹  á  apb_pclk ø­'dma-controller@fe550000,arm,pl330arm,primecellýþU@‹ á  apb_pclk ø­mi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ ‹/HG i2cpclkã}ídefault  zdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ ‹0JI i2cpclkã~ídefault  zdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ ‹1LK i2cpclkãídefault zokayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] ‹2NM i2cpclkã€ídefault  zdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ ‹3PO i2cpclkãídefault  zdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` ‹• tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa ‹gRQspiclkapb_pclkS'' ¼txrxídefault ゃ„  zdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb ‹hTSspiclkapb_pclkS'' ¼txrxídefaultã…†  zdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc ‹iVUspiclkapb_pclkS'' ¼txrxídefault ㇈‰  zdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd ‹jXWspiclkapb_pclkS'' ¼txrxídefault ㊋Œ  zdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe ‹ubaudclkapb_pclkS'' ㍎ídefaultXezokay ¼txrx bluetooth,brcm,bcm43438-btlpo ‘ %‘ 9‘ídefault ã’“” H" T• a-ÆÀserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf ‹v# baudclkapb_pclkS''ã–ídefaultXezokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg ‹w'$baudclkapb_pclkS''ã—ídefaultXe zdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh ‹x+(baudclkapb_pclkS'' ã˜ídefaultXe zdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi ‹y/,baudclkapb_pclkS' ' ã™ídefaultXe zdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj ‹z30baudclkapb_pclkS' ' ãšídefaultXe zdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk ‹{74baudclkapb_pclkS''ã›ídefaultXe zdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl ‹|;8baudclkapb_pclkS''ãœídefaultXe zdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm ‹}?<�baudclkapb_pclkS''ãídefaultXe zdisabledthermal-zonescpu-thermal kd è žtripscpu_alert0 Ÿp «Ðøpassive­Ÿcpu_alert1 Ÿ$ø «Ðøpassivecpu_crit Ÿs «Ð øcriticalcpu_hot ŸÖØ «Ðøactive­ cooling-mapsmap0 ¶Ÿ0 » ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿmap1 ¶  »¡ÿÿÿÿÿÿÿÿgpu-thermal k è žtripsgpu-threshold Ÿp «Ðøpassivegpu-target Ÿ$ø «Ðøpassive­¢gpu-crit Ÿs «Ð øcriticalcooling-mapsmap0 ¶¢ »£ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq ‹sXhf@ ®`tsadcapb_pclkN‚×”  Êsídefaultsleep㤠ᥠëzokay  ­žsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ‹]saradcapb_pclkN€ Åsaradc-apb 3 zdisabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkã¦ídefaulto zdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkã§ídefaulto zdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclkã¨ídefaulto zdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclkã©ídefaulto zdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkãªídefaulto zdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkã«ídefaulto zdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclkã¬ídefaulto zdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclkã­ídefaulto zdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã®ídefaulto zdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã¯ídefaulto zdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclkã°ídefaulto zdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclkã±ídefaulto zdisabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipeX"hõáNÇ E² W³ mzokay­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ refapbpipeX%hõáNÉ E² W´ mzokay­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk mNºÅapb”  zdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz m/ ÅapbN» zdisabled­Umipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{ m/ ÅapbN¼ zdisabled­Vusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkÐclk_usbphy0_480m ‹‡ xµ#zokay­host-port mzokayG¶­otg-port mzokayG·­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkÐclk_usbphy1_480m ‹ˆ x¸#zokayhost-port mzokayG¶­otg-port mzokayG¶­pinctrl,rockchip,rk3568-pinctrl” C] û­¹gpio@fdd60000,rockchip,gpio-bankýýÖ ‹!.  ˆ ˜¹  ¤ƒ˜­#gpio@fe740000,rockchip,gpio-bankýþt ‹"cd ˆ ˜¹  ¤ƒ˜­`gpio@fe750000,rockchip,gpio-bankýþu ‹#ef ˆ ˜¹@  ¤ƒ˜­‘gpio@fe760000,rockchip,gpio-bankýþv ‹$gh ˆ ˜¹`  ¤ƒ˜gpio@fe770000,rockchip,gpio-bankýþw ‹%ij ˆ ˜¹€  ¤ƒ˜­Ípcfg-pull-up °­¼pcfg-pull-down ½­Âpcfg-pull-none Ì­ºpcfg-pull-none-drv-level-1 Ì Ù­¾pcfg-pull-none-drv-level-2 Ì Ù­½pcfg-pull-none-drv-level-3 Ì Ù­Ápcfg-pull-up-drv-level-1 ° Ù­Àpcfg-pull-up-drv-level-2 ° Ù­»pcfg-pull-none-smt Ì è­¿acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ýº­cpuebcedpdpemmceth0eth1flashfspifspi-pins` ýºººººº­lgmac0gmac1gmac1m0-miim ýºº­Lgmac1m0-clkinout ýº­Pgmac1m0-rx-bus20 ý º º º­Ngmac1m0-tx-bus20 ý ½½º­Mgmac1m0-rgmii-clk ýº¾­Ogmac1m0-rgmii-bus@ ýºº½½­Qgpuhdmitxhdmitxm0-cec ýº­Yhdmitx-scl ýº­Whdmitx-sda ýº­Xi2c0i2c0-xfer ý ¿ ¿­!i2c1i2c1-xfer ý ¿ ¿­}i2c2i2c2m0-xfer ý ¿¿­~i2c3i2c3m0-xfer ý¿¿­i2c4i2c4m0-xfer ý ¿ ¿­€i2c5i2c5m0-xfer ý ¿ ¿­i2s1i2s1m0-lrcktx ýº­oi2s1m0-mclk ýº­%i2s1m0-sclktx ýº­ni2s1m0-sdi0 ý º­pi2s1m0-sdo0 ýº­qi2s2i2s2m0-lrcktx ýº­si2s2m0-sclktx ýº­ri2s2m0-sdi ýº­ti2s2m0-sdo ýº­ui2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ýº­vpdmm0-clk1 ýº­wpdmm0-sdi0 ý º­xpdmm0-sdi1 ý º­ypdmm0-sdi2 ý º­zpdmm0-sdi3 ýº­{pmicpmic-int-l ý¼­$pmupwm0pwm0m0-pins ýº­)pwm1pwm1m0-pins ýº­*pwm2pwm2m0-pins ýº­+pwm3pwm3-pins ýº­,pwm4pwm4-pins ýº­¦pwm5pwm5-pins ýº­§pwm6pwm6-pins ýº­¨pwm7pwm7-pins ýº­©pwm8pwm8m0-pins ý º­ªpwm9pwm9m0-pins ý º­«pwm10pwm10m0-pins ý º­¬pwm11pwm11m0-pins ýº­­pwm12pwm12m0-pins ýº­®pwm13pwm13m0-pins ýº­¯pwm14pwm14m0-pins ýº­°pwm15pwm15m0-pins ýº­±refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ý»»»»­bsdmmc0-clk ý»­csdmmc0-cmd ý»­dsdmmc0-det ý¼­esdmmc1sdmmc1-bus4@ ý»»»»­hsdmmc1-clk ý»­jsdmmc1-cmd ý»­isdmmc2spdifspdifm0-tx ýº­|spi0spi0m0-pins0 ý ººº­„spi0m0-cs0 ýº­‚spi0m0-cs1 ýº­ƒspi1spi1m1-pins0 ýººº­†spi1m1-cs0 ýº­…spi2spi2m0-pins0 ýººº­‰spi2m0-cs0 ýº­‡spi2m0-cs1 ýº­ˆspi3spi3m0-pins0 ý ºº º­Œspi3m0-cs0 ýº­Šspi3m0-cs1 ýº­‹tsadctsadc-shutorg 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctshost-wakeup-gpiosdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplymax-speedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathgpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-high